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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * pinctrl pads, groups, functions for CSR SiRFatlasVII |
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3 | 4 | * |
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4 | 5 | * Copyright (c) 2011 - 2014 Cambridge Silicon Radio Limited, a CSR plc group |
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5 | 6 | * company. |
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6 | | - * |
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7 | | - * Licensed under GPLv2 or later. |
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8 | 7 | */ |
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9 | 8 | |
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10 | 9 | #include <linux/init.h> |
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.. | .. |
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19 | 18 | #include <linux/of_device.h> |
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20 | 19 | #include <linux/of_platform.h> |
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21 | 20 | #include <linux/of_irq.h> |
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22 | | -#include <linux/of_gpio.h> |
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23 | 21 | #include <linux/pinctrl/machine.h> |
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24 | 22 | #include <linux/pinctrl/pinconf.h> |
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25 | 23 | #include <linux/pinctrl/pinctrl.h> |
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26 | 24 | #include <linux/pinctrl/pinmux.h> |
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27 | 25 | #include <linux/pinctrl/consumer.h> |
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28 | 26 | #include <linux/pinctrl/pinconf-generic.h> |
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29 | | -#include <linux/gpio.h> |
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| 27 | +#include <linux/gpio/driver.h> |
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30 | 28 | |
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31 | 29 | /* Definition of Pad&Mux Properties */ |
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32 | 30 | #define N 0 |
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.. | .. |
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171 | 169 | |
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172 | 170 | /** |
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173 | 171 | * struct atlas7_pad_conf - Atlas7 Pad Configuration |
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174 | | - * @id The ID of this Pad. |
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| 172 | + * @id: The ID of this Pad. |
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175 | 173 | * @type: The type of this Pad. |
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176 | 174 | * @mux_reg: The mux register offset. |
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177 | 175 | * This register contains the mux. |
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.. | .. |
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212 | 210 | .ad_ctrl_bit = adb, \ |
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213 | 211 | } |
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214 | 212 | |
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215 | | -/** |
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| 213 | +/* |
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216 | 214 | * struct atlas7_pad_status - Atlas7 Pad status |
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217 | 215 | */ |
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218 | 216 | struct atlas7_pad_status { |
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.. | .. |
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354 | 352 | int nbank; |
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355 | 353 | raw_spinlock_t lock; |
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356 | 354 | struct gpio_chip chip; |
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357 | | - struct atlas7_gpio_bank banks[0]; |
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| 355 | + struct atlas7_gpio_bank banks[]; |
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358 | 356 | }; |
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359 | 357 | |
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360 | | -/** |
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361 | | - * @dev: a pointer back to containing device |
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362 | | - * @virtbase: the offset to the controller in virtual memory |
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363 | | - */ |
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364 | 358 | struct atlas7_pmx { |
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365 | 359 | struct device *dev; |
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366 | 360 | struct pinctrl_dev *pctl; |
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.. | .. |
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378 | 372 | * refer to A7DA IO Summary - CS-314158-DD-4E.xls |
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379 | 373 | */ |
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380 | 374 | |
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381 | | -/*Pads in IOC RTC & TOP */ |
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| 375 | +/* Pads in IOC RTC & TOP */ |
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382 | 376 | static const struct pinctrl_pin_desc atlas7_ioc_pads[] = { |
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383 | 377 | /* RTC PADs */ |
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384 | 378 | PINCTRL_PIN(0, "rtc_gpio_0"), |
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.. | .. |
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4783 | 4777 | |
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4784 | 4778 | /** |
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4785 | 4779 | * struct atlas7_pull_info - Atlas7 Pad pull info |
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4786 | | - * @type:The type of this Pad. |
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4787 | | - * @mask:The mas value of this pin's pull bits. |
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4788 | | - * @v2s: The map of pull register value to pull status. |
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4789 | | - * @s2v: The map of pull status to pull register value. |
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| 4780 | + * @pad_type: The type of this Pad. |
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| 4781 | + * @mask: The mas value of this pin's pull bits. |
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| 4782 | + * @v2s: The map of pull register value to pull status. |
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| 4783 | + * @s2v: The map of pull status to pull register value. |
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4790 | 4784 | */ |
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4791 | 4785 | struct atlas7_pull_info { |
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4792 | 4786 | u8 pad_type; |
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.. | .. |
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4910 | 4904 | * @type: The type of this Pad. |
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4911 | 4905 | * @mask: The mask value of this pin's pull bits. |
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4912 | 4906 | * @imval: The immediate value of drives trength register. |
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| 4907 | + * @reserved: Reserved space |
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4913 | 4908 | */ |
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4914 | 4909 | struct atlas7_ds_info { |
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4915 | 4910 | u8 type; |
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.. | .. |
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5540 | 5535 | { |
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5541 | 5536 | struct atlas7_pmx *pmx = dev_get_drvdata(dev); |
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5542 | 5537 | struct atlas7_pad_status *status; |
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5543 | | - struct atlas7_pad_config *conf; |
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5544 | 5538 | int idx; |
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5545 | | - u32 bank; |
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5546 | 5539 | |
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5547 | 5540 | for (idx = 0; idx < pmx->pctl_desc.npins; idx++) { |
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5548 | 5541 | /* Get this Pad's descriptor from PINCTRL */ |
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5549 | | - conf = &pmx->pctl_data->confs[idx]; |
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5550 | | - bank = atlas7_pin_to_bank(idx); |
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5551 | 5542 | status = &pmx->sleep_data[idx]; |
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5552 | 5543 | |
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5553 | 5544 | /* Restore Function selector */ |
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.. | .. |
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5615 | 5606 | arch_initcall(atlas7_pinmux_init); |
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5616 | 5607 | |
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5617 | 5608 | |
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5618 | | -/** |
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| 5609 | +/* |
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5619 | 5610 | * The Following is GPIO Code |
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5620 | 5611 | */ |
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5621 | 5612 | static inline struct |
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.. | .. |
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6002 | 5993 | struct gpio_chip *chip; |
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6003 | 5994 | u32 nbank; |
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6004 | 5995 | int ret, idx; |
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| 5996 | + struct gpio_irq_chip *girq; |
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6005 | 5997 | |
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6006 | 5998 | ret = of_property_read_u32(np, "gpio-banks", &nbank); |
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6007 | 5999 | if (ret) { |
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.. | .. |
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6012 | 6004 | } |
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6013 | 6005 | |
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6014 | 6006 | /* retrieve gpio descriptor data */ |
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6015 | | - a7gc = devm_kzalloc(&pdev->dev, sizeof(*a7gc) + |
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6016 | | - sizeof(struct atlas7_gpio_bank) * nbank, GFP_KERNEL); |
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| 6007 | + a7gc = devm_kzalloc(&pdev->dev, struct_size(a7gc, banks, nbank), |
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| 6008 | + GFP_KERNEL); |
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6017 | 6009 | if (!a7gc) |
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6018 | 6010 | return -ENOMEM; |
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6019 | 6011 | |
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.. | .. |
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6054 | 6046 | chip->of_gpio_n_cells = 2; |
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6055 | 6047 | chip->parent = &pdev->dev; |
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6056 | 6048 | |
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6057 | | - /* Add gpio chip to system */ |
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6058 | | - ret = gpiochip_add_data(chip, a7gc); |
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6059 | | - if (ret) { |
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6060 | | - dev_err(&pdev->dev, |
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6061 | | - "%s: error in probe function with status %d\n", |
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6062 | | - np->name, ret); |
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6063 | | - goto failed; |
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6064 | | - } |
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6065 | | - |
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6066 | | - /* Add gpio chip to irq subsystem */ |
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6067 | | - ret = gpiochip_irqchip_add(chip, &atlas7_gpio_irq_chip, |
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6068 | | - 0, handle_level_irq, IRQ_TYPE_NONE); |
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6069 | | - if (ret) { |
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6070 | | - dev_err(&pdev->dev, |
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6071 | | - "could not connect irqchip to gpiochip\n"); |
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6072 | | - goto failed; |
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6073 | | - } |
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6074 | | - |
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| 6049 | + girq = &chip->irq; |
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| 6050 | + girq->chip = &atlas7_gpio_irq_chip; |
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| 6051 | + girq->parent_handler = atlas7_gpio_handle_irq; |
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| 6052 | + girq->num_parents = nbank; |
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| 6053 | + girq->parents = devm_kcalloc(&pdev->dev, nbank, |
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| 6054 | + sizeof(*girq->parents), |
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| 6055 | + GFP_KERNEL); |
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| 6056 | + if (!girq->parents) |
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| 6057 | + return -ENOMEM; |
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6075 | 6058 | for (idx = 0; idx < nbank; idx++) { |
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6076 | 6059 | struct atlas7_gpio_bank *bank; |
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6077 | 6060 | |
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.. | .. |
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6090 | 6073 | goto failed; |
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6091 | 6074 | } |
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6092 | 6075 | bank->irq = ret; |
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| 6076 | + girq->parents[idx] = ret; |
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| 6077 | + } |
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| 6078 | + girq->default_type = IRQ_TYPE_NONE; |
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| 6079 | + girq->handler = handle_level_irq; |
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6093 | 6080 | |
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6094 | | - gpiochip_set_chained_irqchip(chip, &atlas7_gpio_irq_chip, |
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6095 | | - bank->irq, atlas7_gpio_handle_irq); |
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| 6081 | + /* Add gpio chip to system */ |
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| 6082 | + ret = gpiochip_add_data(chip, a7gc); |
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| 6083 | + if (ret) { |
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| 6084 | + dev_err(&pdev->dev, |
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| 6085 | + "%pOF: error in probe function with status %d\n", |
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| 6086 | + np, ret); |
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| 6087 | + goto failed; |
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6096 | 6088 | } |
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6097 | 6089 | |
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6098 | 6090 | platform_set_drvdata(pdev, a7gc); |
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