forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/pinctrl/intel/pinctrl-broxton.c
....@@ -6,17 +6,18 @@
66 * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
77 */
88
9
-#include <linux/acpi.h>
9
+#include <linux/mod_devicetable.h>
1010 #include <linux/module.h>
1111 #include <linux/platform_device.h>
12
-#include <linux/pm.h>
12
+
1313 #include <linux/pinctrl/pinctrl.h>
1414
1515 #include "pinctrl-intel.h"
1616
1717 #define BXT_PAD_OWN 0x020
18
-#define BXT_HOSTSW_OWN 0x080
1918 #define BXT_PADCFGLOCK 0x060
19
+#define BXT_HOSTSW_OWN 0x080
20
+#define BXT_GPI_IS 0x100
2021 #define BXT_GPI_IE 0x110
2122
2223 #define BXT_COMMUNITY(s, e) \
....@@ -24,6 +25,7 @@
2425 .padown_offset = BXT_PAD_OWN, \
2526 .padcfglock_offset = BXT_PADCFGLOCK, \
2627 .hostown_offset = BXT_HOSTSW_OWN, \
28
+ .is_offset = BXT_GPI_IS, \
2729 .ie_offset = BXT_GPI_IE, \
2830 .gpp_size = 32, \
2931 .pin_base = (s), \
....@@ -117,17 +119,17 @@
117119 PINCTRL_PIN(82, "TDO"),
118120 };
119121
120
-static const unsigned bxt_north_pwm0_pins[] = { 34 };
121
-static const unsigned bxt_north_pwm1_pins[] = { 35 };
122
-static const unsigned bxt_north_pwm2_pins[] = { 36 };
123
-static const unsigned bxt_north_pwm3_pins[] = { 37 };
124
-static const unsigned bxt_north_uart0_pins[] = { 38, 39, 40, 41 };
125
-static const unsigned bxt_north_uart1_pins[] = { 42, 43, 44, 45 };
126
-static const unsigned bxt_north_uart2_pins[] = { 46, 47, 48, 49 };
127
-static const unsigned bxt_north_uart0b_pins[] = { 50, 51, 52, 53 };
128
-static const unsigned bxt_north_uart1b_pins[] = { 54, 55, 56, 57 };
129
-static const unsigned bxt_north_uart2b_pins[] = { 58, 59, 60, 61 };
130
-static const unsigned bxt_north_uart3_pins[] = { 58, 59, 60, 61 };
122
+static const unsigned int bxt_north_pwm0_pins[] = { 34 };
123
+static const unsigned int bxt_north_pwm1_pins[] = { 35 };
124
+static const unsigned int bxt_north_pwm2_pins[] = { 36 };
125
+static const unsigned int bxt_north_pwm3_pins[] = { 37 };
126
+static const unsigned int bxt_north_uart0_pins[] = { 38, 39, 40, 41 };
127
+static const unsigned int bxt_north_uart1_pins[] = { 42, 43, 44, 45 };
128
+static const unsigned int bxt_north_uart2_pins[] = { 46, 47, 48, 49 };
129
+static const unsigned int bxt_north_uart0b_pins[] = { 50, 51, 52, 53 };
130
+static const unsigned int bxt_north_uart1b_pins[] = { 54, 55, 56, 57 };
131
+static const unsigned int bxt_north_uart2b_pins[] = { 58, 59, 60, 61 };
132
+static const unsigned int bxt_north_uart3_pins[] = { 58, 59, 60, 61 };
131133
132134 static const struct intel_pingroup bxt_north_groups[] = {
133135 PIN_GROUP("pwm0_grp", bxt_north_pwm0_pins, 1),
....@@ -260,12 +262,12 @@
260262 PINCTRL_PIN(71, "GP_SSP_2_TXD"),
261263 };
262264
263
-static const unsigned bxt_northwest_ssp0_pins[] = { 53, 54, 55, 56, 57, 58 };
264
-static const unsigned bxt_northwest_ssp1_pins[] = {
265
+static const unsigned int bxt_northwest_ssp0_pins[] = { 53, 54, 55, 56, 57, 58 };
266
+static const unsigned int bxt_northwest_ssp1_pins[] = {
265267 59, 60, 61, 62, 63, 64, 65
266268 };
267
-static const unsigned bxt_northwest_ssp2_pins[] = { 66, 67, 68, 69, 70, 71 };
268
-static const unsigned bxt_northwest_uart3_pins[] = { 67, 68, 69, 70 };
269
+static const unsigned int bxt_northwest_ssp2_pins[] = { 66, 67, 68, 69, 70, 71 };
270
+static const unsigned int bxt_northwest_uart3_pins[] = { 67, 68, 69, 70 };
269271
270272 static const struct intel_pingroup bxt_northwest_groups[] = {
271273 PIN_GROUP("ssp0_grp", bxt_northwest_ssp0_pins, 1),
....@@ -347,17 +349,17 @@
347349 PINCTRL_PIN(41, "OSC_CLK_OUT_3"),
348350 };
349351
350
-static const unsigned bxt_west_i2c0_pins[] = { 0, 1 };
351
-static const unsigned bxt_west_i2c1_pins[] = { 2, 3 };
352
-static const unsigned bxt_west_i2c2_pins[] = { 4, 5 };
353
-static const unsigned bxt_west_i2c3_pins[] = { 6, 7 };
354
-static const unsigned bxt_west_i2c4_pins[] = { 8, 9 };
355
-static const unsigned bxt_west_i2c5_pins[] = { 10, 11 };
356
-static const unsigned bxt_west_i2c6_pins[] = { 12, 13 };
357
-static const unsigned bxt_west_i2c7_pins[] = { 14, 15 };
358
-static const unsigned bxt_west_i2c5b_pins[] = { 16, 17 };
359
-static const unsigned bxt_west_i2c6b_pins[] = { 18, 19 };
360
-static const unsigned bxt_west_i2c7b_pins[] = { 20, 21 };
352
+static const unsigned int bxt_west_i2c0_pins[] = { 0, 1 };
353
+static const unsigned int bxt_west_i2c1_pins[] = { 2, 3 };
354
+static const unsigned int bxt_west_i2c2_pins[] = { 4, 5 };
355
+static const unsigned int bxt_west_i2c3_pins[] = { 6, 7 };
356
+static const unsigned int bxt_west_i2c4_pins[] = { 8, 9 };
357
+static const unsigned int bxt_west_i2c5_pins[] = { 10, 11 };
358
+static const unsigned int bxt_west_i2c6_pins[] = { 12, 13 };
359
+static const unsigned int bxt_west_i2c7_pins[] = { 14, 15 };
360
+static const unsigned int bxt_west_i2c5b_pins[] = { 16, 17 };
361
+static const unsigned int bxt_west_i2c6b_pins[] = { 18, 19 };
362
+static const unsigned int bxt_west_i2c7b_pins[] = { 20, 21 };
361363
362364 static const struct intel_pingroup bxt_west_groups[] = {
363365 PIN_GROUP("i2c0_grp", bxt_west_i2c0_pins, 1),
....@@ -443,13 +445,13 @@
443445 PINCTRL_PIN(30, "SDCARD_LVL_WP"),
444446 };
445447
446
-static const unsigned bxt_southwest_emmc0_pins[] = {
448
+static const unsigned int bxt_southwest_emmc0_pins[] = {
447449 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 26,
448450 };
449
-static const unsigned bxt_southwest_sdio_pins[] = {
451
+static const unsigned int bxt_southwest_sdio_pins[] = {
450452 10, 11, 12, 13, 14, 15, 27,
451453 };
452
-static const unsigned bxt_southwest_sdcard_pins[] = {
454
+static const unsigned int bxt_southwest_sdcard_pins[] = {
453455 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 28, 29, 30,
454456 };
455457
....@@ -526,7 +528,7 @@
526528 &bxt_west_soc_data,
527529 &bxt_southwest_soc_data,
528530 &bxt_south_soc_data,
529
- NULL,
531
+ NULL
530532 };
531533
532534 /* APL */
....@@ -611,13 +613,13 @@
611613 PINCTRL_PIN(77, "SVID0_CLK"),
612614 };
613615
614
-static const unsigned apl_north_pwm0_pins[] = { 34 };
615
-static const unsigned apl_north_pwm1_pins[] = { 35 };
616
-static const unsigned apl_north_pwm2_pins[] = { 36 };
617
-static const unsigned apl_north_pwm3_pins[] = { 37 };
618
-static const unsigned apl_north_uart0_pins[] = { 38, 39, 40, 41 };
619
-static const unsigned apl_north_uart1_pins[] = { 42, 43, 44, 45 };
620
-static const unsigned apl_north_uart2_pins[] = { 46, 47, 48, 49 };
616
+static const unsigned int apl_north_pwm0_pins[] = { 34 };
617
+static const unsigned int apl_north_pwm1_pins[] = { 35 };
618
+static const unsigned int apl_north_pwm2_pins[] = { 36 };
619
+static const unsigned int apl_north_pwm3_pins[] = { 37 };
620
+static const unsigned int apl_north_uart0_pins[] = { 38, 39, 40, 41 };
621
+static const unsigned int apl_north_uart1_pins[] = { 42, 43, 44, 45 };
622
+static const unsigned int apl_north_uart2_pins[] = { 46, 47, 48, 49 };
621623
622624 static const struct intel_pingroup apl_north_groups[] = {
623625 PIN_GROUP("pwm0_grp", apl_north_pwm0_pins, 1),
....@@ -743,10 +745,10 @@
743745 PINCTRL_PIN(76, "GP_SSP_2_TXD"),
744746 };
745747
746
-static const unsigned apl_northwest_ssp0_pins[] = { 61, 62, 63, 64, 65 };
747
-static const unsigned apl_northwest_ssp1_pins[] = { 66, 67, 68, 69, 70 };
748
-static const unsigned apl_northwest_ssp2_pins[] = { 71, 72, 73, 74, 75, 76 };
749
-static const unsigned apl_northwest_uart3_pins[] = { 67, 68, 69, 70 };
748
+static const unsigned int apl_northwest_ssp0_pins[] = { 61, 62, 63, 64, 65 };
749
+static const unsigned int apl_northwest_ssp1_pins[] = { 66, 67, 68, 69, 70 };
750
+static const unsigned int apl_northwest_ssp2_pins[] = { 71, 72, 73, 74, 75, 76 };
751
+static const unsigned int apl_northwest_uart3_pins[] = { 67, 68, 69, 70 };
750752
751753 static const struct intel_pingroup apl_northwest_groups[] = {
752754 PIN_GROUP("ssp0_grp", apl_northwest_ssp0_pins, 1),
....@@ -833,15 +835,15 @@
833835 PINCTRL_PIN(46, "SUSPWRDNACK"),
834836 };
835837
836
-static const unsigned apl_west_i2c0_pins[] = { 0, 1 };
837
-static const unsigned apl_west_i2c1_pins[] = { 2, 3 };
838
-static const unsigned apl_west_i2c2_pins[] = { 4, 5 };
839
-static const unsigned apl_west_i2c3_pins[] = { 6, 7 };
840
-static const unsigned apl_west_i2c4_pins[] = { 8, 9 };
841
-static const unsigned apl_west_i2c5_pins[] = { 10, 11 };
842
-static const unsigned apl_west_i2c6_pins[] = { 12, 13 };
843
-static const unsigned apl_west_i2c7_pins[] = { 14, 15 };
844
-static const unsigned apl_west_uart2_pins[] = { 20, 21, 22, 34 };
838
+static const unsigned int apl_west_i2c0_pins[] = { 0, 1 };
839
+static const unsigned int apl_west_i2c1_pins[] = { 2, 3 };
840
+static const unsigned int apl_west_i2c2_pins[] = { 4, 5 };
841
+static const unsigned int apl_west_i2c3_pins[] = { 6, 7 };
842
+static const unsigned int apl_west_i2c4_pins[] = { 8, 9 };
843
+static const unsigned int apl_west_i2c5_pins[] = { 10, 11 };
844
+static const unsigned int apl_west_i2c6_pins[] = { 12, 13 };
845
+static const unsigned int apl_west_i2c7_pins[] = { 14, 15 };
846
+static const unsigned int apl_west_uart2_pins[] = { 20, 21, 22, 34 };
845847
846848 static const struct intel_pingroup apl_west_groups[] = {
847849 PIN_GROUP("i2c0_grp", apl_west_i2c0_pins, 1),
....@@ -939,16 +941,16 @@
939941 PINCTRL_PIN(42, "LPC_FRAMEB"),
940942 };
941943
942
-static const unsigned apl_southwest_emmc0_pins[] = {
944
+static const unsigned int apl_southwest_emmc0_pins[] = {
943945 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 29,
944946 };
945
-static const unsigned apl_southwest_sdio_pins[] = {
947
+static const unsigned int apl_southwest_sdio_pins[] = {
946948 14, 15, 16, 17, 18, 19, 30,
947949 };
948
-static const unsigned apl_southwest_sdcard_pins[] = {
950
+static const unsigned int apl_southwest_sdcard_pins[] = {
949951 20, 21, 22, 23, 24, 25, 26, 27, 28,
950952 };
951
-static const unsigned apl_southwest_i2c7_pins[] = { 32, 33 };
953
+static const unsigned int apl_southwest_i2c7_pins[] = { 32, 33 };
952954
953955 static const struct intel_pingroup apl_southwest_groups[] = {
954956 PIN_GROUP("emmc0_grp", apl_southwest_emmc0_pins, 1),
....@@ -990,7 +992,7 @@
990992 &apl_northwest_soc_data,
991993 &apl_west_soc_data,
992994 &apl_southwest_soc_data,
993
- NULL,
995
+ NULL
994996 };
995997
996998 static const struct acpi_device_id bxt_pinctrl_acpi_match[] = {
....@@ -1003,58 +1005,13 @@
10031005 static const struct platform_device_id bxt_pinctrl_platform_ids[] = {
10041006 { "apollolake-pinctrl", (kernel_ulong_t)apl_pinctrl_soc_data },
10051007 { "broxton-pinctrl", (kernel_ulong_t)bxt_pinctrl_soc_data },
1006
- { },
1008
+ { }
10071009 };
10081010
1009
-static int bxt_pinctrl_probe(struct platform_device *pdev)
1010
-{
1011
- const struct intel_pinctrl_soc_data *soc_data = NULL;
1012
- const struct intel_pinctrl_soc_data **soc_table;
1013
- struct acpi_device *adev;
1014
- int i;
1015
-
1016
- adev = ACPI_COMPANION(&pdev->dev);
1017
- if (adev) {
1018
- const struct acpi_device_id *id;
1019
-
1020
- id = acpi_match_device(bxt_pinctrl_acpi_match, &pdev->dev);
1021
- if (!id)
1022
- return -ENODEV;
1023
-
1024
- soc_table = (const struct intel_pinctrl_soc_data **)
1025
- id->driver_data;
1026
-
1027
- for (i = 0; soc_table[i]; i++) {
1028
- if (!strcmp(adev->pnp.unique_id, soc_table[i]->uid)) {
1029
- soc_data = soc_table[i];
1030
- break;
1031
- }
1032
- }
1033
- } else {
1034
- const struct platform_device_id *pid;
1035
-
1036
- pid = platform_get_device_id(pdev);
1037
- if (!pid)
1038
- return -ENODEV;
1039
-
1040
- soc_table = (const struct intel_pinctrl_soc_data **)
1041
- pid->driver_data;
1042
- soc_data = soc_table[pdev->id];
1043
- }
1044
-
1045
- if (!soc_data)
1046
- return -ENODEV;
1047
-
1048
- return intel_pinctrl_probe(pdev, soc_data);
1049
-}
1050
-
1051
-static const struct dev_pm_ops bxt_pinctrl_pm_ops = {
1052
- SET_LATE_SYSTEM_SLEEP_PM_OPS(intel_pinctrl_suspend,
1053
- intel_pinctrl_resume)
1054
-};
1011
+static INTEL_PINCTRL_PM_OPS(bxt_pinctrl_pm_ops);
10551012
10561013 static struct platform_driver bxt_pinctrl_driver = {
1057
- .probe = bxt_pinctrl_probe,
1014
+ .probe = intel_pinctrl_probe_by_uid,
10581015 .driver = {
10591016 .name = "broxton-pinctrl",
10601017 .acpi_match_table = bxt_pinctrl_acpi_match,