forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/pinctrl/freescale/pinctrl-imx.h
....@@ -17,22 +17,44 @@
1717 struct platform_device;
1818
1919 extern struct pinmux_ops imx_pmx_ops;
20
+extern const struct dev_pm_ops imx_pinctrl_pm_ops;
2021
2122 /**
22
- * struct imx_pin - describes a single i.MX pin
23
- * @pin: the pin_id of this pin
23
+ * struct imx_pin_mmio - MMIO pin configurations
2424 * @mux_mode: the mux mode for this pin.
2525 * @input_reg: the select input register offset for this pin if any
2626 * 0 if no select input setting needed.
2727 * @input_val: the select input value for this pin.
2828 * @configs: the config for this pin.
2929 */
30
-struct imx_pin {
31
- unsigned int pin;
30
+struct imx_pin_mmio {
3231 unsigned int mux_mode;
3332 u16 input_reg;
3433 unsigned int input_val;
3534 unsigned long config;
35
+};
36
+
37
+/**
38
+ * struct imx_pin_scu - SCU pin configurations
39
+ * @mux: the mux mode for this pin.
40
+ * @configs: the config for this pin.
41
+ */
42
+struct imx_pin_scu {
43
+ unsigned int mux_mode;
44
+ unsigned long config;
45
+};
46
+
47
+/**
48
+ * struct imx_pin - describes a single i.MX pin
49
+ * @pin: the pin_id of this pin
50
+ * @conf: config type of this pin, either mmio or scu
51
+ */
52
+struct imx_pin {
53
+ unsigned int pin;
54
+ union {
55
+ struct imx_pin_mmio mmio;
56
+ struct imx_pin_scu scu;
57
+ } conf;
3658 };
3759
3860 /**
....@@ -51,6 +73,21 @@
5173 u32 mask;
5274 u8 shift;
5375 bool invert;
76
+};
77
+
78
+/**
79
+ * @dev: a pointer back to containing device
80
+ * @base: the offset to the controller in virtual memory
81
+ */
82
+struct imx_pinctrl {
83
+ struct device *dev;
84
+ struct pinctrl_dev *pctl;
85
+ void __iomem *base;
86
+ void __iomem *input_sel_base;
87
+ const struct imx_pinctrl_soc_info *info;
88
+ struct imx_pin_reg *pin_regs;
89
+ unsigned int group_index;
90
+ struct mutex mutex;
5491 };
5592
5693 struct imx_pinctrl_soc_info {
....@@ -76,21 +113,13 @@
76113 struct pinctrl_gpio_range *range,
77114 unsigned offset,
78115 bool input);
79
-};
80
-
81
-/**
82
- * @dev: a pointer back to containing device
83
- * @base: the offset to the controller in virtual memory
84
- */
85
-struct imx_pinctrl {
86
- struct device *dev;
87
- struct pinctrl_dev *pctl;
88
- void __iomem *base;
89
- void __iomem *input_sel_base;
90
- const struct imx_pinctrl_soc_info *info;
91
- struct imx_pin_reg *pin_regs;
92
- unsigned int group_index;
93
- struct mutex mutex;
116
+ int (*imx_pinconf_get)(struct pinctrl_dev *pctldev, unsigned int pin_id,
117
+ unsigned long *config);
118
+ int (*imx_pinconf_set)(struct pinctrl_dev *pctldev, unsigned int pin_id,
119
+ unsigned long *configs, unsigned int num_configs);
120
+ void (*imx_pinctrl_parse_pin)(struct imx_pinctrl *ipctl,
121
+ unsigned int *pin_id, struct imx_pin *pin,
122
+ const __be32 **list_p);
94123 };
95124
96125 #define IMX_CFG_PARAMS_DECODE(p, m, o) \
....@@ -99,8 +128,9 @@
99128 #define IMX_CFG_PARAMS_DECODE_INVERT(p, m, o) \
100129 { .param = p, .mask = m, .shift = o, .invert = true, }
101130
102
-#define SHARE_MUX_CONF_REG 0x1
103
-#define ZERO_OFFSET_VALID 0x2
131
+#define SHARE_MUX_CONF_REG BIT(0)
132
+#define ZERO_OFFSET_VALID BIT(1)
133
+#define IMX_USE_SCU BIT(2)
104134
105135 #define NO_MUX 0x0
106136 #define NO_PAD 0x0
....@@ -113,4 +143,17 @@
113143
114144 int imx_pinctrl_probe(struct platform_device *pdev,
115145 const struct imx_pinctrl_soc_info *info);
146
+
147
+#define BM_PAD_CTL_GP_ENABLE BIT(30)
148
+#define BM_PAD_CTL_IFMUX_ENABLE BIT(31)
149
+#define BP_PAD_CTL_IFMUX 27
150
+
151
+int imx_pinctrl_sc_ipc_init(struct platform_device *pdev);
152
+int imx_pinconf_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
153
+ unsigned long *config);
154
+int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
155
+ unsigned long *configs, unsigned num_configs);
156
+void imx_pinctrl_parse_pin_scu(struct imx_pinctrl *ipctl,
157
+ unsigned int *pin_id, struct imx_pin *pin,
158
+ const __be32 **list_p);
116159 #endif /* __DRIVERS_PINCTRL_IMX_H */