~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,10 +1,6 @@
	1	+// SPDX-License-Identifier: GPL-2.0-or-later
1	2	/*
2	3	* Copyright (C) 2016 IBM Corp.
3		- *
4		- * This program is free software; you can redistribute it and/or modify
5		- * it under the terms of the GNU General Public License as published by
6		- * the Free Software Foundation; either version 2 of the License, or
7		- * (at your option) any later version.
8	4	*/
9	5	#include <linux/bitops.h>
10	6	#include <linux/init.h>
..	..	@@ -25,6 +21,39 @@
25	21	#include "../pinctrl-utils.h"
26	22	#include "pinctrl-aspeed.h"
27	23
	24	+/* Wrap some of the common macros for clarity */
	25	+#define SIG_EXPR_DECL_SINGLE(sig, func, ...) \
	26	+ SIG_EXPR_DECL(sig, func, func, __VA_ARGS__)
	27	+
	28	+#define SIG_EXPR_LIST_DECL_SINGLE SIG_EXPR_LIST_DECL_SESG
	29	+#define SIG_EXPR_LIST_DECL_DUAL SIG_EXPR_LIST_DECL_DESG
	30	+
	31	+/*
	32	+ * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
	33	+ * references registers by the device/offset mnemonic. The register macros
	34	+ * below are named the same way to ease transcription and verification (as
	35	+ * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
	36	+ * reference registers beyond those dedicated to pinmux, such as the system
	37	+ * reset control and MAC clock configuration registers. The AST2500 goes a step
	38	+ * further and references registers in the graphics IP block.
	39	+ */
	40	+#define SCU2C 0x2C /* Misc. Control Register */
	41	+#define SCU3C 0x3C /* System Reset Control/Status Register */
	42	+#define SCU48 0x48 /* MAC Interface Clock Delay Setting */
	43	+#define HW_STRAP1 0x70 /* AST2400 strapping is 33 bits, is split */
	44	+#define HW_REVISION_ID 0x7C /* Silicon revision ID register */
	45	+#define SCU80 0x80 /* Multi-function Pin Control #1 */
	46	+#define SCU84 0x84 /* Multi-function Pin Control #2 */
	47	+#define SCU88 0x88 /* Multi-function Pin Control #3 */
	48	+#define SCU8C 0x8C /* Multi-function Pin Control #4 */
	49	+#define SCU90 0x90 /* Multi-function Pin Control #5 */
	50	+#define SCU94 0x94 /* Multi-function Pin Control #6 */
	51	+#define SCUA0 0xA0 /* Multi-function Pin Control #7 */
	52	+#define SCUA4 0xA4 /* Multi-function Pin Control #8 */
	53	+#define SCUA8 0xA8 /* Multi-function Pin Control #9 */
	54	+#define SCUAC 0xAC /* Multi-function Pin Control #10 */
	55	+#define HW_STRAP2 0xD0 /* Strapping */
	56	+
28	57	#define ASPEED_G5_NR_PINS 236
29	58
30	59	#define COND1 { ASPEED_IP_SCU, SCU90, BIT(6), 0, 0 }
..	..	@@ -41,9 +70,9 @@
41	70	SSSF_PIN_DECL(D14, GPIOA1, MAC2LINK, SIG_DESC_SET(SCU80, 1));
42	71
43	72	#define D13 2
44		-SIG_EXPR_LIST_DECL_SINGLE(SPI1CS1, SPI1CS1, SIG_DESC_SET(SCU80, 15));
45		-SIG_EXPR_LIST_DECL_SINGLE(TIMER3, TIMER3, SIG_DESC_SET(SCU80, 2));
46		-MS_PIN_DECL(D13, GPIOA2, SPI1CS1, TIMER3);
	73	+SIG_EXPR_LIST_DECL_SINGLE(D13, SPI1CS1, SPI1CS1, SIG_DESC_SET(SCU80, 15));
	74	+SIG_EXPR_LIST_DECL_SINGLE(D13, TIMER3, TIMER3, SIG_DESC_SET(SCU80, 2));
	75	+PIN_DECL_2(D13, GPIOA2, SPI1CS1, TIMER3);
47	76	FUNC_GROUP_DECL(SPI1CS1, D13);
48	77	FUNC_GROUP_DECL(TIMER3, D13);
49	78
..	..	@@ -53,16 +82,16 @@
53	82	#define I2C9_DESC SIG_DESC_SET(SCU90, 22)
54	83
55	84	#define C14 4
56		-SIG_EXPR_LIST_DECL_SINGLE(SCL9, I2C9, I2C9_DESC, COND1);
57		-SIG_EXPR_LIST_DECL_SINGLE(TIMER5, TIMER5, SIG_DESC_SET(SCU80, 4), COND1);
58		-MS_PIN_DECL(C14, GPIOA4, SCL9, TIMER5);
	85	+SIG_EXPR_LIST_DECL_SINGLE(C14, SCL9, I2C9, I2C9_DESC, COND1);
	86	+SIG_EXPR_LIST_DECL_SINGLE(C14, TIMER5, TIMER5, SIG_DESC_SET(SCU80, 4), COND1);
	87	+PIN_DECL_2(C14, GPIOA4, SCL9, TIMER5);
59	88
60	89	FUNC_GROUP_DECL(TIMER5, C14);
61	90
62	91	#define A13 5
63		-SIG_EXPR_LIST_DECL_SINGLE(SDA9, I2C9, I2C9_DESC, COND1);
64		-SIG_EXPR_LIST_DECL_SINGLE(TIMER6, TIMER6, SIG_DESC_SET(SCU80, 5), COND1);
65		-MS_PIN_DECL(A13, GPIOA5, SDA9, TIMER6);
	92	+SIG_EXPR_LIST_DECL_SINGLE(A13, SDA9, I2C9, I2C9_DESC, COND1);
	93	+SIG_EXPR_LIST_DECL_SINGLE(A13, TIMER6, TIMER6, SIG_DESC_SET(SCU80, 5), COND1);
	94	+PIN_DECL_2(A13, GPIOA5, SDA9, TIMER6);
66	95
67	96	FUNC_GROUP_DECL(TIMER6, A13);
68	97
..	..	@@ -71,16 +100,16 @@
71	100	#define MDIO2_DESC SIG_DESC_SET(SCU90, 2)
72	101
73	102	#define C13 6
74		-SIG_EXPR_LIST_DECL_SINGLE(MDC2, MDIO2, MDIO2_DESC, COND1);
75		-SIG_EXPR_LIST_DECL_SINGLE(TIMER7, TIMER7, SIG_DESC_SET(SCU80, 6), COND1);
76		-MS_PIN_DECL(C13, GPIOA6, MDC2, TIMER7);
	103	+SIG_EXPR_LIST_DECL_SINGLE(C13, MDC2, MDIO2, MDIO2_DESC, COND1);
	104	+SIG_EXPR_LIST_DECL_SINGLE(C13, TIMER7, TIMER7, SIG_DESC_SET(SCU80, 6), COND1);
	105	+PIN_DECL_2(C13, GPIOA6, MDC2, TIMER7);
77	106
78	107	FUNC_GROUP_DECL(TIMER7, C13);
79	108
80	109	#define B13 7
81		-SIG_EXPR_LIST_DECL_SINGLE(MDIO2, MDIO2, MDIO2_DESC, COND1);
82		-SIG_EXPR_LIST_DECL_SINGLE(TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7), COND1);
83		-MS_PIN_DECL(B13, GPIOA7, MDIO2, TIMER8);
	110	+SIG_EXPR_LIST_DECL_SINGLE(B13, MDIO2, MDIO2, MDIO2_DESC, COND1);
	111	+SIG_EXPR_LIST_DECL_SINGLE(B13, TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7), COND1);
	112	+PIN_DECL_2(B13, GPIOA7, MDIO2, TIMER8);
84	113
85	114	FUNC_GROUP_DECL(TIMER8, B13);
86	115
..	..	@@ -103,9 +132,9 @@
103	132
104	133	#define H21 13
105	134	#define H21_DESC SIG_DESC_SET(SCU80, 13)
106		-SIG_EXPR_LIST_DECL_SINGLE(LPCPD, LPCPD, H21_DESC);
107		-SIG_EXPR_LIST_DECL_SINGLE(LPCSMI, LPCSMI, H21_DESC);
108		-MS_PIN_DECL(H21, GPIOB5, LPCPD, LPCSMI);
	135	+SIG_EXPR_LIST_DECL_SINGLE(H21, LPCPD, LPCPD, H21_DESC);
	136	+SIG_EXPR_LIST_DECL_SINGLE(H21, LPCSMI, LPCSMI, H21_DESC);
	137	+PIN_DECL_2(H21, GPIOB5, LPCPD, LPCSMI);
109	138	FUNC_GROUP_DECL(LPCPD, H21);
110	139	FUNC_GROUP_DECL(LPCSMI, H21);
111	140
..	..	@@ -119,53 +148,53 @@
119	148
120	149	#define C12 16
121	150	#define I2C10_DESC SIG_DESC_SET(SCU90, 23)
122		-SIG_EXPR_LIST_DECL_SINGLE(SD1CLK, SD1, SD1_DESC);
123		-SIG_EXPR_LIST_DECL_SINGLE(SCL10, I2C10, I2C10_DESC);
124		-MS_PIN_DECL(C12, GPIOC0, SD1CLK, SCL10);
	151	+SIG_EXPR_LIST_DECL_SINGLE(C12, SD1CLK, SD1, SD1_DESC);
	152	+SIG_EXPR_LIST_DECL_SINGLE(C12, SCL10, I2C10, I2C10_DESC);
	153	+PIN_DECL_2(C12, GPIOC0, SD1CLK, SCL10);
125	154
126	155	#define A12 17
127		-SIG_EXPR_LIST_DECL_SINGLE(SD1CMD, SD1, SD1_DESC);
128		-SIG_EXPR_LIST_DECL_SINGLE(SDA10, I2C10, I2C10_DESC);
129		-MS_PIN_DECL(A12, GPIOC1, SD1CMD, SDA10);
	156	+SIG_EXPR_LIST_DECL_SINGLE(A12, SD1CMD, SD1, SD1_DESC);
	157	+SIG_EXPR_LIST_DECL_SINGLE(A12, SDA10, I2C10, I2C10_DESC);
	158	+PIN_DECL_2(A12, GPIOC1, SD1CMD, SDA10);
130	159
131	160	FUNC_GROUP_DECL(I2C10, C12, A12);
132	161
133	162	#define B12 18
134	163	#define I2C11_DESC SIG_DESC_SET(SCU90, 24)
135		-SIG_EXPR_LIST_DECL_SINGLE(SD1DAT0, SD1, SD1_DESC);
136		-SIG_EXPR_LIST_DECL_SINGLE(SCL11, I2C11, I2C11_DESC);
137		-MS_PIN_DECL(B12, GPIOC2, SD1DAT0, SCL11);
	164	+SIG_EXPR_LIST_DECL_SINGLE(B12, SD1DAT0, SD1, SD1_DESC);
	165	+SIG_EXPR_LIST_DECL_SINGLE(B12, SCL11, I2C11, I2C11_DESC);
	166	+PIN_DECL_2(B12, GPIOC2, SD1DAT0, SCL11);
138	167
139	168	#define D9 19
140		-SIG_EXPR_LIST_DECL_SINGLE(SD1DAT1, SD1, SD1_DESC);
141		-SIG_EXPR_LIST_DECL_SINGLE(SDA11, I2C11, I2C11_DESC);
142		-MS_PIN_DECL(D9, GPIOC3, SD1DAT1, SDA11);
	169	+SIG_EXPR_LIST_DECL_SINGLE(D9, SD1DAT1, SD1, SD1_DESC);
	170	+SIG_EXPR_LIST_DECL_SINGLE(D9, SDA11, I2C11, I2C11_DESC);
	171	+PIN_DECL_2(D9, GPIOC3, SD1DAT1, SDA11);
143	172
144	173	FUNC_GROUP_DECL(I2C11, B12, D9);
145	174
146	175	#define D10 20
147	176	#define I2C12_DESC SIG_DESC_SET(SCU90, 25)
148		-SIG_EXPR_LIST_DECL_SINGLE(SD1DAT2, SD1, SD1_DESC);
149		-SIG_EXPR_LIST_DECL_SINGLE(SCL12, I2C12, I2C12_DESC);
150		-MS_PIN_DECL(D10, GPIOC4, SD1DAT2, SCL12);
	177	+SIG_EXPR_LIST_DECL_SINGLE(D10, SD1DAT2, SD1, SD1_DESC);
	178	+SIG_EXPR_LIST_DECL_SINGLE(D10, SCL12, I2C12, I2C12_DESC);
	179	+PIN_DECL_2(D10, GPIOC4, SD1DAT2, SCL12);
151	180
152	181	#define E12 21
153		-SIG_EXPR_LIST_DECL_SINGLE(SD1DAT3, SD1, SD1_DESC);
154		-SIG_EXPR_LIST_DECL_SINGLE(SDA12, I2C12, I2C12_DESC);
155		-MS_PIN_DECL(E12, GPIOC5, SD1DAT3, SDA12);
	182	+SIG_EXPR_LIST_DECL_SINGLE(E12, SD1DAT3, SD1, SD1_DESC);
	183	+SIG_EXPR_LIST_DECL_SINGLE(E12, SDA12, I2C12, I2C12_DESC);
	184	+PIN_DECL_2(E12, GPIOC5, SD1DAT3, SDA12);
156	185
157	186	FUNC_GROUP_DECL(I2C12, D10, E12);
158	187
159	188	#define C11 22
160	189	#define I2C13_DESC SIG_DESC_SET(SCU90, 26)
161		-SIG_EXPR_LIST_DECL_SINGLE(SD1CD, SD1, SD1_DESC);
162		-SIG_EXPR_LIST_DECL_SINGLE(SCL13, I2C13, I2C13_DESC);
163		-MS_PIN_DECL(C11, GPIOC6, SD1CD, SCL13);
	190	+SIG_EXPR_LIST_DECL_SINGLE(C11, SD1CD, SD1, SD1_DESC);
	191	+SIG_EXPR_LIST_DECL_SINGLE(C11, SCL13, I2C13, I2C13_DESC);
	192	+PIN_DECL_2(C11, GPIOC6, SD1CD, SCL13);
164	193
165	194	#define B11 23
166		-SIG_EXPR_LIST_DECL_SINGLE(SD1WP, SD1, SD1_DESC);
167		-SIG_EXPR_LIST_DECL_SINGLE(SDA13, I2C13, I2C13_DESC);
168		-MS_PIN_DECL(B11, GPIOC7, SD1WP, SDA13);
	195	+SIG_EXPR_LIST_DECL_SINGLE(B11, SD1WP, SD1, SD1_DESC);
	196	+SIG_EXPR_LIST_DECL_SINGLE(B11, SDA13, I2C13, I2C13_DESC);
	197	+PIN_DECL_2(B11, GPIOC7, SD1WP, SDA13);
169	198
170	199	FUNC_GROUP_DECL(I2C13, C11, B11);
171	200	FUNC_GROUP_DECL(SD1, C12, A12, B12, D9, D10, E12, C11, B11);
..	..	@@ -175,72 +204,72 @@
175	204	#define GPID_DESC SIG_DESC_SET(HW_STRAP1, 21)
176	205
177	206	#define F19 24
178		-SIG_EXPR_LIST_DECL_SINGLE(SD2CLK, SD2, SD2_DESC);
179		-SIG_EXPR_DECL(GPID0IN, GPID0, GPID0_DESC);
180		-SIG_EXPR_DECL(GPID0IN, GPID, GPID_DESC);
181		-SIG_EXPR_LIST_DECL_DUAL(GPID0IN, GPID0, GPID);
182		-MS_PIN_DECL(F19, GPIOD0, SD2CLK, GPID0IN);
	207	+SIG_EXPR_LIST_DECL_SINGLE(F19, SD2CLK, SD2, SD2_DESC);
	208	+SIG_EXPR_DECL_SINGLE(GPID0IN, GPID0, GPID0_DESC);
	209	+SIG_EXPR_DECL_SINGLE(GPID0IN, GPID, GPID_DESC);
	210	+SIG_EXPR_LIST_DECL_DUAL(F19, GPID0IN, GPID0, GPID);
	211	+PIN_DECL_2(F19, GPIOD0, SD2CLK, GPID0IN);
183	212
184	213	#define E21 25
185		-SIG_EXPR_LIST_DECL_SINGLE(SD2CMD, SD2, SD2_DESC);
186		-SIG_EXPR_DECL(GPID0OUT, GPID0, GPID0_DESC);
187		-SIG_EXPR_DECL(GPID0OUT, GPID, GPID_DESC);
188		-SIG_EXPR_LIST_DECL_DUAL(GPID0OUT, GPID0, GPID);
189		-MS_PIN_DECL(E21, GPIOD1, SD2CMD, GPID0OUT);
	214	+SIG_EXPR_LIST_DECL_SINGLE(E21, SD2CMD, SD2, SD2_DESC);
	215	+SIG_EXPR_DECL_SINGLE(GPID0OUT, GPID0, GPID0_DESC);
	216	+SIG_EXPR_DECL_SINGLE(GPID0OUT, GPID, GPID_DESC);
	217	+SIG_EXPR_LIST_DECL_DUAL(E21, GPID0OUT, GPID0, GPID);
	218	+PIN_DECL_2(E21, GPIOD1, SD2CMD, GPID0OUT);
190	219
191	220	FUNC_GROUP_DECL(GPID0, F19, E21);
192	221
193	222	#define GPID2_DESC SIG_DESC_SET(SCU8C, 9)
194	223
195	224	#define F20 26
196		-SIG_EXPR_LIST_DECL_SINGLE(SD2DAT0, SD2, SD2_DESC);
197		-SIG_EXPR_DECL(GPID2IN, GPID2, GPID2_DESC);
198		-SIG_EXPR_DECL(GPID2IN, GPID, GPID_DESC);
199		-SIG_EXPR_LIST_DECL_DUAL(GPID2IN, GPID2, GPID);
200		-MS_PIN_DECL(F20, GPIOD2, SD2DAT0, GPID2IN);
	225	+SIG_EXPR_LIST_DECL_SINGLE(F20, SD2DAT0, SD2, SD2_DESC);
	226	+SIG_EXPR_DECL_SINGLE(GPID2IN, GPID2, GPID2_DESC);
	227	+SIG_EXPR_DECL_SINGLE(GPID2IN, GPID, GPID_DESC);
	228	+SIG_EXPR_LIST_DECL_DUAL(F20, GPID2IN, GPID2, GPID);
	229	+PIN_DECL_2(F20, GPIOD2, SD2DAT0, GPID2IN);
201	230
202	231	#define D20 27
203		-SIG_EXPR_LIST_DECL_SINGLE(SD2DAT1, SD2, SD2_DESC);
204		-SIG_EXPR_DECL(GPID2OUT, GPID2, GPID2_DESC);
205		-SIG_EXPR_DECL(GPID2OUT, GPID, GPID_DESC);
206		-SIG_EXPR_LIST_DECL_DUAL(GPID2OUT, GPID2, GPID);
207		-MS_PIN_DECL(D20, GPIOD3, SD2DAT1, GPID2OUT);
	232	+SIG_EXPR_LIST_DECL_SINGLE(D20, SD2DAT1, SD2, SD2_DESC);
	233	+SIG_EXPR_DECL_SINGLE(GPID2OUT, GPID2, GPID2_DESC);
	234	+SIG_EXPR_DECL_SINGLE(GPID2OUT, GPID, GPID_DESC);
	235	+SIG_EXPR_LIST_DECL_DUAL(D20, GPID2OUT, GPID2, GPID);
	236	+PIN_DECL_2(D20, GPIOD3, SD2DAT1, GPID2OUT);
208	237
209	238	FUNC_GROUP_DECL(GPID2, F20, D20);
210	239
211	240	#define GPID4_DESC SIG_DESC_SET(SCU8C, 10)
212	241
213	242	#define D21 28
214		-SIG_EXPR_LIST_DECL_SINGLE(SD2DAT2, SD2, SD2_DESC);
215		-SIG_EXPR_DECL(GPID4IN, GPID4, GPID4_DESC);
216		-SIG_EXPR_DECL(GPID4IN, GPID, GPID_DESC);
217		-SIG_EXPR_LIST_DECL_DUAL(GPID4IN, GPID4, GPID);
218		-MS_PIN_DECL(D21, GPIOD4, SD2DAT2, GPID4IN);
	243	+SIG_EXPR_LIST_DECL_SINGLE(D21, SD2DAT2, SD2, SD2_DESC);
	244	+SIG_EXPR_DECL_SINGLE(GPID4IN, GPID4, GPID4_DESC);
	245	+SIG_EXPR_DECL_SINGLE(GPID4IN, GPID, GPID_DESC);
	246	+SIG_EXPR_LIST_DECL_DUAL(D21, GPID4IN, GPID4, GPID);
	247	+PIN_DECL_2(D21, GPIOD4, SD2DAT2, GPID4IN);
219	248
220	249	#define E20 29
221		-SIG_EXPR_LIST_DECL_SINGLE(SD2DAT3, SD2, SD2_DESC);
222		-SIG_EXPR_DECL(GPID4OUT, GPID4, GPID4_DESC);
223		-SIG_EXPR_DECL(GPID4OUT, GPID, GPID_DESC);
224		-SIG_EXPR_LIST_DECL_DUAL(GPID4OUT, GPID4, GPID);
225		-MS_PIN_DECL(E20, GPIOD5, SD2DAT3, GPID4OUT);
	250	+SIG_EXPR_LIST_DECL_SINGLE(E20, SD2DAT3, SD2, SD2_DESC);
	251	+SIG_EXPR_DECL_SINGLE(GPID4OUT, GPID4, GPID4_DESC);
	252	+SIG_EXPR_DECL_SINGLE(GPID4OUT, GPID, GPID_DESC);
	253	+SIG_EXPR_LIST_DECL_DUAL(E20, GPID4OUT, GPID4, GPID);
	254	+PIN_DECL_2(E20, GPIOD5, SD2DAT3, GPID4OUT);
226	255
227	256	FUNC_GROUP_DECL(GPID4, D21, E20);
228	257
229	258	#define GPID6_DESC SIG_DESC_SET(SCU8C, 11)
230	259
231	260	#define G18 30
232		-SIG_EXPR_LIST_DECL_SINGLE(SD2CD, SD2, SD2_DESC);
233		-SIG_EXPR_DECL(GPID6IN, GPID6, GPID6_DESC);
234		-SIG_EXPR_DECL(GPID6IN, GPID, GPID_DESC);
235		-SIG_EXPR_LIST_DECL_DUAL(GPID6IN, GPID6, GPID);
236		-MS_PIN_DECL(G18, GPIOD6, SD2CD, GPID6IN);
	261	+SIG_EXPR_LIST_DECL_SINGLE(G18, SD2CD, SD2, SD2_DESC);
	262	+SIG_EXPR_DECL_SINGLE(GPID6IN, GPID6, GPID6_DESC);
	263	+SIG_EXPR_DECL_SINGLE(GPID6IN, GPID, GPID_DESC);
	264	+SIG_EXPR_LIST_DECL_DUAL(G18, GPID6IN, GPID6, GPID);
	265	+PIN_DECL_2(G18, GPIOD6, SD2CD, GPID6IN);
237	266
238	267	#define C21 31
239		-SIG_EXPR_LIST_DECL_SINGLE(SD2WP, SD2, SD2_DESC);
240		-SIG_EXPR_DECL(GPID6OUT, GPID6, GPID6_DESC);
241		-SIG_EXPR_DECL(GPID6OUT, GPID, GPID_DESC);
242		-SIG_EXPR_LIST_DECL_DUAL(GPID6OUT, GPID6, GPID);
243		-MS_PIN_DECL(C21, GPIOD7, SD2WP, GPID6OUT);
	268	+SIG_EXPR_LIST_DECL_SINGLE(C21, SD2WP, SD2, SD2_DESC);
	269	+SIG_EXPR_DECL_SINGLE(GPID6OUT, GPID6, GPID6_DESC);
	270	+SIG_EXPR_DECL_SINGLE(GPID6OUT, GPID, GPID_DESC);
	271	+SIG_EXPR_LIST_DECL_DUAL(C21, GPID6OUT, GPID6, GPID);
	272	+PIN_DECL_2(C21, GPIOD7, SD2WP, GPID6OUT);
244	273
245	274	FUNC_GROUP_DECL(GPID6, G18, C21);
246	275	FUNC_GROUP_DECL(SD2, F19, E21, F20, D20, D21, E20, G18, C21);
..	..	@@ -249,19 +278,19 @@
249	278	#define GPIE0_DESC SIG_DESC_SET(SCU8C, 12)
250	279
251	280	#define B20 32
252		-SIG_EXPR_LIST_DECL_SINGLE(NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16));
253		-SIG_EXPR_DECL(GPIE0IN, GPIE0, GPIE0_DESC);
254		-SIG_EXPR_DECL(GPIE0IN, GPIE, GPIE_DESC);
255		-SIG_EXPR_LIST_DECL_DUAL(GPIE0IN, GPIE0, GPIE);
256		-MS_PIN_DECL(B20, GPIOE0, NCTS3, GPIE0IN);
	281	+SIG_EXPR_LIST_DECL_SINGLE(B20, NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16));
	282	+SIG_EXPR_DECL_SINGLE(GPIE0IN, GPIE0, GPIE0_DESC);
	283	+SIG_EXPR_DECL_SINGLE(GPIE0IN, GPIE, GPIE_DESC);
	284	+SIG_EXPR_LIST_DECL_DUAL(B20, GPIE0IN, GPIE0, GPIE);
	285	+PIN_DECL_2(B20, GPIOE0, NCTS3, GPIE0IN);
257	286	FUNC_GROUP_DECL(NCTS3, B20);
258	287
259	288	#define C20 33
260		-SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17));
261		-SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC);
262		-SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC);
263		-SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE);
264		-MS_PIN_DECL(C20, GPIOE1, NDCD3, GPIE0OUT);
	289	+SIG_EXPR_LIST_DECL_SINGLE(C20, NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17));
	290	+SIG_EXPR_DECL_SINGLE(GPIE0OUT, GPIE0, GPIE0_DESC);
	291	+SIG_EXPR_DECL_SINGLE(GPIE0OUT, GPIE, GPIE_DESC);
	292	+SIG_EXPR_LIST_DECL_DUAL(C20, GPIE0OUT, GPIE0, GPIE);
	293	+PIN_DECL_2(C20, GPIOE1, NDCD3, GPIE0OUT);
265	294	FUNC_GROUP_DECL(NDCD3, C20);
266	295
267	296	FUNC_GROUP_DECL(GPIE0, B20, C20);
..	..	@@ -269,20 +298,20 @@
269	298	#define GPIE2_DESC SIG_DESC_SET(SCU8C, 13)
270	299
271	300	#define F18 34
272		-SIG_EXPR_LIST_DECL_SINGLE(NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18));
273		-SIG_EXPR_DECL(GPIE2IN, GPIE2, GPIE2_DESC);
274		-SIG_EXPR_DECL(GPIE2IN, GPIE, GPIE_DESC);
275		-SIG_EXPR_LIST_DECL_DUAL(GPIE2IN, GPIE2, GPIE);
276		-MS_PIN_DECL(F18, GPIOE2, NDSR3, GPIE2IN);
	301	+SIG_EXPR_LIST_DECL_SINGLE(F18, NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18));
	302	+SIG_EXPR_DECL_SINGLE(GPIE2IN, GPIE2, GPIE2_DESC);
	303	+SIG_EXPR_DECL_SINGLE(GPIE2IN, GPIE, GPIE_DESC);
	304	+SIG_EXPR_LIST_DECL_DUAL(F18, GPIE2IN, GPIE2, GPIE);
	305	+PIN_DECL_2(F18, GPIOE2, NDSR3, GPIE2IN);
277	306	FUNC_GROUP_DECL(NDSR3, F18);
278	307
279	308
280	309	#define F17 35
281		-SIG_EXPR_LIST_DECL_SINGLE(NRI3, NRI3, SIG_DESC_SET(SCU80, 19));
282		-SIG_EXPR_DECL(GPIE2OUT, GPIE2, GPIE2_DESC);
283		-SIG_EXPR_DECL(GPIE2OUT, GPIE, GPIE_DESC);
284		-SIG_EXPR_LIST_DECL_DUAL(GPIE2OUT, GPIE2, GPIE);
285		-MS_PIN_DECL(F17, GPIOE3, NRI3, GPIE2OUT);
	310	+SIG_EXPR_LIST_DECL_SINGLE(F17, NRI3, NRI3, SIG_DESC_SET(SCU80, 19));
	311	+SIG_EXPR_DECL_SINGLE(GPIE2OUT, GPIE2, GPIE2_DESC);
	312	+SIG_EXPR_DECL_SINGLE(GPIE2OUT, GPIE, GPIE_DESC);
	313	+SIG_EXPR_LIST_DECL_DUAL(F17, GPIE2OUT, GPIE2, GPIE);
	314	+PIN_DECL_2(F17, GPIOE3, NRI3, GPIE2OUT);
286	315	FUNC_GROUP_DECL(NRI3, F17);
287	316
288	317	FUNC_GROUP_DECL(GPIE2, F18, F17);
..	..	@@ -290,19 +319,19 @@
290	319	#define GPIE4_DESC SIG_DESC_SET(SCU8C, 14)
291	320
292	321	#define E18 36
293		-SIG_EXPR_LIST_DECL_SINGLE(NDTR3, NDTR3, SIG_DESC_SET(SCU80, 20));
294		-SIG_EXPR_DECL(GPIE4IN, GPIE4, GPIE4_DESC);
295		-SIG_EXPR_DECL(GPIE4IN, GPIE, GPIE_DESC);
296		-SIG_EXPR_LIST_DECL_DUAL(GPIE4IN, GPIE4, GPIE);
297		-MS_PIN_DECL(E18, GPIOE4, NDTR3, GPIE4IN);
	322	+SIG_EXPR_LIST_DECL_SINGLE(E18, NDTR3, NDTR3, SIG_DESC_SET(SCU80, 20));
	323	+SIG_EXPR_DECL_SINGLE(GPIE4IN, GPIE4, GPIE4_DESC);
	324	+SIG_EXPR_DECL_SINGLE(GPIE4IN, GPIE, GPIE_DESC);
	325	+SIG_EXPR_LIST_DECL_DUAL(E18, GPIE4IN, GPIE4, GPIE);
	326	+PIN_DECL_2(E18, GPIOE4, NDTR3, GPIE4IN);
298	327	FUNC_GROUP_DECL(NDTR3, E18);
299	328
300	329	#define D19 37
301		-SIG_EXPR_LIST_DECL_SINGLE(NRTS3, NRTS3, SIG_DESC_SET(SCU80, 21));
302		-SIG_EXPR_DECL(GPIE4OUT, GPIE4, GPIE4_DESC);
303		-SIG_EXPR_DECL(GPIE4OUT, GPIE, GPIE_DESC);
304		-SIG_EXPR_LIST_DECL_DUAL(GPIE4OUT, GPIE4, GPIE);
305		-MS_PIN_DECL(D19, GPIOE5, NRTS3, GPIE4OUT);
	330	+SIG_EXPR_LIST_DECL_SINGLE(D19, NRTS3, NRTS3, SIG_DESC_SET(SCU80, 21));
	331	+SIG_EXPR_DECL_SINGLE(GPIE4OUT, GPIE4, GPIE4_DESC);
	332	+SIG_EXPR_DECL_SINGLE(GPIE4OUT, GPIE, GPIE_DESC);
	333	+SIG_EXPR_LIST_DECL_DUAL(D19, GPIE4OUT, GPIE4, GPIE);
	334	+PIN_DECL_2(D19, GPIOE5, NRTS3, GPIE4OUT);
306	335	FUNC_GROUP_DECL(NRTS3, D19);
307	336
308	337	FUNC_GROUP_DECL(GPIE4, E18, D19);
..	..	@@ -310,19 +339,19 @@
310	339	#define GPIE6_DESC SIG_DESC_SET(SCU8C, 15)
311	340
312	341	#define A20 38
313		-SIG_EXPR_LIST_DECL_SINGLE(TXD3, TXD3, SIG_DESC_SET(SCU80, 22));
314		-SIG_EXPR_DECL(GPIE6IN, GPIE6, GPIE6_DESC);
315		-SIG_EXPR_DECL(GPIE6IN, GPIE, GPIE_DESC);
316		-SIG_EXPR_LIST_DECL_DUAL(GPIE6IN, GPIE6, GPIE);
317		-MS_PIN_DECL(A20, GPIOE6, TXD3, GPIE6IN);
	342	+SIG_EXPR_LIST_DECL_SINGLE(A20, TXD3, TXD3, SIG_DESC_SET(SCU80, 22));
	343	+SIG_EXPR_DECL_SINGLE(GPIE6IN, GPIE6, GPIE6_DESC);
	344	+SIG_EXPR_DECL_SINGLE(GPIE6IN, GPIE, GPIE_DESC);
	345	+SIG_EXPR_LIST_DECL_DUAL(A20, GPIE6IN, GPIE6, GPIE);
	346	+PIN_DECL_2(A20, GPIOE6, TXD3, GPIE6IN);
318	347	FUNC_GROUP_DECL(TXD3, A20);
319	348
320	349	#define B19 39
321		-SIG_EXPR_LIST_DECL_SINGLE(RXD3, RXD3, SIG_DESC_SET(SCU80, 23));
322		-SIG_EXPR_DECL(GPIE6OUT, GPIE6, GPIE6_DESC);
323		-SIG_EXPR_DECL(GPIE6OUT, GPIE, GPIE_DESC);
324		-SIG_EXPR_LIST_DECL_DUAL(GPIE6OUT, GPIE6, GPIE);
325		-MS_PIN_DECL(B19, GPIOE7, RXD3, GPIE6OUT);
	350	+SIG_EXPR_LIST_DECL_SINGLE(B19, RXD3, RXD3, SIG_DESC_SET(SCU80, 23));
	351	+SIG_EXPR_DECL_SINGLE(GPIE6OUT, GPIE6, GPIE6_DESC);
	352	+SIG_EXPR_DECL_SINGLE(GPIE6OUT, GPIE, GPIE_DESC);
	353	+SIG_EXPR_LIST_DECL_DUAL(B19, GPIE6OUT, GPIE6, GPIE);
	354	+PIN_DECL_2(B19, GPIOE7, RXD3, GPIE6OUT);
326	355	FUNC_GROUP_DECL(RXD3, B19);
327	356
328	357	FUNC_GROUP_DECL(GPIE6, A20, B19);
..	..	@@ -331,112 +360,112 @@
331	360	#define LPCPLUS_DESC SIG_DESC_SET(SCU90, 30)
332	361
333	362	#define J19 40
334		-SIG_EXPR_DECL(LHAD0, LPCHC, LPCHC_DESC);
335		-SIG_EXPR_DECL(LHAD0, LPCPLUS, LPCPLUS_DESC);
336		-SIG_EXPR_LIST_DECL_DUAL(LHAD0, LPCHC, LPCPLUS);
337		-SIG_EXPR_LIST_DECL_SINGLE(NCTS4, NCTS4, SIG_DESC_SET(SCU80, 24));
338		-MS_PIN_DECL(J19, GPIOF0, LHAD0, NCTS4);
	363	+SIG_EXPR_DECL_SINGLE(LHAD0, LPCHC, LPCHC_DESC);
	364	+SIG_EXPR_DECL_SINGLE(LHAD0, LPCPLUS, LPCPLUS_DESC);
	365	+SIG_EXPR_LIST_DECL_DUAL(J19, LHAD0, LPCHC, LPCPLUS);
	366	+SIG_EXPR_LIST_DECL_SINGLE(J19, NCTS4, NCTS4, SIG_DESC_SET(SCU80, 24));
	367	+PIN_DECL_2(J19, GPIOF0, LHAD0, NCTS4);
339	368	FUNC_GROUP_DECL(NCTS4, J19);
340	369
341	370	#define J18 41
342		-SIG_EXPR_DECL(LHAD1, LPCHC, LPCHC_DESC);
343		-SIG_EXPR_DECL(LHAD1, LPCPLUS, LPCPLUS_DESC);
344		-SIG_EXPR_LIST_DECL_DUAL(LHAD1, LPCHC, LPCPLUS);
345		-SIG_EXPR_LIST_DECL_SINGLE(NDCD4, NDCD4, SIG_DESC_SET(SCU80, 25));
346		-MS_PIN_DECL(J18, GPIOF1, LHAD1, NDCD4);
	371	+SIG_EXPR_DECL_SINGLE(LHAD1, LPCHC, LPCHC_DESC);
	372	+SIG_EXPR_DECL_SINGLE(LHAD1, LPCPLUS, LPCPLUS_DESC);
	373	+SIG_EXPR_LIST_DECL_DUAL(J18, LHAD1, LPCHC, LPCPLUS);
	374	+SIG_EXPR_LIST_DECL_SINGLE(J18, NDCD4, NDCD4, SIG_DESC_SET(SCU80, 25));
	375	+PIN_DECL_2(J18, GPIOF1, LHAD1, NDCD4);
347	376	FUNC_GROUP_DECL(NDCD4, J18);
348	377
349	378	#define B22 42
350		-SIG_EXPR_DECL(LHAD2, LPCHC, LPCHC_DESC);
351		-SIG_EXPR_DECL(LHAD2, LPCPLUS, LPCPLUS_DESC);
352		-SIG_EXPR_LIST_DECL_DUAL(LHAD2, LPCHC, LPCPLUS);
353		-SIG_EXPR_LIST_DECL_SINGLE(NDSR4, NDSR4, SIG_DESC_SET(SCU80, 26));
354		-MS_PIN_DECL(B22, GPIOF2, LHAD2, NDSR4);
	379	+SIG_EXPR_DECL_SINGLE(LHAD2, LPCHC, LPCHC_DESC);
	380	+SIG_EXPR_DECL_SINGLE(LHAD2, LPCPLUS, LPCPLUS_DESC);
	381	+SIG_EXPR_LIST_DECL_DUAL(B22, LHAD2, LPCHC, LPCPLUS);
	382	+SIG_EXPR_LIST_DECL_SINGLE(B22, NDSR4, NDSR4, SIG_DESC_SET(SCU80, 26));
	383	+PIN_DECL_2(B22, GPIOF2, LHAD2, NDSR4);
355	384	FUNC_GROUP_DECL(NDSR4, B22);
356	385
357	386	#define B21 43
358		-SIG_EXPR_DECL(LHAD3, LPCHC, LPCHC_DESC);
359		-SIG_EXPR_DECL(LHAD3, LPCPLUS, LPCPLUS_DESC);
360		-SIG_EXPR_LIST_DECL_DUAL(LHAD3, LPCHC, LPCPLUS);
361		-SIG_EXPR_LIST_DECL_SINGLE(NRI4, NRI4, SIG_DESC_SET(SCU80, 27));
362		-MS_PIN_DECL(B21, GPIOF3, LHAD3, NRI4);
	387	+SIG_EXPR_DECL_SINGLE(LHAD3, LPCHC, LPCHC_DESC);
	388	+SIG_EXPR_DECL_SINGLE(LHAD3, LPCPLUS, LPCPLUS_DESC);
	389	+SIG_EXPR_LIST_DECL_DUAL(B21, LHAD3, LPCHC, LPCPLUS);
	390	+SIG_EXPR_LIST_DECL_SINGLE(B21, NRI4, NRI4, SIG_DESC_SET(SCU80, 27));
	391	+PIN_DECL_2(B21, GPIOF3, LHAD3, NRI4);
363	392	FUNC_GROUP_DECL(NRI4, B21);
364	393
365	394	#define A21 44
366		-SIG_EXPR_DECL(LHCLK, LPCHC, LPCHC_DESC);
367		-SIG_EXPR_DECL(LHCLK, LPCPLUS, LPCPLUS_DESC);
368		-SIG_EXPR_LIST_DECL_DUAL(LHCLK, LPCHC, LPCPLUS);
369		-SIG_EXPR_LIST_DECL_SINGLE(NDTR4, NDTR4, SIG_DESC_SET(SCU80, 28));
370		-MS_PIN_DECL(A21, GPIOF4, LHCLK, NDTR4);
	395	+SIG_EXPR_DECL_SINGLE(LHCLK, LPCHC, LPCHC_DESC);
	396	+SIG_EXPR_DECL_SINGLE(LHCLK, LPCPLUS, LPCPLUS_DESC);
	397	+SIG_EXPR_LIST_DECL_DUAL(A21, LHCLK, LPCHC, LPCPLUS);
	398	+SIG_EXPR_LIST_DECL_SINGLE(A21, NDTR4, NDTR4, SIG_DESC_SET(SCU80, 28));
	399	+PIN_DECL_2(A21, GPIOF4, LHCLK, NDTR4);
371	400	FUNC_GROUP_DECL(NDTR4, A21);
372	401
373	402	#define H19 45
374		-SIG_EXPR_DECL(LHFRAME, LPCHC, LPCHC_DESC);
375		-SIG_EXPR_DECL(LHFRAME, LPCPLUS, LPCPLUS_DESC);
376		-SIG_EXPR_LIST_DECL_DUAL(LHFRAME, LPCHC, LPCPLUS);
377		-SIG_EXPR_LIST_DECL_SINGLE(NRTS4, NRTS4, SIG_DESC_SET(SCU80, 29));
378		-MS_PIN_DECL(H19, GPIOF5, LHFRAME, NRTS4);
	403	+SIG_EXPR_DECL_SINGLE(LHFRAME, LPCHC, LPCHC_DESC);
	404	+SIG_EXPR_DECL_SINGLE(LHFRAME, LPCPLUS, LPCPLUS_DESC);
	405	+SIG_EXPR_LIST_DECL_DUAL(H19, LHFRAME, LPCHC, LPCPLUS);
	406	+SIG_EXPR_LIST_DECL_SINGLE(H19, NRTS4, NRTS4, SIG_DESC_SET(SCU80, 29));
	407	+PIN_DECL_2(H19, GPIOF5, LHFRAME, NRTS4);
379	408	FUNC_GROUP_DECL(NRTS4, H19);
380	409
381	410	#define G17 46
382		-SIG_EXPR_LIST_DECL_SINGLE(LHSIRQ, LPCHC, LPCHC_DESC);
383		-SIG_EXPR_LIST_DECL_SINGLE(TXD4, TXD4, SIG_DESC_SET(SCU80, 30));
384		-MS_PIN_DECL(G17, GPIOF6, LHSIRQ, TXD4);
	411	+SIG_EXPR_LIST_DECL_SINGLE(G17, LHSIRQ, LPCHC, LPCHC_DESC);
	412	+SIG_EXPR_LIST_DECL_SINGLE(G17, TXD4, TXD4, SIG_DESC_SET(SCU80, 30));
	413	+PIN_DECL_2(G17, GPIOF6, LHSIRQ, TXD4);
385	414	FUNC_GROUP_DECL(TXD4, G17);
386	415
387	416	#define H18 47
388		-SIG_EXPR_DECL(LHRST, LPCHC, LPCHC_DESC);
389		-SIG_EXPR_DECL(LHRST, LPCPLUS, LPCPLUS_DESC);
390		-SIG_EXPR_LIST_DECL_DUAL(LHRST, LPCHC, LPCPLUS);
391		-SIG_EXPR_LIST_DECL_SINGLE(RXD4, RXD4, SIG_DESC_SET(SCU80, 31));
392		-MS_PIN_DECL(H18, GPIOF7, LHRST, RXD4);
	417	+SIG_EXPR_DECL_SINGLE(LHRST, LPCHC, LPCHC_DESC);
	418	+SIG_EXPR_DECL_SINGLE(LHRST, LPCPLUS, LPCPLUS_DESC);
	419	+SIG_EXPR_LIST_DECL_DUAL(H18, LHRST, LPCHC, LPCPLUS);
	420	+SIG_EXPR_LIST_DECL_SINGLE(H18, RXD4, RXD4, SIG_DESC_SET(SCU80, 31));
	421	+PIN_DECL_2(H18, GPIOF7, LHRST, RXD4);
393	422	FUNC_GROUP_DECL(RXD4, H18);
394	423
395	424	FUNC_GROUP_DECL(LPCHC, J19, J18, B22, B21, A21, H19, G17, H18);
396	425	FUNC_GROUP_DECL(LPCPLUS, J19, J18, B22, B21, A21, H19, H18);
397	426
398	427	#define A19 48
399		-SIG_EXPR_LIST_DECL_SINGLE(SGPS1CK, SGPS1, COND1, SIG_DESC_SET(SCU84, 0));
400		-SS_PIN_DECL(A19, GPIOG0, SGPS1CK);
	428	+SIG_EXPR_LIST_DECL_SINGLE(A19, SGPS1CK, SGPS1, COND1, SIG_DESC_SET(SCU84, 0));
	429	+PIN_DECL_1(A19, GPIOG0, SGPS1CK);
401	430
402	431	#define E19 49
403		-SIG_EXPR_LIST_DECL_SINGLE(SGPS1LD, SGPS1, COND1, SIG_DESC_SET(SCU84, 1));
404		-SS_PIN_DECL(E19, GPIOG1, SGPS1LD);
	432	+SIG_EXPR_LIST_DECL_SINGLE(E19, SGPS1LD, SGPS1, COND1, SIG_DESC_SET(SCU84, 1));
	433	+PIN_DECL_1(E19, GPIOG1, SGPS1LD);
405	434
406	435	#define C19 50
407		-SIG_EXPR_LIST_DECL_SINGLE(SGPS1I0, SGPS1, COND1, SIG_DESC_SET(SCU84, 2));
408		-SS_PIN_DECL(C19, GPIOG2, SGPS1I0);
	436	+SIG_EXPR_LIST_DECL_SINGLE(C19, SGPS1I0, SGPS1, COND1, SIG_DESC_SET(SCU84, 2));
	437	+PIN_DECL_1(C19, GPIOG2, SGPS1I0);
409	438
410	439	#define E16 51
411		-SIG_EXPR_LIST_DECL_SINGLE(SGPS1I1, SGPS1, COND1, SIG_DESC_SET(SCU84, 3));
412		-SS_PIN_DECL(E16, GPIOG3, SGPS1I1);
	440	+SIG_EXPR_LIST_DECL_SINGLE(E16, SGPS1I1, SGPS1, COND1, SIG_DESC_SET(SCU84, 3));
	441	+PIN_DECL_1(E16, GPIOG3, SGPS1I1);
413	442
414	443	FUNC_GROUP_DECL(SGPS1, A19, E19, C19, E16);
415	444
416	445	#define SGPS2_DESC SIG_DESC_SET(SCU94, 12)
417	446
418	447	#define E17 52
419		-SIG_EXPR_LIST_DECL_SINGLE(SGPS2CK, SGPS2, COND1, SGPS2_DESC);
420		-SIG_EXPR_LIST_DECL_SINGLE(SALT1, SALT1, COND1, SIG_DESC_SET(SCU84, 4));
421		-MS_PIN_DECL(E17, GPIOG4, SGPS2CK, SALT1);
	448	+SIG_EXPR_LIST_DECL_SINGLE(E17, SGPS2CK, SGPS2, COND1, SGPS2_DESC);
	449	+SIG_EXPR_LIST_DECL_SINGLE(E17, SALT1, SALT1, COND1, SIG_DESC_SET(SCU84, 4));
	450	+PIN_DECL_2(E17, GPIOG4, SGPS2CK, SALT1);
422	451	FUNC_GROUP_DECL(SALT1, E17);
423	452
424	453	#define D16 53
425		-SIG_EXPR_LIST_DECL_SINGLE(SGPS2LD, SGPS2, COND1, SGPS2_DESC);
426		-SIG_EXPR_LIST_DECL_SINGLE(SALT2, SALT2, COND1, SIG_DESC_SET(SCU84, 5));
427		-MS_PIN_DECL(D16, GPIOG5, SGPS2LD, SALT2);
	454	+SIG_EXPR_LIST_DECL_SINGLE(D16, SGPS2LD, SGPS2, COND1, SGPS2_DESC);
	455	+SIG_EXPR_LIST_DECL_SINGLE(D16, SALT2, SALT2, COND1, SIG_DESC_SET(SCU84, 5));
	456	+PIN_DECL_2(D16, GPIOG5, SGPS2LD, SALT2);
428	457	FUNC_GROUP_DECL(SALT2, D16);
429	458
430	459	#define D15 54
431		-SIG_EXPR_LIST_DECL_SINGLE(SGPS2I0, SGPS2, COND1, SGPS2_DESC);
432		-SIG_EXPR_LIST_DECL_SINGLE(SALT3, SALT3, COND1, SIG_DESC_SET(SCU84, 6));
433		-MS_PIN_DECL(D15, GPIOG6, SGPS2I0, SALT3);
	460	+SIG_EXPR_LIST_DECL_SINGLE(D15, SGPS2I0, SGPS2, COND1, SGPS2_DESC);
	461	+SIG_EXPR_LIST_DECL_SINGLE(D15, SALT3, SALT3, COND1, SIG_DESC_SET(SCU84, 6));
	462	+PIN_DECL_2(D15, GPIOG6, SGPS2I0, SALT3);
434	463	FUNC_GROUP_DECL(SALT3, D15);
435	464
436	465	#define E14 55
437		-SIG_EXPR_LIST_DECL_SINGLE(SGPS2I1, SGPS2, COND1, SGPS2_DESC);
438		-SIG_EXPR_LIST_DECL_SINGLE(SALT4, SALT4, COND1, SIG_DESC_SET(SCU84, 7));
439		-MS_PIN_DECL(E14, GPIOG7, SGPS2I1, SALT4);
	466	+SIG_EXPR_LIST_DECL_SINGLE(E14, SGPS2I1, SGPS2, COND1, SGPS2_DESC);
	467	+SIG_EXPR_LIST_DECL_SINGLE(E14, SALT4, SALT4, COND1, SIG_DESC_SET(SCU84, 7));
	468	+PIN_DECL_2(E14, GPIOG7, SGPS2I1, SALT4);
440	469	FUNC_GROUP_DECL(SALT4, E14);
441	470
442	471	FUNC_GROUP_DECL(SGPS2, E17, D16, D15, E14);
..	..	@@ -444,42 +473,42 @@
444	473	#define UART6_DESC SIG_DESC_SET(SCU90, 7)
445	474
446	475	#define A18 56
447		-SIG_EXPR_LIST_DECL_SINGLE(DASHA18, DASHA18, COND1, SIG_DESC_SET(SCU94, 5));
448		-SIG_EXPR_LIST_DECL_SINGLE(NCTS6, UART6, COND1, UART6_DESC);
449		-MS_PIN_DECL(A18, GPIOH0, DASHA18, NCTS6);
	476	+SIG_EXPR_LIST_DECL_SINGLE(A18, DASHA18, DASHA18, COND1, SIG_DESC_SET(SCU94, 5));
	477	+SIG_EXPR_LIST_DECL_SINGLE(A18, NCTS6, UART6, COND1, UART6_DESC);
	478	+PIN_DECL_2(A18, GPIOH0, DASHA18, NCTS6);
450	479
451	480	#define B18 57
452		-SIG_EXPR_LIST_DECL_SINGLE(DASHB18, DASHB18, COND1, SIG_DESC_SET(SCU94, 5));
453		-SIG_EXPR_LIST_DECL_SINGLE(NDCD6, UART6, COND1, UART6_DESC);
454		-MS_PIN_DECL(B18, GPIOH1, DASHB18, NDCD6);
	481	+SIG_EXPR_LIST_DECL_SINGLE(B18, DASHB18, DASHB18, COND1, SIG_DESC_SET(SCU94, 5));
	482	+SIG_EXPR_LIST_DECL_SINGLE(B18, NDCD6, UART6, COND1, UART6_DESC);
	483	+PIN_DECL_2(B18, GPIOH1, DASHB18, NDCD6);
455	484
456	485	#define D17 58
457		-SIG_EXPR_LIST_DECL_SINGLE(DASHD17, DASHD17, COND1, SIG_DESC_SET(SCU94, 6));
458		-SIG_EXPR_LIST_DECL_SINGLE(NDSR6, UART6, COND1, UART6_DESC);
459		-MS_PIN_DECL(D17, GPIOH2, DASHD17, NDSR6);
	486	+SIG_EXPR_LIST_DECL_SINGLE(D17, DASHD17, DASHD17, COND1, SIG_DESC_SET(SCU94, 6));
	487	+SIG_EXPR_LIST_DECL_SINGLE(D17, NDSR6, UART6, COND1, UART6_DESC);
	488	+PIN_DECL_2(D17, GPIOH2, DASHD17, NDSR6);
460	489
461	490	#define C17 59
462		-SIG_EXPR_LIST_DECL_SINGLE(DASHC17, DASHC17, COND1, SIG_DESC_SET(SCU94, 6));
463		-SIG_EXPR_LIST_DECL_SINGLE(NRI6, UART6, COND1, UART6_DESC);
464		-MS_PIN_DECL(C17, GPIOH3, DASHC17, NRI6);
	491	+SIG_EXPR_LIST_DECL_SINGLE(C17, DASHC17, DASHC17, COND1, SIG_DESC_SET(SCU94, 6));
	492	+SIG_EXPR_LIST_DECL_SINGLE(C17, NRI6, UART6, COND1, UART6_DESC);
	493	+PIN_DECL_2(C17, GPIOH3, DASHC17, NRI6);
465	494
466	495	#define A17 60
467		-SIG_EXPR_LIST_DECL_SINGLE(DASHA17, DASHA17, COND1, SIG_DESC_SET(SCU94, 7));
468		-SIG_EXPR_LIST_DECL_SINGLE(NDTR6, UART6, COND1, UART6_DESC);
469		-MS_PIN_DECL(A17, GPIOH4, DASHA17, NDTR6);
	496	+SIG_EXPR_LIST_DECL_SINGLE(A17, DASHA17, DASHA17, COND1, SIG_DESC_SET(SCU94, 7));
	497	+SIG_EXPR_LIST_DECL_SINGLE(A17, NDTR6, UART6, COND1, UART6_DESC);
	498	+PIN_DECL_2(A17, GPIOH4, DASHA17, NDTR6);
470	499
471	500	#define B17 61
472		-SIG_EXPR_LIST_DECL_SINGLE(DASHB17, DASHB17, COND1, SIG_DESC_SET(SCU94, 7));
473		-SIG_EXPR_LIST_DECL_SINGLE(NRTS6, UART6, COND1, UART6_DESC);
474		-MS_PIN_DECL(B17, GPIOH5, DASHB17, NRTS6);
	501	+SIG_EXPR_LIST_DECL_SINGLE(B17, DASHB17, DASHB17, COND1, SIG_DESC_SET(SCU94, 7));
	502	+SIG_EXPR_LIST_DECL_SINGLE(B17, NRTS6, UART6, COND1, UART6_DESC);
	503	+PIN_DECL_2(B17, GPIOH5, DASHB17, NRTS6);
475	504
476	505	#define A16 62
477		-SIG_EXPR_LIST_DECL_SINGLE(TXD6, UART6, COND1, UART6_DESC);
478		-SS_PIN_DECL(A16, GPIOH6, TXD6);
	506	+SIG_EXPR_LIST_DECL_SINGLE(A16, TXD6, UART6, COND1, UART6_DESC);
	507	+PIN_DECL_1(A16, GPIOH6, TXD6);
479	508
480	509	#define D18 63
481		-SIG_EXPR_LIST_DECL_SINGLE(RXD6, UART6, COND1, UART6_DESC);
482		-SS_PIN_DECL(D18, GPIOH7, RXD6);
	510	+SIG_EXPR_LIST_DECL_SINGLE(D18, RXD6, UART6, COND1, UART6_DESC);
	511	+PIN_DECL_1(D18, GPIOH7, RXD6);
483	512
484	513	FUNC_GROUP_DECL(UART6, A18, B18, D17, C17, A17, B17, A16, D18);
485	514
..	..	@@ -491,70 +520,78 @@
491	520	{ ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 3, 0 }
492	521
493	522	#define C18 64
494		-SIG_EXPR_DECL(SYSCS, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
495		-SIG_EXPR_DECL(SYSCS, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
496		-SIG_EXPR_LIST_DECL_DUAL(SYSCS, SPI1DEBUG, SPI1PASSTHRU);
497		-SS_PIN_DECL(C18, GPIOI0, SYSCS);
	523	+SIG_EXPR_DECL_SINGLE(SYSCS, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
	524	+SIG_EXPR_DECL_SINGLE(SYSCS, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
	525	+SIG_EXPR_LIST_DECL_DUAL(C18, SYSCS, SPI1DEBUG, SPI1PASSTHRU);
	526	+PIN_DECL_1(C18, GPIOI0, SYSCS);
498	527
499	528	#define E15 65
500		-SIG_EXPR_DECL(SYSCK, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
501		-SIG_EXPR_DECL(SYSCK, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
502		-SIG_EXPR_LIST_DECL_DUAL(SYSCK, SPI1DEBUG, SPI1PASSTHRU);
503		-SS_PIN_DECL(E15, GPIOI1, SYSCK);
	529	+SIG_EXPR_DECL_SINGLE(SYSCK, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
	530	+SIG_EXPR_DECL_SINGLE(SYSCK, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
	531	+SIG_EXPR_LIST_DECL_DUAL(E15, SYSCK, SPI1DEBUG, SPI1PASSTHRU);
	532	+PIN_DECL_1(E15, GPIOI1, SYSCK);
504	533
505	534	#define B16 66
506		-SIG_EXPR_DECL(SYSMOSI, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
507		-SIG_EXPR_DECL(SYSMOSI, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
508		-SIG_EXPR_LIST_DECL_DUAL(SYSMOSI, SPI1DEBUG, SPI1PASSTHRU);
509		-SS_PIN_DECL(B16, GPIOI2, SYSMOSI);
	535	+SIG_EXPR_DECL_SINGLE(SYSMOSI, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
	536	+SIG_EXPR_DECL_SINGLE(SYSMOSI, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
	537	+SIG_EXPR_LIST_DECL_DUAL(B16, SYSMOSI, SPI1DEBUG, SPI1PASSTHRU);
	538	+PIN_DECL_1(B16, GPIOI2, SYSMOSI);
510	539
511	540	#define C16 67
512		-SIG_EXPR_DECL(SYSMISO, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
513		-SIG_EXPR_DECL(SYSMISO, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
514		-SIG_EXPR_LIST_DECL_DUAL(SYSMISO, SPI1DEBUG, SPI1PASSTHRU);
515		-SS_PIN_DECL(C16, GPIOI3, SYSMISO);
	541	+SIG_EXPR_DECL_SINGLE(SYSMISO, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
	542	+SIG_EXPR_DECL_SINGLE(SYSMISO, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
	543	+SIG_EXPR_LIST_DECL_DUAL(C16, SYSMISO, SPI1DEBUG, SPI1PASSTHRU);
	544	+PIN_DECL_1(C16, GPIOI3, SYSMISO);
516	545
517	546	#define VB_DESC SIG_DESC_SET(HW_STRAP1, 5)
518	547
519	548	#define B15 68
520		-SIG_EXPR_DECL(SPI1CS0, SPI1, COND1, SPI1_DESC);
521		-SIG_EXPR_DECL(SPI1CS0, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
522		-SIG_EXPR_DECL(SPI1CS0, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
523		-SIG_EXPR_LIST_DECL(SPI1CS0, SIG_EXPR_PTR(SPI1CS0, SPI1),
	549	+SIG_EXPR_DECL_SINGLE(SPI1CS0, SPI1, COND1, SPI1_DESC);
	550	+SIG_EXPR_DECL_SINGLE(SPI1CS0, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
	551	+SIG_EXPR_DECL_SINGLE(SPI1CS0, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
	552	+SIG_EXPR_LIST_DECL(SPI1CS0, SPI1,
	553	+ SIG_EXPR_PTR(SPI1CS0, SPI1),
524	554	SIG_EXPR_PTR(SPI1CS0, SPI1DEBUG),
525	555	SIG_EXPR_PTR(SPI1CS0, SPI1PASSTHRU));
526		-SIG_EXPR_LIST_DECL_SINGLE(VBCS, VGABIOSROM, COND1, VB_DESC);
527		-MS_PIN_DECL(B15, GPIOI4, SPI1CS0, VBCS);
	556	+SIG_EXPR_LIST_ALIAS(B15, SPI1CS0, SPI1);
	557	+SIG_EXPR_LIST_DECL_SINGLE(B15, VBCS, VGABIOSROM, COND1, VB_DESC);
	558	+PIN_DECL_2(B15, GPIOI4, SPI1CS0, VBCS);
528	559
529	560	#define C15 69
530		-SIG_EXPR_DECL(SPI1CK, SPI1, COND1, SPI1_DESC);
531		-SIG_EXPR_DECL(SPI1CK, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
532		-SIG_EXPR_DECL(SPI1CK, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
533		-SIG_EXPR_LIST_DECL(SPI1CK, SIG_EXPR_PTR(SPI1CK, SPI1),
	561	+SIG_EXPR_DECL_SINGLE(SPI1CK, SPI1, COND1, SPI1_DESC);
	562	+SIG_EXPR_DECL_SINGLE(SPI1CK, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
	563	+SIG_EXPR_DECL_SINGLE(SPI1CK, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
	564	+SIG_EXPR_LIST_DECL(SPI1CK, SPI1,
	565	+ SIG_EXPR_PTR(SPI1CK, SPI1),
534	566	SIG_EXPR_PTR(SPI1CK, SPI1DEBUG),
535	567	SIG_EXPR_PTR(SPI1CK, SPI1PASSTHRU));
536		-SIG_EXPR_LIST_DECL_SINGLE(VBCK, VGABIOSROM, COND1, VB_DESC);
537		-MS_PIN_DECL(C15, GPIOI5, SPI1CK, VBCK);
	568	+SIG_EXPR_LIST_ALIAS(C15, SPI1CK, SPI1);
	569	+SIG_EXPR_LIST_DECL_SINGLE(C15, VBCK, VGABIOSROM, COND1, VB_DESC);
	570	+PIN_DECL_2(C15, GPIOI5, SPI1CK, VBCK);
538	571
539	572	#define A14 70
540		-SIG_EXPR_DECL(SPI1MOSI, SPI1, COND1, SPI1_DESC);
541		-SIG_EXPR_DECL(SPI1MOSI, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
542		-SIG_EXPR_DECL(SPI1MOSI, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
543		-SIG_EXPR_LIST_DECL(SPI1MOSI, SIG_EXPR_PTR(SPI1MOSI, SPI1),
	573	+SIG_EXPR_DECL_SINGLE(SPI1MOSI, SPI1, COND1, SPI1_DESC);
	574	+SIG_EXPR_DECL_SINGLE(SPI1MOSI, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
	575	+SIG_EXPR_DECL_SINGLE(SPI1MOSI, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
	576	+SIG_EXPR_LIST_DECL(SPI1MOSI, SPI1,
	577	+ SIG_EXPR_PTR(SPI1MOSI, SPI1),
544	578	SIG_EXPR_PTR(SPI1MOSI, SPI1DEBUG),
545	579	SIG_EXPR_PTR(SPI1MOSI, SPI1PASSTHRU));
546		-SIG_EXPR_LIST_DECL_SINGLE(VBMOSI, VGABIOSROM, COND1, VB_DESC);
547		-MS_PIN_DECL(A14, GPIOI6, SPI1MOSI, VBMOSI);
	580	+SIG_EXPR_LIST_ALIAS(A14, SPI1MOSI, SPI1);
	581	+SIG_EXPR_LIST_DECL_SINGLE(A14, VBMOSI, VGABIOSROM, COND1, VB_DESC);
	582	+PIN_DECL_2(A14, GPIOI6, SPI1MOSI, VBMOSI);
548	583
549	584	#define A15 71
550		-SIG_EXPR_DECL(SPI1MISO, SPI1, COND1, SPI1_DESC);
551		-SIG_EXPR_DECL(SPI1MISO, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
552		-SIG_EXPR_DECL(SPI1MISO, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
553		-SIG_EXPR_LIST_DECL(SPI1MISO, SIG_EXPR_PTR(SPI1MISO, SPI1),
	585	+SIG_EXPR_DECL_SINGLE(SPI1MISO, SPI1, COND1, SPI1_DESC);
	586	+SIG_EXPR_DECL_SINGLE(SPI1MISO, SPI1DEBUG, COND1, SPI1DEBUG_DESC);
	587	+SIG_EXPR_DECL_SINGLE(SPI1MISO, SPI1PASSTHRU, COND1, SPI1PASSTHRU_DESC);
	588	+SIG_EXPR_LIST_DECL(SPI1MISO, SPI1,
	589	+ SIG_EXPR_PTR(SPI1MISO, SPI1),
554	590	SIG_EXPR_PTR(SPI1MISO, SPI1DEBUG),
555	591	SIG_EXPR_PTR(SPI1MISO, SPI1PASSTHRU));
556		-SIG_EXPR_LIST_DECL_SINGLE(VBMISO, VGABIOSROM, COND1, VB_DESC);
557		-MS_PIN_DECL(A15, GPIOI7, SPI1MISO, VBMISO);
	592	+SIG_EXPR_LIST_ALIAS(A15, SPI1MISO, SPI1);
	593	+SIG_EXPR_LIST_DECL_SINGLE(A15, VBMISO, VGABIOSROM, COND1, VB_DESC);
	594	+PIN_DECL_2(A15, GPIOI7, SPI1MISO, VBMISO);
558	595
559	596	FUNC_GROUP_DECL(SPI1, B15, C15, A14, A15);
560	597	FUNC_GROUP_DECL(SPI1DEBUG, C18, E15, B16, C16, B15, C15, A14, A15);
..	..	@@ -562,90 +599,92 @@
562	599	FUNC_GROUP_DECL(VGABIOSROM, B15, C15, A14, A15);
563	600
564	601	#define R2 72
565		-SIG_EXPR_LIST_DECL_SINGLE(SGPMCK, SGPM, SIG_DESC_SET(SCU84, 8));
566		-SS_PIN_DECL(R2, GPIOJ0, SGPMCK);
	602	+SIG_EXPR_LIST_DECL_SINGLE(R2, SGPMCK, SGPM, SIG_DESC_SET(SCU84, 8));
	603	+PIN_DECL_1(R2, GPIOJ0, SGPMCK);
567	604
568	605	#define L2 73
569		-SIG_EXPR_LIST_DECL_SINGLE(SGPMLD, SGPM, SIG_DESC_SET(SCU84, 9));
570		-SS_PIN_DECL(L2, GPIOJ1, SGPMLD);
	606	+SIG_EXPR_LIST_DECL_SINGLE(L2, SGPMLD, SGPM, SIG_DESC_SET(SCU84, 9));
	607	+PIN_DECL_1(L2, GPIOJ1, SGPMLD);
571	608
572	609	#define N3 74
573		-SIG_EXPR_LIST_DECL_SINGLE(SGPMO, SGPM, SIG_DESC_SET(SCU84, 10));
574		-SS_PIN_DECL(N3, GPIOJ2, SGPMO);
	610	+SIG_EXPR_LIST_DECL_SINGLE(N3, SGPMO, SGPM, SIG_DESC_SET(SCU84, 10));
	611	+PIN_DECL_1(N3, GPIOJ2, SGPMO);
575	612
576	613	#define N4 75
577		-SIG_EXPR_LIST_DECL_SINGLE(SGPMI, SGPM, SIG_DESC_SET(SCU84, 11));
578		-SS_PIN_DECL(N4, GPIOJ3, SGPMI);
	614	+SIG_EXPR_LIST_DECL_SINGLE(N4, SGPMI, SGPM, SIG_DESC_SET(SCU84, 11));
	615	+PIN_DECL_1(N4, GPIOJ3, SGPMI);
	616	+
	617	+FUNC_GROUP_DECL(SGPM, R2, L2, N3, N4);
579	618
580	619	#define N5 76
581		-SIG_EXPR_LIST_DECL_SINGLE(VGAHS, VGAHS, SIG_DESC_SET(SCU84, 12));
582		-SIG_EXPR_LIST_DECL_SINGLE(DASHN5, DASHN5, SIG_DESC_SET(SCU94, 8));
583		-MS_PIN_DECL(N5, GPIOJ4, VGAHS, DASHN5);
	620	+SIG_EXPR_LIST_DECL_SINGLE(N5, VGAHS, VGAHS, SIG_DESC_SET(SCU84, 12));
	621	+SIG_EXPR_LIST_DECL_SINGLE(N5, DASHN5, DASHN5, SIG_DESC_SET(SCU94, 8));
	622	+PIN_DECL_2(N5, GPIOJ4, VGAHS, DASHN5);
584	623	FUNC_GROUP_DECL(VGAHS, N5);
585	624
586	625	#define R4 77
587		-SIG_EXPR_LIST_DECL_SINGLE(VGAVS, VGAVS, SIG_DESC_SET(SCU84, 13));
588		-SIG_EXPR_LIST_DECL_SINGLE(DASHR4, DASHR4, SIG_DESC_SET(SCU94, 8));
589		-MS_PIN_DECL(R4, GPIOJ5, VGAVS, DASHR4);
	626	+SIG_EXPR_LIST_DECL_SINGLE(R4, VGAVS, VGAVS, SIG_DESC_SET(SCU84, 13));
	627	+SIG_EXPR_LIST_DECL_SINGLE(R4, DASHR4, DASHR4, SIG_DESC_SET(SCU94, 8));
	628	+PIN_DECL_2(R4, GPIOJ5, VGAVS, DASHR4);
590	629	FUNC_GROUP_DECL(VGAVS, R4);
591	630
592	631	#define R3 78
593		-SIG_EXPR_LIST_DECL_SINGLE(DDCCLK, DDCCLK, SIG_DESC_SET(SCU84, 14));
594		-SIG_EXPR_LIST_DECL_SINGLE(DASHR3, DASHR3, SIG_DESC_SET(SCU94, 9));
595		-MS_PIN_DECL(R3, GPIOJ6, DDCCLK, DASHR3);
	632	+SIG_EXPR_LIST_DECL_SINGLE(R3, DDCCLK, DDCCLK, SIG_DESC_SET(SCU84, 14));
	633	+SIG_EXPR_LIST_DECL_SINGLE(R3, DASHR3, DASHR3, SIG_DESC_SET(SCU94, 9));
	634	+PIN_DECL_2(R3, GPIOJ6, DDCCLK, DASHR3);
596	635	FUNC_GROUP_DECL(DDCCLK, R3);
597	636
598	637	#define T3 79
599		-SIG_EXPR_LIST_DECL_SINGLE(DDCDAT, DDCDAT, SIG_DESC_SET(SCU84, 15));
600		-SIG_EXPR_LIST_DECL_SINGLE(DASHT3, DASHT3, SIG_DESC_SET(SCU94, 9));
601		-MS_PIN_DECL(T3, GPIOJ7, DDCDAT, DASHT3);
	638	+SIG_EXPR_LIST_DECL_SINGLE(T3, DDCDAT, DDCDAT, SIG_DESC_SET(SCU84, 15));
	639	+SIG_EXPR_LIST_DECL_SINGLE(T3, DASHT3, DASHT3, SIG_DESC_SET(SCU94, 9));
	640	+PIN_DECL_2(T3, GPIOJ7, DDCDAT, DASHT3);
602	641	FUNC_GROUP_DECL(DDCDAT, T3);
603	642
604	643	#define I2C5_DESC SIG_DESC_SET(SCU90, 18)
605	644
606	645	#define L3 80
607		-SIG_EXPR_LIST_DECL_SINGLE(SCL5, I2C5, I2C5_DESC);
608		-SS_PIN_DECL(L3, GPIOK0, SCL5);
	646	+SIG_EXPR_LIST_DECL_SINGLE(L3, SCL5, I2C5, I2C5_DESC);
	647	+PIN_DECL_1(L3, GPIOK0, SCL5);
609	648
610	649	#define L4 81
611		-SIG_EXPR_LIST_DECL_SINGLE(SDA5, I2C5, I2C5_DESC);
612		-SS_PIN_DECL(L4, GPIOK1, SDA5);
	650	+SIG_EXPR_LIST_DECL_SINGLE(L4, SDA5, I2C5, I2C5_DESC);
	651	+PIN_DECL_1(L4, GPIOK1, SDA5);
613	652
614	653	FUNC_GROUP_DECL(I2C5, L3, L4);
615	654
616	655	#define I2C6_DESC SIG_DESC_SET(SCU90, 19)
617	656
618	657	#define L1 82
619		-SIG_EXPR_LIST_DECL_SINGLE(SCL6, I2C6, I2C6_DESC);
620		-SS_PIN_DECL(L1, GPIOK2, SCL6);
	658	+SIG_EXPR_LIST_DECL_SINGLE(L1, SCL6, I2C6, I2C6_DESC);
	659	+PIN_DECL_1(L1, GPIOK2, SCL6);
621	660
622	661	#define N2 83
623		-SIG_EXPR_LIST_DECL_SINGLE(SDA6, I2C6, I2C6_DESC);
624		-SS_PIN_DECL(N2, GPIOK3, SDA6);
	662	+SIG_EXPR_LIST_DECL_SINGLE(N2, SDA6, I2C6, I2C6_DESC);
	663	+PIN_DECL_1(N2, GPIOK3, SDA6);
625	664
626	665	FUNC_GROUP_DECL(I2C6, L1, N2);
627	666
628	667	#define I2C7_DESC SIG_DESC_SET(SCU90, 20)
629	668
630	669	#define N1 84
631		-SIG_EXPR_LIST_DECL_SINGLE(SCL7, I2C7, I2C7_DESC);
632		-SS_PIN_DECL(N1, GPIOK4, SCL7);
	670	+SIG_EXPR_LIST_DECL_SINGLE(N1, SCL7, I2C7, I2C7_DESC);
	671	+PIN_DECL_1(N1, GPIOK4, SCL7);
633	672
634	673	#define P1 85
635		-SIG_EXPR_LIST_DECL_SINGLE(SDA7, I2C7, I2C7_DESC);
636		-SS_PIN_DECL(P1, GPIOK5, SDA7);
	674	+SIG_EXPR_LIST_DECL_SINGLE(P1, SDA7, I2C7, I2C7_DESC);
	675	+PIN_DECL_1(P1, GPIOK5, SDA7);
637	676
638	677	FUNC_GROUP_DECL(I2C7, N1, P1);
639	678
640	679	#define I2C8_DESC SIG_DESC_SET(SCU90, 21)
641	680
642	681	#define P2 86
643		-SIG_EXPR_LIST_DECL_SINGLE(SCL8, I2C8, I2C8_DESC);
644		-SS_PIN_DECL(P2, GPIOK6, SCL8);
	682	+SIG_EXPR_LIST_DECL_SINGLE(P2, SCL8, I2C8, I2C8_DESC);
	683	+PIN_DECL_1(P2, GPIOK6, SCL8);
645	684
646	685	#define R1 87
647		-SIG_EXPR_LIST_DECL_SINGLE(SDA8, I2C8, I2C8_DESC);
648		-SS_PIN_DECL(R1, GPIOK7, SDA8);
	686	+SIG_EXPR_LIST_DECL_SINGLE(R1, SDA8, I2C8, I2C8_DESC);
	687	+PIN_DECL_1(R1, GPIOK7, SDA8);
649	688
650	689	FUNC_GROUP_DECL(I2C8, P2, R1);
651	690
..	..	@@ -660,290 +699,290 @@
660	699
661	700	#define T1 89
662	701	#define T1_DESC SIG_DESC_SET(SCU84, 17)
663		-SIG_EXPR_LIST_DECL_SINGLE(VPIDE, VPI24, VPI_24_RSVD_DESC, T1_DESC, COND2);
664		-SIG_EXPR_LIST_DECL_SINGLE(NDCD1, NDCD1, T1_DESC, COND2);
665		-MS_PIN_DECL(T1, GPIOL1, VPIDE, NDCD1);
	702	+SIG_EXPR_LIST_DECL_SINGLE(T1, VPIDE, VPI24, VPI_24_RSVD_DESC, T1_DESC, COND2);
	703	+SIG_EXPR_LIST_DECL_SINGLE(T1, NDCD1, NDCD1, T1_DESC, COND2);
	704	+PIN_DECL_2(T1, GPIOL1, VPIDE, NDCD1);
666	705	FUNC_GROUP_DECL(NDCD1, T1);
667	706
668	707	#define U1 90
669	708	#define U1_DESC SIG_DESC_SET(SCU84, 18)
670		-SIG_EXPR_LIST_DECL_SINGLE(DASHU1, VPI24, VPI_24_RSVD_DESC, U1_DESC);
671		-SIG_EXPR_LIST_DECL_SINGLE(NDSR1, NDSR1, U1_DESC);
672		-MS_PIN_DECL(U1, GPIOL2, DASHU1, NDSR1);
	709	+SIG_EXPR_LIST_DECL_SINGLE(U1, DASHU1, VPI24, VPI_24_RSVD_DESC, U1_DESC);
	710	+SIG_EXPR_LIST_DECL_SINGLE(U1, NDSR1, NDSR1, U1_DESC);
	711	+PIN_DECL_2(U1, GPIOL2, DASHU1, NDSR1);
673	712	FUNC_GROUP_DECL(NDSR1, U1);
674	713
675	714	#define U2 91
676	715	#define U2_DESC SIG_DESC_SET(SCU84, 19)
677		-SIG_EXPR_LIST_DECL_SINGLE(VPIHS, VPI24, VPI_24_RSVD_DESC, U2_DESC, COND2);
678		-SIG_EXPR_LIST_DECL_SINGLE(NRI1, NRI1, U2_DESC, COND2);
679		-MS_PIN_DECL(U2, GPIOL3, VPIHS, NRI1);
	716	+SIG_EXPR_LIST_DECL_SINGLE(U2, VPIHS, VPI24, VPI_24_RSVD_DESC, U2_DESC, COND2);
	717	+SIG_EXPR_LIST_DECL_SINGLE(U2, NRI1, NRI1, U2_DESC, COND2);
	718	+PIN_DECL_2(U2, GPIOL3, VPIHS, NRI1);
680	719	FUNC_GROUP_DECL(NRI1, U2);
681	720
682	721	#define P4 92
683	722	#define P4_DESC SIG_DESC_SET(SCU84, 20)
684		-SIG_EXPR_LIST_DECL_SINGLE(VPIVS, VPI24, VPI_24_RSVD_DESC, P4_DESC, COND2);
685		-SIG_EXPR_LIST_DECL_SINGLE(NDTR1, NDTR1, P4_DESC, COND2);
686		-MS_PIN_DECL(P4, GPIOL4, VPIVS, NDTR1);
	723	+SIG_EXPR_LIST_DECL_SINGLE(P4, VPIVS, VPI24, VPI_24_RSVD_DESC, P4_DESC, COND2);
	724	+SIG_EXPR_LIST_DECL_SINGLE(P4, NDTR1, NDTR1, P4_DESC, COND2);
	725	+PIN_DECL_2(P4, GPIOL4, VPIVS, NDTR1);
687	726	FUNC_GROUP_DECL(NDTR1, P4);
688	727
689	728	#define P3 93
690	729	#define P3_DESC SIG_DESC_SET(SCU84, 21)
691		-SIG_EXPR_LIST_DECL_SINGLE(VPICLK, VPI24, VPI_24_RSVD_DESC, P3_DESC, COND2);
692		-SIG_EXPR_LIST_DECL_SINGLE(NRTS1, NRTS1, P3_DESC, COND2);
693		-MS_PIN_DECL(P3, GPIOL5, VPICLK, NRTS1);
	730	+SIG_EXPR_LIST_DECL_SINGLE(P3, VPICLK, VPI24, VPI_24_RSVD_DESC, P3_DESC, COND2);
	731	+SIG_EXPR_LIST_DECL_SINGLE(P3, NRTS1, NRTS1, P3_DESC, COND2);
	732	+PIN_DECL_2(P3, GPIOL5, VPICLK, NRTS1);
694	733	FUNC_GROUP_DECL(NRTS1, P3);
695	734
696	735	#define V1 94
697	736	#define V1_DESC SIG_DESC_SET(SCU84, 22)
698		-SIG_EXPR_LIST_DECL_SINGLE(DASHV1, DASHV1, VPIRSVD_DESC, V1_DESC);
699		-SIG_EXPR_LIST_DECL_SINGLE(TXD1, TXD1, V1_DESC, COND2);
700		-MS_PIN_DECL(V1, GPIOL6, DASHV1, TXD1);
	737	+SIG_EXPR_LIST_DECL_SINGLE(V1, DASHV1, DASHV1, VPIRSVD_DESC, V1_DESC);
	738	+SIG_EXPR_LIST_DECL_SINGLE(V1, TXD1, TXD1, V1_DESC, COND2);
	739	+PIN_DECL_2(V1, GPIOL6, DASHV1, TXD1);
701	740	FUNC_GROUP_DECL(TXD1, V1);
702	741
703	742	#define W1 95
704	743	#define W1_DESC SIG_DESC_SET(SCU84, 23)
705		-SIG_EXPR_LIST_DECL_SINGLE(DASHW1, DASHW1, VPIRSVD_DESC, W1_DESC);
706		-SIG_EXPR_LIST_DECL_SINGLE(RXD1, RXD1, W1_DESC, COND2);
707		-MS_PIN_DECL(W1, GPIOL7, DASHW1, RXD1);
	744	+SIG_EXPR_LIST_DECL_SINGLE(W1, DASHW1, DASHW1, VPIRSVD_DESC, W1_DESC);
	745	+SIG_EXPR_LIST_DECL_SINGLE(W1, RXD1, RXD1, W1_DESC, COND2);
	746	+PIN_DECL_2(W1, GPIOL7, DASHW1, RXD1);
708	747	FUNC_GROUP_DECL(RXD1, W1);
709	748
710	749	#define Y1 96
711	750	#define Y1_DESC SIG_DESC_SET(SCU84, 24)
712		-SIG_EXPR_LIST_DECL_SINGLE(VPIB2, VPI24, VPI_24_RSVD_DESC, Y1_DESC, COND2);
713		-SIG_EXPR_LIST_DECL_SINGLE(NCTS2, NCTS2, Y1_DESC, COND2);
714		-MS_PIN_DECL(Y1, GPIOM0, VPIB2, NCTS2);
	751	+SIG_EXPR_LIST_DECL_SINGLE(Y1, VPIB2, VPI24, VPI_24_RSVD_DESC, Y1_DESC, COND2);
	752	+SIG_EXPR_LIST_DECL_SINGLE(Y1, NCTS2, NCTS2, Y1_DESC, COND2);
	753	+PIN_DECL_2(Y1, GPIOM0, VPIB2, NCTS2);
715	754	FUNC_GROUP_DECL(NCTS2, Y1);
716	755
717	756	#define AB2 97
718	757	#define AB2_DESC SIG_DESC_SET(SCU84, 25)
719		-SIG_EXPR_LIST_DECL_SINGLE(VPIB3, VPI24, VPI_24_RSVD_DESC, AB2_DESC, COND2);
720		-SIG_EXPR_LIST_DECL_SINGLE(NDCD2, NDCD2, AB2_DESC, COND2);
721		-MS_PIN_DECL(AB2, GPIOM1, VPIB3, NDCD2);
	758	+SIG_EXPR_LIST_DECL_SINGLE(AB2, VPIB3, VPI24, VPI_24_RSVD_DESC, AB2_DESC, COND2);
	759	+SIG_EXPR_LIST_DECL_SINGLE(AB2, NDCD2, NDCD2, AB2_DESC, COND2);
	760	+PIN_DECL_2(AB2, GPIOM1, VPIB3, NDCD2);
722	761	FUNC_GROUP_DECL(NDCD2, AB2);
723	762
724	763	#define AA1 98
725	764	#define AA1_DESC SIG_DESC_SET(SCU84, 26)
726		-SIG_EXPR_LIST_DECL_SINGLE(VPIB4, VPI24, VPI_24_RSVD_DESC, AA1_DESC, COND2);
727		-SIG_EXPR_LIST_DECL_SINGLE(NDSR2, NDSR2, AA1_DESC, COND2);
728		-MS_PIN_DECL(AA1, GPIOM2, VPIB4, NDSR2);
	765	+SIG_EXPR_LIST_DECL_SINGLE(AA1, VPIB4, VPI24, VPI_24_RSVD_DESC, AA1_DESC, COND2);
	766	+SIG_EXPR_LIST_DECL_SINGLE(AA1, NDSR2, NDSR2, AA1_DESC, COND2);
	767	+PIN_DECL_2(AA1, GPIOM2, VPIB4, NDSR2);
729	768	FUNC_GROUP_DECL(NDSR2, AA1);
730	769
731	770	#define Y2 99
732	771	#define Y2_DESC SIG_DESC_SET(SCU84, 27)
733		-SIG_EXPR_LIST_DECL_SINGLE(VPIB5, VPI24, VPI_24_RSVD_DESC, Y2_DESC, COND2);
734		-SIG_EXPR_LIST_DECL_SINGLE(NRI2, NRI2, Y2_DESC, COND2);
735		-MS_PIN_DECL(Y2, GPIOM3, VPIB5, NRI2);
	772	+SIG_EXPR_LIST_DECL_SINGLE(Y2, VPIB5, VPI24, VPI_24_RSVD_DESC, Y2_DESC, COND2);
	773	+SIG_EXPR_LIST_DECL_SINGLE(Y2, NRI2, NRI2, Y2_DESC, COND2);
	774	+PIN_DECL_2(Y2, GPIOM3, VPIB5, NRI2);
736	775	FUNC_GROUP_DECL(NRI2, Y2);
737	776
738	777	#define AA2 100
739	778	#define AA2_DESC SIG_DESC_SET(SCU84, 28)
740		-SIG_EXPR_LIST_DECL_SINGLE(VPIB6, VPI24, VPI_24_RSVD_DESC, AA2_DESC, COND2);
741		-SIG_EXPR_LIST_DECL_SINGLE(NDTR2, NDTR2, AA2_DESC, COND2);
742		-MS_PIN_DECL(AA2, GPIOM4, VPIB6, NDTR2);
	779	+SIG_EXPR_LIST_DECL_SINGLE(AA2, VPIB6, VPI24, VPI_24_RSVD_DESC, AA2_DESC, COND2);
	780	+SIG_EXPR_LIST_DECL_SINGLE(AA2, NDTR2, NDTR2, AA2_DESC, COND2);
	781	+PIN_DECL_2(AA2, GPIOM4, VPIB6, NDTR2);
743	782	FUNC_GROUP_DECL(NDTR2, AA2);
744	783
745	784	#define P5 101
746	785	#define P5_DESC SIG_DESC_SET(SCU84, 29)
747		-SIG_EXPR_LIST_DECL_SINGLE(VPIB7, VPI24, VPI_24_RSVD_DESC, P5_DESC, COND2);
748		-SIG_EXPR_LIST_DECL_SINGLE(NRTS2, NRTS2, P5_DESC, COND2);
749		-MS_PIN_DECL(P5, GPIOM5, VPIB7, NRTS2);
	786	+SIG_EXPR_LIST_DECL_SINGLE(P5, VPIB7, VPI24, VPI_24_RSVD_DESC, P5_DESC, COND2);
	787	+SIG_EXPR_LIST_DECL_SINGLE(P5, NRTS2, NRTS2, P5_DESC, COND2);
	788	+PIN_DECL_2(P5, GPIOM5, VPIB7, NRTS2);
750	789	FUNC_GROUP_DECL(NRTS2, P5);
751	790
752	791	#define R5 102
753	792	#define R5_DESC SIG_DESC_SET(SCU84, 30)
754		-SIG_EXPR_LIST_DECL_SINGLE(VPIB8, VPI24, VPI_24_RSVD_DESC, R5_DESC, COND2);
755		-SIG_EXPR_LIST_DECL_SINGLE(TXD2, TXD2, R5_DESC, COND2);
756		-MS_PIN_DECL(R5, GPIOM6, VPIB8, TXD2);
	793	+SIG_EXPR_LIST_DECL_SINGLE(R5, VPIB8, VPI24, VPI_24_RSVD_DESC, R5_DESC, COND2);
	794	+SIG_EXPR_LIST_DECL_SINGLE(R5, TXD2, TXD2, R5_DESC, COND2);
	795	+PIN_DECL_2(R5, GPIOM6, VPIB8, TXD2);
757	796	FUNC_GROUP_DECL(TXD2, R5);
758	797
759	798	#define T5 103
760	799	#define T5_DESC SIG_DESC_SET(SCU84, 31)
761		-SIG_EXPR_LIST_DECL_SINGLE(VPIB9, VPI24, VPI_24_RSVD_DESC, T5_DESC, COND2);
762		-SIG_EXPR_LIST_DECL_SINGLE(RXD2, RXD2, T5_DESC, COND2);
763		-MS_PIN_DECL(T5, GPIOM7, VPIB9, RXD2);
	800	+SIG_EXPR_LIST_DECL_SINGLE(T5, VPIB9, VPI24, VPI_24_RSVD_DESC, T5_DESC, COND2);
	801	+SIG_EXPR_LIST_DECL_SINGLE(T5, RXD2, RXD2, T5_DESC, COND2);
	802	+PIN_DECL_2(T5, GPIOM7, VPIB9, RXD2);
764	803	FUNC_GROUP_DECL(RXD2, T5);
765	804
766	805	#define V2 104
767	806	#define V2_DESC SIG_DESC_SET(SCU88, 0)
768		-SIG_EXPR_LIST_DECL_SINGLE(DASHN0, DASHN0, VPIRSVD_DESC, V2_DESC);
769		-SIG_EXPR_LIST_DECL_SINGLE(PWM0, PWM0, V2_DESC, COND2);
770		-MS_PIN_DECL(V2, GPION0, DASHN0, PWM0);
	807	+SIG_EXPR_LIST_DECL_SINGLE(V2, DASHN0, DASHN0, VPIRSVD_DESC, V2_DESC);
	808	+SIG_EXPR_LIST_DECL_SINGLE(V2, PWM0, PWM0, V2_DESC, COND2);
	809	+PIN_DECL_2(V2, GPION0, DASHN0, PWM0);
771	810	FUNC_GROUP_DECL(PWM0, V2);
772	811
773	812	#define W2 105
774	813	#define W2_DESC SIG_DESC_SET(SCU88, 1)
775		-SIG_EXPR_LIST_DECL_SINGLE(DASHN1, DASHN1, VPIRSVD_DESC, W2_DESC);
776		-SIG_EXPR_LIST_DECL_SINGLE(PWM1, PWM1, W2_DESC, COND2);
777		-MS_PIN_DECL(W2, GPION1, DASHN1, PWM1);
	814	+SIG_EXPR_LIST_DECL_SINGLE(W2, DASHN1, DASHN1, VPIRSVD_DESC, W2_DESC);
	815	+SIG_EXPR_LIST_DECL_SINGLE(W2, PWM1, PWM1, W2_DESC, COND2);
	816	+PIN_DECL_2(W2, GPION1, DASHN1, PWM1);
778	817	FUNC_GROUP_DECL(PWM1, W2);
779	818
780	819	#define V3 106
781	820	#define V3_DESC SIG_DESC_SET(SCU88, 2)
782		-SIG_EXPR_DECL(VPIG2, VPI24, VPI24_DESC, V3_DESC, COND2);
783		-SIG_EXPR_DECL(VPIG2, VPIRSVD, VPIRSVD_DESC, V3_DESC, COND2);
784		-SIG_EXPR_LIST_DECL_DUAL(VPIG2, VPI24, VPIRSVD);
785		-SIG_EXPR_LIST_DECL_SINGLE(PWM2, PWM2, V3_DESC, COND2);
786		-MS_PIN_DECL(V3, GPION2, VPIG2, PWM2);
	821	+SIG_EXPR_DECL_SINGLE(VPIG2, VPI24, VPI24_DESC, V3_DESC, COND2);
	822	+SIG_EXPR_DECL_SINGLE(VPIG2, VPIRSVD, VPIRSVD_DESC, V3_DESC, COND2);
	823	+SIG_EXPR_LIST_DECL_DUAL(V3, VPIG2, VPI24, VPIRSVD);
	824	+SIG_EXPR_LIST_DECL_SINGLE(V3, PWM2, PWM2, V3_DESC, COND2);
	825	+PIN_DECL_2(V3, GPION2, VPIG2, PWM2);
787	826	FUNC_GROUP_DECL(PWM2, V3);
788	827
789	828	#define U3 107
790	829	#define U3_DESC SIG_DESC_SET(SCU88, 3)
791		-SIG_EXPR_DECL(VPIG3, VPI24, VPI24_DESC, U3_DESC, COND2);
792		-SIG_EXPR_DECL(VPIG3, VPIRSVD, VPIRSVD_DESC, U3_DESC, COND2);
793		-SIG_EXPR_LIST_DECL_DUAL(VPIG3, VPI24, VPIRSVD);
794		-SIG_EXPR_LIST_DECL_SINGLE(PWM3, PWM3, U3_DESC, COND2);
795		-MS_PIN_DECL(U3, GPION3, VPIG3, PWM3);
	830	+SIG_EXPR_DECL_SINGLE(VPIG3, VPI24, VPI24_DESC, U3_DESC, COND2);
	831	+SIG_EXPR_DECL_SINGLE(VPIG3, VPIRSVD, VPIRSVD_DESC, U3_DESC, COND2);
	832	+SIG_EXPR_LIST_DECL_DUAL(U3, VPIG3, VPI24, VPIRSVD);
	833	+SIG_EXPR_LIST_DECL_SINGLE(U3, PWM3, PWM3, U3_DESC, COND2);
	834	+PIN_DECL_2(U3, GPION3, VPIG3, PWM3);
796	835	FUNC_GROUP_DECL(PWM3, U3);
797	836
798	837	#define W3 108
799	838	#define W3_DESC SIG_DESC_SET(SCU88, 4)
800		-SIG_EXPR_DECL(VPIG4, VPI24, VPI24_DESC, W3_DESC, COND2);
801		-SIG_EXPR_DECL(VPIG4, VPIRSVD, VPIRSVD_DESC, W3_DESC, COND2);
802		-SIG_EXPR_LIST_DECL_DUAL(VPIG4, VPI24, VPIRSVD);
803		-SIG_EXPR_LIST_DECL_SINGLE(PWM4, PWM4, W3_DESC, COND2);
804		-MS_PIN_DECL(W3, GPION4, VPIG4, PWM4);
	839	+SIG_EXPR_DECL_SINGLE(VPIG4, VPI24, VPI24_DESC, W3_DESC, COND2);
	840	+SIG_EXPR_DECL_SINGLE(VPIG4, VPIRSVD, VPIRSVD_DESC, W3_DESC, COND2);
	841	+SIG_EXPR_LIST_DECL_DUAL(W3, VPIG4, VPI24, VPIRSVD);
	842	+SIG_EXPR_LIST_DECL_SINGLE(W3, PWM4, PWM4, W3_DESC, COND2);
	843	+PIN_DECL_2(W3, GPION4, VPIG4, PWM4);
805	844	FUNC_GROUP_DECL(PWM4, W3);
806	845
807	846	#define AA3 109
808	847	#define AA3_DESC SIG_DESC_SET(SCU88, 5)
809		-SIG_EXPR_DECL(VPIG5, VPI24, VPI24_DESC, AA3_DESC, COND2);
810		-SIG_EXPR_DECL(VPIG5, VPIRSVD, VPIRSVD_DESC, AA3_DESC, COND2);
811		-SIG_EXPR_LIST_DECL_DUAL(VPIG5, VPI24, VPIRSVD);
812		-SIG_EXPR_LIST_DECL_SINGLE(PWM5, PWM5, AA3_DESC, COND2);
813		-MS_PIN_DECL(AA3, GPION5, VPIG5, PWM5);
	848	+SIG_EXPR_DECL_SINGLE(VPIG5, VPI24, VPI24_DESC, AA3_DESC, COND2);
	849	+SIG_EXPR_DECL_SINGLE(VPIG5, VPIRSVD, VPIRSVD_DESC, AA3_DESC, COND2);
	850	+SIG_EXPR_LIST_DECL_DUAL(AA3, VPIG5, VPI24, VPIRSVD);
	851	+SIG_EXPR_LIST_DECL_SINGLE(AA3, PWM5, PWM5, AA3_DESC, COND2);
	852	+PIN_DECL_2(AA3, GPION5, VPIG5, PWM5);
814	853	FUNC_GROUP_DECL(PWM5, AA3);
815	854
816	855	#define Y3 110
817	856	#define Y3_DESC SIG_DESC_SET(SCU88, 6)
818		-SIG_EXPR_LIST_DECL_SINGLE(VPIG6, VPI24, VPI24_DESC, Y3_DESC);
819		-SIG_EXPR_LIST_DECL_SINGLE(PWM6, PWM6, Y3_DESC, COND2);
820		-MS_PIN_DECL(Y3, GPION6, VPIG6, PWM6);
	857	+SIG_EXPR_LIST_DECL_SINGLE(Y3, VPIG6, VPI24, VPI24_DESC, Y3_DESC);
	858	+SIG_EXPR_LIST_DECL_SINGLE(Y3, PWM6, PWM6, Y3_DESC, COND2);
	859	+PIN_DECL_2(Y3, GPION6, VPIG6, PWM6);
821	860	FUNC_GROUP_DECL(PWM6, Y3);
822	861
823	862	#define T4 111
824	863	#define T4_DESC SIG_DESC_SET(SCU88, 7)
825		-SIG_EXPR_LIST_DECL_SINGLE(VPIG7, VPI24, VPI24_DESC, T4_DESC);
826		-SIG_EXPR_LIST_DECL_SINGLE(PWM7, PWM7, T4_DESC, COND2);
827		-MS_PIN_DECL(T4, GPION7, VPIG7, PWM7);
	864	+SIG_EXPR_LIST_DECL_SINGLE(T4, VPIG7, VPI24, VPI24_DESC, T4_DESC);
	865	+SIG_EXPR_LIST_DECL_SINGLE(T4, PWM7, PWM7, T4_DESC, COND2);
	866	+PIN_DECL_2(T4, GPION7, VPIG7, PWM7);
828	867	FUNC_GROUP_DECL(PWM7, T4);
829	868
830	869	#define U5 112
831		-SIG_EXPR_LIST_DECL_SINGLE(VPIG8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 8),
	870	+SIG_EXPR_LIST_DECL_SINGLE(U5, VPIG8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 8),
832	871	COND2);
833		-SS_PIN_DECL(U5, GPIOO0, VPIG8);
	872	+PIN_DECL_1(U5, GPIOO0, VPIG8);
834	873
835	874	#define U4 113
836		-SIG_EXPR_LIST_DECL_SINGLE(VPIG9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 9),
	875	+SIG_EXPR_LIST_DECL_SINGLE(U4, VPIG9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 9),
837	876	COND2);
838		-SS_PIN_DECL(U4, GPIOO1, VPIG9);
	877	+PIN_DECL_1(U4, GPIOO1, VPIG9);
839	878
840	879	#define V5 114
841		-SIG_EXPR_LIST_DECL_SINGLE(DASHV5, DASHV5, VPI_24_RSVD_DESC,
	880	+SIG_EXPR_LIST_DECL_SINGLE(V5, DASHV5, DASHV5, VPI_24_RSVD_DESC,
842	881	SIG_DESC_SET(SCU88, 10));
843		-SS_PIN_DECL(V5, GPIOO2, DASHV5);
	882	+PIN_DECL_1(V5, GPIOO2, DASHV5);
844	883
845	884	#define AB4 115
846		-SIG_EXPR_LIST_DECL_SINGLE(DASHAB4, DASHAB4, VPI_24_RSVD_DESC,
	885	+SIG_EXPR_LIST_DECL_SINGLE(AB4, DASHAB4, DASHAB4, VPI_24_RSVD_DESC,
847	886	SIG_DESC_SET(SCU88, 11));
848		-SS_PIN_DECL(AB4, GPIOO3, DASHAB4);
	887	+PIN_DECL_1(AB4, GPIOO3, DASHAB4);
849	888
850	889	#define AB3 116
851		-SIG_EXPR_LIST_DECL_SINGLE(VPIR2, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 12),
852		- COND2);
853		-SS_PIN_DECL(AB3, GPIOO4, VPIR2);
	890	+SIG_EXPR_LIST_DECL_SINGLE(AB3, VPIR2, VPI24, VPI24_DESC,
	891	+ SIG_DESC_SET(SCU88, 12), COND2);
	892	+PIN_DECL_1(AB3, GPIOO4, VPIR2);
854	893
855	894	#define Y4 117
856		-SIG_EXPR_LIST_DECL_SINGLE(VPIR3, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 13),
857		- COND2);
858		-SS_PIN_DECL(Y4, GPIOO5, VPIR3);
	895	+SIG_EXPR_LIST_DECL_SINGLE(Y4, VPIR3, VPI24, VPI24_DESC,
	896	+ SIG_DESC_SET(SCU88, 13), COND2);
	897	+PIN_DECL_1(Y4, GPIOO5, VPIR3);
859	898
860	899	#define AA4 118
861		-SIG_EXPR_LIST_DECL_SINGLE(VPIR4, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 14),
862		- COND2);
863		-SS_PIN_DECL(AA4, GPIOO6, VPIR4);
	900	+SIG_EXPR_LIST_DECL_SINGLE(AA4, VPIR4, VPI24, VPI24_DESC,
	901	+ SIG_DESC_SET(SCU88, 14), COND2);
	902	+PIN_DECL_1(AA4, GPIOO6, VPIR4);
864	903
865	904	#define W4 119
866		-SIG_EXPR_LIST_DECL_SINGLE(VPIR5, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 15),
867		- COND2);
868		-SS_PIN_DECL(W4, GPIOO7, VPIR5);
	905	+SIG_EXPR_LIST_DECL_SINGLE(W4, VPIR5, VPI24, VPI24_DESC,
	906	+ SIG_DESC_SET(SCU88, 15), COND2);
	907	+PIN_DECL_1(W4, GPIOO7, VPIR5);
869	908
870	909	#define V4 120
871		-SIG_EXPR_LIST_DECL_SINGLE(VPIR6, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 16),
872		- COND2);
873		-SS_PIN_DECL(V4, GPIOP0, VPIR6);
	910	+SIG_EXPR_LIST_DECL_SINGLE(V4, VPIR6, VPI24, VPI24_DESC,
	911	+ SIG_DESC_SET(SCU88, 16), COND2);
	912	+PIN_DECL_1(V4, GPIOP0, VPIR6);
874	913
875	914	#define W5 121
876		-SIG_EXPR_LIST_DECL_SINGLE(VPIR7, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 17),
877		- COND2);
878		-SS_PIN_DECL(W5, GPIOP1, VPIR7);
	915	+SIG_EXPR_LIST_DECL_SINGLE(W5, VPIR7, VPI24, VPI24_DESC,
	916	+ SIG_DESC_SET(SCU88, 17), COND2);
	917	+PIN_DECL_1(W5, GPIOP1, VPIR7);
879	918
880	919	#define AA5 122
881		-SIG_EXPR_LIST_DECL_SINGLE(VPIR8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 18),
882		- COND2);
883		-SS_PIN_DECL(AA5, GPIOP2, VPIR8);
	920	+SIG_EXPR_LIST_DECL_SINGLE(AA5, VPIR8, VPI24, VPI24_DESC,
	921	+ SIG_DESC_SET(SCU88, 18), COND2);
	922	+PIN_DECL_1(AA5, GPIOP2, VPIR8);
884	923
885	924	#define AB5 123
886		-SIG_EXPR_LIST_DECL_SINGLE(VPIR9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 19),
887		- COND2);
888		-SS_PIN_DECL(AB5, GPIOP3, VPIR9);
	925	+SIG_EXPR_LIST_DECL_SINGLE(AB5, VPIR9, VPI24, VPI24_DESC,
	926	+ SIG_DESC_SET(SCU88, 19), COND2);
	927	+PIN_DECL_1(AB5, GPIOP3, VPIR9);
889	928
890	929	FUNC_GROUP_DECL(VPI24, T1, U2, P4, P3, Y1, AB2, AA1, Y2, AA2, P5, R5, T5, V3,
891	930	U3, W3, AA3, Y3, T4, U5, U4, AB3, Y4, AA4, W4, V4, W5, AA5,
892	931	AB5);
893	932
894	933	#define Y6 124
895		-SIG_EXPR_LIST_DECL_SINGLE(DASHY6, DASHY6, SIG_DESC_SET(SCU90, 28),
	934	+SIG_EXPR_LIST_DECL_SINGLE(Y6, DASHY6, DASHY6, SIG_DESC_SET(SCU90, 28),
896	935	SIG_DESC_SET(SCU88, 20));
897		-SS_PIN_DECL(Y6, GPIOP4, DASHY6);
	936	+PIN_DECL_1(Y6, GPIOP4, DASHY6);
898	937
899	938	#define Y5 125
900		-SIG_EXPR_LIST_DECL_SINGLE(DASHY5, DASHY5, SIG_DESC_SET(SCU90, 28),
	939	+SIG_EXPR_LIST_DECL_SINGLE(Y5, DASHY5, DASHY5, SIG_DESC_SET(SCU90, 28),
901	940	SIG_DESC_SET(SCU88, 21));
902		-SS_PIN_DECL(Y5, GPIOP5, DASHY5);
	941	+PIN_DECL_1(Y5, GPIOP5, DASHY5);
903	942
904	943	#define W6 126
905		-SIG_EXPR_LIST_DECL_SINGLE(DASHW6, DASHW6, SIG_DESC_SET(SCU90, 28),
	944	+SIG_EXPR_LIST_DECL_SINGLE(W6, DASHW6, DASHW6, SIG_DESC_SET(SCU90, 28),
906	945	SIG_DESC_SET(SCU88, 22));
907		-SS_PIN_DECL(W6, GPIOP6, DASHW6);
	946	+PIN_DECL_1(W6, GPIOP6, DASHW6);
908	947
909	948	#define V6 127
910		-SIG_EXPR_LIST_DECL_SINGLE(DASHV6, DASHV6, SIG_DESC_SET(SCU90, 28),
	949	+SIG_EXPR_LIST_DECL_SINGLE(V6, DASHV6, DASHV6, SIG_DESC_SET(SCU90, 28),
911	950	SIG_DESC_SET(SCU88, 23));
912		-SS_PIN_DECL(V6, GPIOP7, DASHV6);
	951	+PIN_DECL_1(V6, GPIOP7, DASHV6);
913	952
914	953	#define I2C3_DESC SIG_DESC_SET(SCU90, 16)
915	954
916	955	#define A11 128
917		-SIG_EXPR_LIST_DECL_SINGLE(SCL3, I2C3, I2C3_DESC);
918		-SS_PIN_DECL(A11, GPIOQ0, SCL3);
	956	+SIG_EXPR_LIST_DECL_SINGLE(A11, SCL3, I2C3, I2C3_DESC);
	957	+PIN_DECL_1(A11, GPIOQ0, SCL3);
919	958
920	959	#define A10 129
921		-SIG_EXPR_LIST_DECL_SINGLE(SDA3, I2C3, I2C3_DESC);
922		-SS_PIN_DECL(A10, GPIOQ1, SDA3);
	960	+SIG_EXPR_LIST_DECL_SINGLE(A10, SDA3, I2C3, I2C3_DESC);
	961	+PIN_DECL_1(A10, GPIOQ1, SDA3);
923	962
924	963	FUNC_GROUP_DECL(I2C3, A11, A10);
925	964
926	965	#define I2C4_DESC SIG_DESC_SET(SCU90, 17)
927	966
928	967	#define A9 130
929		-SIG_EXPR_LIST_DECL_SINGLE(SCL4, I2C4, I2C4_DESC);
930		-SS_PIN_DECL(A9, GPIOQ2, SCL4);
	968	+SIG_EXPR_LIST_DECL_SINGLE(A9, SCL4, I2C4, I2C4_DESC);
	969	+PIN_DECL_1(A9, GPIOQ2, SCL4);
931	970
932	971	#define B9 131
933		-SIG_EXPR_LIST_DECL_SINGLE(SDA4, I2C4, I2C4_DESC);
934		-SS_PIN_DECL(B9, GPIOQ3, SDA4);
	972	+SIG_EXPR_LIST_DECL_SINGLE(B9, SDA4, I2C4, I2C4_DESC);
	973	+PIN_DECL_1(B9, GPIOQ3, SDA4);
935	974
936	975	FUNC_GROUP_DECL(I2C4, A9, B9);
937	976
938	977	#define I2C14_DESC SIG_DESC_SET(SCU90, 27)
939	978
940	979	#define N21 132
941		-SIG_EXPR_LIST_DECL_SINGLE(SCL14, I2C14, I2C14_DESC);
942		-SS_PIN_DECL(N21, GPIOQ4, SCL14);
	980	+SIG_EXPR_LIST_DECL_SINGLE(N21, SCL14, I2C14, I2C14_DESC);
	981	+PIN_DECL_1(N21, GPIOQ4, SCL14);
943	982
944	983	#define N22 133
945		-SIG_EXPR_LIST_DECL_SINGLE(SDA14, I2C14, I2C14_DESC);
946		-SS_PIN_DECL(N22, GPIOQ5, SDA14);
	984	+SIG_EXPR_LIST_DECL_SINGLE(N22, SDA14, I2C14, I2C14_DESC);
	985	+PIN_DECL_1(N22, GPIOQ5, SDA14);
947	986
948	987	FUNC_GROUP_DECL(I2C14, N21, N22);
949	988
..	..	@@ -972,12 +1011,12 @@
972	1011	SSSF_PIN_DECL(V19, GPIOR5, SPI2MISO, SIG_DESC_SET(SCU88, 29), COND2);
973	1012
974	1013	#define D8 142
975		-SIG_EXPR_LIST_DECL_SINGLE(MDC1, MDIO1, SIG_DESC_SET(SCU88, 30));
976		-SS_PIN_DECL(D8, GPIOR6, MDC1);
	1014	+SIG_EXPR_LIST_DECL_SINGLE(D8, MDC1, MDIO1, SIG_DESC_SET(SCU88, 30));
	1015	+PIN_DECL_1(D8, GPIOR6, MDC1);
977	1016
978	1017	#define E10 143
979		-SIG_EXPR_LIST_DECL_SINGLE(MDIO1, MDIO1, SIG_DESC_SET(SCU88, 31));
980		-SS_PIN_DECL(E10, GPIOR7, MDIO1);
	1018	+SIG_EXPR_LIST_DECL_SINGLE(E10, MDIO1, MDIO1, SIG_DESC_SET(SCU88, 31));
	1019	+PIN_DECL_1(E10, GPIOR7, MDIO1);
981	1020
982	1021	FUNC_GROUP_DECL(MDIO1, D8, E10);
983	1022
..	..	@@ -990,83 +1029,107 @@
990	1029
991	1030	#define V20 144
992	1031	#define V20_DESC SIG_DESC_SET(SCU8C, 0)
993		-SIG_EXPR_DECL(VPOB2, VPO, V20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
994		-SIG_EXPR_DECL(VPOB2, VPOOFF1, V20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
995		-SIG_EXPR_DECL(VPOB2, VPOOFF2, V20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
996		-SIG_EXPR_LIST_DECL(VPOB2, SIG_EXPR_PTR(VPOB2, VPO),
997		- SIG_EXPR_PTR(VPOB2, VPOOFF1), SIG_EXPR_PTR(VPOB2, VPOOFF2));
998		-SIG_EXPR_LIST_DECL_SINGLE(SPI2CS1, SPI2CS1, V20_DESC);
999		-MS_PIN_DECL(V20, GPIOS0, VPOB2, SPI2CS1);
	1032	+SIG_EXPR_DECL_SINGLE(VPOB2, VPO, V20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1033	+SIG_EXPR_DECL_SINGLE(VPOB2, VPOOFF1, V20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1034	+SIG_EXPR_DECL_SINGLE(VPOB2, VPOOFF2, V20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1035	+SIG_EXPR_LIST_DECL(VPOB2, VPO,
	1036	+ SIG_EXPR_PTR(VPOB2, VPO),
	1037	+ SIG_EXPR_PTR(VPOB2, VPOOFF1),
	1038	+ SIG_EXPR_PTR(VPOB2, VPOOFF2));
	1039	+SIG_EXPR_LIST_ALIAS(V20, VPOB2, VPO);
	1040	+SIG_EXPR_LIST_DECL_SINGLE(V20, SPI2CS1, SPI2CS1, V20_DESC);
	1041	+PIN_DECL_2(V20, GPIOS0, VPOB2, SPI2CS1);
1000	1042	FUNC_GROUP_DECL(SPI2CS1, V20);
1001	1043
1002	1044	#define U19 145
1003	1045	#define U19_DESC SIG_DESC_SET(SCU8C, 1)
1004		-SIG_EXPR_DECL(VPOB3, VPO, U19_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1005		-SIG_EXPR_DECL(VPOB3, VPOOFF1, U19_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1006		-SIG_EXPR_DECL(VPOB3, VPOOFF2, U19_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1007		-SIG_EXPR_LIST_DECL(VPOB3, SIG_EXPR_PTR(VPOB3, VPO),
1008		- SIG_EXPR_PTR(VPOB3, VPOOFF1), SIG_EXPR_PTR(VPOB3, VPOOFF2));
1009		-SIG_EXPR_LIST_DECL_SINGLE(BMCINT, BMCINT, U19_DESC);
1010		-MS_PIN_DECL(U19, GPIOS1, VPOB3, BMCINT);
	1046	+SIG_EXPR_DECL_SINGLE(VPOB3, VPO, U19_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1047	+SIG_EXPR_DECL_SINGLE(VPOB3, VPOOFF1, U19_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1048	+SIG_EXPR_DECL_SINGLE(VPOB3, VPOOFF2, U19_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1049	+SIG_EXPR_LIST_DECL(VPOB3, VPO,
	1050	+ SIG_EXPR_PTR(VPOB3, VPO),
	1051	+ SIG_EXPR_PTR(VPOB3, VPOOFF1),
	1052	+ SIG_EXPR_PTR(VPOB3, VPOOFF2));
	1053	+SIG_EXPR_LIST_ALIAS(U19, VPOB3, VPO);
	1054	+SIG_EXPR_LIST_DECL_SINGLE(U19, BMCINT, BMCINT, U19_DESC);
	1055	+PIN_DECL_2(U19, GPIOS1, VPOB3, BMCINT);
1011	1056	FUNC_GROUP_DECL(BMCINT, U19);
1012	1057
1013	1058	#define R18 146
1014	1059	#define R18_DESC SIG_DESC_SET(SCU8C, 2)
1015		-SIG_EXPR_DECL(VPOB4, VPO, R18_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1016		-SIG_EXPR_DECL(VPOB4, VPOOFF1, R18_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1017		-SIG_EXPR_DECL(VPOB4, VPOOFF2, R18_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1018		-SIG_EXPR_LIST_DECL(VPOB4, SIG_EXPR_PTR(VPOB4, VPO),
1019		- SIG_EXPR_PTR(VPOB4, VPOOFF1), SIG_EXPR_PTR(VPOB4, VPOOFF2));
1020		-SIG_EXPR_LIST_DECL_SINGLE(SALT5, SALT5, R18_DESC);
1021		-MS_PIN_DECL(R18, GPIOS2, VPOB4, SALT5);
	1060	+SIG_EXPR_DECL_SINGLE(VPOB4, VPO, R18_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1061	+SIG_EXPR_DECL_SINGLE(VPOB4, VPOOFF1, R18_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1062	+SIG_EXPR_DECL_SINGLE(VPOB4, VPOOFF2, R18_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1063	+SIG_EXPR_LIST_DECL(VPOB4, VPO,
	1064	+ SIG_EXPR_PTR(VPOB4, VPO),
	1065	+ SIG_EXPR_PTR(VPOB4, VPOOFF1),
	1066	+ SIG_EXPR_PTR(VPOB4, VPOOFF2));
	1067	+SIG_EXPR_LIST_ALIAS(R18, VPOB4, VPO);
	1068	+SIG_EXPR_LIST_DECL_SINGLE(R18, SALT5, SALT5, R18_DESC);
	1069	+PIN_DECL_2(R18, GPIOS2, VPOB4, SALT5);
1022	1070	FUNC_GROUP_DECL(SALT5, R18);
1023	1071
1024	1072	#define P18 147
1025	1073	#define P18_DESC SIG_DESC_SET(SCU8C, 3)
1026		-SIG_EXPR_DECL(VPOB5, VPO, P18_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1027		-SIG_EXPR_DECL(VPOB5, VPOOFF1, P18_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1028		-SIG_EXPR_DECL(VPOB5, VPOOFF2, P18_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1029		-SIG_EXPR_LIST_DECL(VPOB5, SIG_EXPR_PTR(VPOB5, VPO),
1030		- SIG_EXPR_PTR(VPOB5, VPOOFF1), SIG_EXPR_PTR(VPOB5, VPOOFF2));
1031		-SIG_EXPR_LIST_DECL_SINGLE(SALT6, SALT6, P18_DESC);
1032		-MS_PIN_DECL(P18, GPIOS3, VPOB5, SALT6);
	1074	+SIG_EXPR_DECL_SINGLE(VPOB5, VPO, P18_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1075	+SIG_EXPR_DECL_SINGLE(VPOB5, VPOOFF1, P18_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1076	+SIG_EXPR_DECL_SINGLE(VPOB5, VPOOFF2, P18_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1077	+SIG_EXPR_LIST_DECL(VPOB5, VPO,
	1078	+ SIG_EXPR_PTR(VPOB5, VPO),
	1079	+ SIG_EXPR_PTR(VPOB5, VPOOFF1),
	1080	+ SIG_EXPR_PTR(VPOB5, VPOOFF2));
	1081	+SIG_EXPR_LIST_ALIAS(P18, VPOB5, VPO);
	1082	+SIG_EXPR_LIST_DECL_SINGLE(P18, SALT6, SALT6, P18_DESC);
	1083	+PIN_DECL_2(P18, GPIOS3, VPOB5, SALT6);
1033	1084	FUNC_GROUP_DECL(SALT6, P18);
1034	1085
1035	1086	#define R19 148
1036	1087	#define R19_DESC SIG_DESC_SET(SCU8C, 4)
1037		-SIG_EXPR_DECL(VPOB6, VPO, R19_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1038		-SIG_EXPR_DECL(VPOB6, VPOOFF1, R19_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1039		-SIG_EXPR_DECL(VPOB6, VPOOFF2, R19_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1040		-SIG_EXPR_LIST_DECL(VPOB6, SIG_EXPR_PTR(VPOB6, VPO),
1041		- SIG_EXPR_PTR(VPOB6, VPOOFF1), SIG_EXPR_PTR(VPOB6, VPOOFF2));
1042		-SS_PIN_DECL(R19, GPIOS4, VPOB6);
	1088	+SIG_EXPR_DECL_SINGLE(VPOB6, VPO, R19_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1089	+SIG_EXPR_DECL_SINGLE(VPOB6, VPOOFF1, R19_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1090	+SIG_EXPR_DECL_SINGLE(VPOB6, VPOOFF2, R19_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1091	+SIG_EXPR_LIST_DECL(VPOB6, VPO,
	1092	+ SIG_EXPR_PTR(VPOB6, VPO),
	1093	+ SIG_EXPR_PTR(VPOB6, VPOOFF1),
	1094	+ SIG_EXPR_PTR(VPOB6, VPOOFF2));
	1095	+SIG_EXPR_LIST_ALIAS(R19, VPOB6, VPO);
	1096	+PIN_DECL_1(R19, GPIOS4, VPOB6);
1043	1097
1044	1098	#define W20 149
1045	1099	#define W20_DESC SIG_DESC_SET(SCU8C, 5)
1046		-SIG_EXPR_DECL(VPOB7, VPO, W20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1047		-SIG_EXPR_DECL(VPOB7, VPOOFF1, W20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1048		-SIG_EXPR_DECL(VPOB7, VPOOFF2, W20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1049		-SIG_EXPR_LIST_DECL(VPOB7, SIG_EXPR_PTR(VPOB7, VPO),
1050		- SIG_EXPR_PTR(VPOB7, VPOOFF1), SIG_EXPR_PTR(VPOB7, VPOOFF2));
1051		-SS_PIN_DECL(W20, GPIOS5, VPOB7);
	1100	+SIG_EXPR_DECL_SINGLE(VPOB7, VPO, W20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1101	+SIG_EXPR_DECL_SINGLE(VPOB7, VPOOFF1, W20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1102	+SIG_EXPR_DECL_SINGLE(VPOB7, VPOOFF2, W20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1103	+SIG_EXPR_LIST_DECL(VPOB7, VPO,
	1104	+ SIG_EXPR_PTR(VPOB7, VPO),
	1105	+ SIG_EXPR_PTR(VPOB7, VPOOFF1),
	1106	+ SIG_EXPR_PTR(VPOB7, VPOOFF2));
	1107	+SIG_EXPR_LIST_ALIAS(W20, VPOB7, VPO);
	1108	+PIN_DECL_1(W20, GPIOS5, VPOB7);
1052	1109
1053	1110	#define U20 150
1054	1111	#define U20_DESC SIG_DESC_SET(SCU8C, 6)
1055		-SIG_EXPR_DECL(VPOB8, VPO, U20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1056		-SIG_EXPR_DECL(VPOB8, VPOOFF1, U20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1057		-SIG_EXPR_DECL(VPOB8, VPOOFF2, U20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1058		-SIG_EXPR_LIST_DECL(VPOB8, SIG_EXPR_PTR(VPOB8, VPO),
1059		- SIG_EXPR_PTR(VPOB8, VPOOFF1), SIG_EXPR_PTR(VPOB8, VPOOFF2));
1060		-SS_PIN_DECL(U20, GPIOS6, VPOB8);
	1112	+SIG_EXPR_DECL_SINGLE(VPOB8, VPO, U20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1113	+SIG_EXPR_DECL_SINGLE(VPOB8, VPOOFF1, U20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1114	+SIG_EXPR_DECL_SINGLE(VPOB8, VPOOFF2, U20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1115	+SIG_EXPR_LIST_DECL(VPOB8, VPO,
	1116	+ SIG_EXPR_PTR(VPOB8, VPO),
	1117	+ SIG_EXPR_PTR(VPOB8, VPOOFF1),
	1118	+ SIG_EXPR_PTR(VPOB8, VPOOFF2));
	1119	+SIG_EXPR_LIST_ALIAS(U20, VPOB8, VPO);
	1120	+PIN_DECL_1(U20, GPIOS6, VPOB8);
1061	1121
1062	1122	#define AA20 151
1063	1123	#define AA20_DESC SIG_DESC_SET(SCU8C, 7)
1064		-SIG_EXPR_DECL(VPOB9, VPO, AA20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1065		-SIG_EXPR_DECL(VPOB9, VPOOFF1, AA20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1066		-SIG_EXPR_DECL(VPOB9, VPOOFF2, AA20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1067		-SIG_EXPR_LIST_DECL(VPOB9, SIG_EXPR_PTR(VPOB9, VPO),
1068		- SIG_EXPR_PTR(VPOB9, VPOOFF1), SIG_EXPR_PTR(VPOB9, VPOOFF2));
1069		-SS_PIN_DECL(AA20, GPIOS7, VPOB9);
	1124	+SIG_EXPR_DECL_SINGLE(VPOB9, VPO, AA20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1125	+SIG_EXPR_DECL_SINGLE(VPOB9, VPOOFF1, AA20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1126	+SIG_EXPR_DECL_SINGLE(VPOB9, VPOOFF2, AA20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1127	+SIG_EXPR_LIST_DECL(VPOB9, VPO,
	1128	+ SIG_EXPR_PTR(VPOB9, VPO),
	1129	+ SIG_EXPR_PTR(VPOB9, VPOOFF1),
	1130	+ SIG_EXPR_PTR(VPOB9, VPOOFF2));
	1131	+SIG_EXPR_LIST_ALIAS(AA20, VPOB9, VPO);
	1132	+PIN_DECL_1(AA20, GPIOS7, VPOB9);
1070	1133
1071	1134	/* RGMII1/RMII1 */
1072	1135
..	..	@@ -1074,309 +1137,309 @@
1074	1137	#define RMII2_DESC SIG_DESC_BIT(HW_STRAP1, 7, 0)
1075	1138
1076	1139	#define B5 152
1077		-SIG_EXPR_LIST_DECL_SINGLE(GPIOT0, GPIOT0, SIG_DESC_SET(SCUA0, 0));
1078		-SIG_EXPR_LIST_DECL_SINGLE(RMII1RCLKO, RMII1, RMII1_DESC,
	1140	+SIG_EXPR_LIST_DECL_SINGLE(B5, GPIOT0, GPIOT0, SIG_DESC_SET(SCUA0, 0));
	1141	+SIG_EXPR_LIST_DECL_SINGLE(B5, RMII1RCLKO, RMII1, RMII1_DESC,
1079	1142	SIG_DESC_SET(SCU48, 29));
1080		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCK, RGMII1);
1081		-MS_PIN_DECL_(B5, SIG_EXPR_LIST_PTR(GPIOT0), SIG_EXPR_LIST_PTR(RMII1RCLKO),
1082		- SIG_EXPR_LIST_PTR(RGMII1TXCK));
	1143	+SIG_EXPR_LIST_DECL_SINGLE(B5, RGMII1TXCK, RGMII1);
	1144	+PIN_DECL_(B5, SIG_EXPR_LIST_PTR(B5, GPIOT0), SIG_EXPR_LIST_PTR(B5, RMII1RCLKO),
	1145	+ SIG_EXPR_LIST_PTR(B5, RGMII1TXCK));
1083	1146
1084	1147	#define E9 153
1085		-SIG_EXPR_LIST_DECL_SINGLE(GPIOT1, GPIOT1, SIG_DESC_SET(SCUA0, 1));
1086		-SIG_EXPR_LIST_DECL_SINGLE(RMII1TXEN, RMII1, RMII1_DESC);
1087		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCTL, RGMII1);
1088		-MS_PIN_DECL_(E9, SIG_EXPR_LIST_PTR(GPIOT1), SIG_EXPR_LIST_PTR(RMII1TXEN),
1089		- SIG_EXPR_LIST_PTR(RGMII1TXCTL));
	1148	+SIG_EXPR_LIST_DECL_SINGLE(E9, GPIOT1, GPIOT1, SIG_DESC_SET(SCUA0, 1));
	1149	+SIG_EXPR_LIST_DECL_SINGLE(E9, RMII1TXEN, RMII1, RMII1_DESC);
	1150	+SIG_EXPR_LIST_DECL_SINGLE(E9, RGMII1TXCTL, RGMII1);
	1151	+PIN_DECL_(E9, SIG_EXPR_LIST_PTR(E9, GPIOT1), SIG_EXPR_LIST_PTR(E9, RMII1TXEN),
	1152	+ SIG_EXPR_LIST_PTR(E9, RGMII1TXCTL));
1090	1153
1091	1154	#define F9 154
1092		-SIG_EXPR_LIST_DECL_SINGLE(GPIOT2, GPIOT2, SIG_DESC_SET(SCUA0, 2));
1093		-SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD0, RMII1, RMII1_DESC);
1094		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD0, RGMII1);
1095		-MS_PIN_DECL_(F9, SIG_EXPR_LIST_PTR(GPIOT2), SIG_EXPR_LIST_PTR(RMII1TXD0),
1096		- SIG_EXPR_LIST_PTR(RGMII1TXD0));
	1155	+SIG_EXPR_LIST_DECL_SINGLE(F9, GPIOT2, GPIOT2, SIG_DESC_SET(SCUA0, 2));
	1156	+SIG_EXPR_LIST_DECL_SINGLE(F9, RMII1TXD0, RMII1, RMII1_DESC);
	1157	+SIG_EXPR_LIST_DECL_SINGLE(F9, RGMII1TXD0, RGMII1);
	1158	+PIN_DECL_(F9, SIG_EXPR_LIST_PTR(F9, GPIOT2), SIG_EXPR_LIST_PTR(F9, RMII1TXD0),
	1159	+ SIG_EXPR_LIST_PTR(F9, RGMII1TXD0));
1097	1160
1098	1161	#define A5 155
1099		-SIG_EXPR_LIST_DECL_SINGLE(GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3));
1100		-SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD1, RMII1, RMII1_DESC);
1101		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD1, RGMII1);
1102		-MS_PIN_DECL_(A5, SIG_EXPR_LIST_PTR(GPIOT3), SIG_EXPR_LIST_PTR(RMII1TXD1),
1103		- SIG_EXPR_LIST_PTR(RGMII1TXD1));
	1162	+SIG_EXPR_LIST_DECL_SINGLE(A5, GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3));
	1163	+SIG_EXPR_LIST_DECL_SINGLE(A5, RMII1TXD1, RMII1, RMII1_DESC);
	1164	+SIG_EXPR_LIST_DECL_SINGLE(A5, RGMII1TXD1, RGMII1);
	1165	+PIN_DECL_(A5, SIG_EXPR_LIST_PTR(A5, GPIOT3), SIG_EXPR_LIST_PTR(A5, RMII1TXD1),
	1166	+ SIG_EXPR_LIST_PTR(A5, RGMII1TXD1));
1104	1167
1105	1168	#define E7 156
1106		-SIG_EXPR_LIST_DECL_SINGLE(GPIOT4, GPIOT4, SIG_DESC_SET(SCUA0, 4));
1107		-SIG_EXPR_LIST_DECL_SINGLE(RMII1DASH0, RMII1, RMII1_DESC);
1108		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD2, RGMII1);
1109		-MS_PIN_DECL_(E7, SIG_EXPR_LIST_PTR(GPIOT4), SIG_EXPR_LIST_PTR(RMII1DASH0),
1110		- SIG_EXPR_LIST_PTR(RGMII1TXD2));
	1169	+SIG_EXPR_LIST_DECL_SINGLE(E7, GPIOT4, GPIOT4, SIG_DESC_SET(SCUA0, 4));
	1170	+SIG_EXPR_LIST_DECL_SINGLE(E7, RMII1DASH0, RMII1, RMII1_DESC);
	1171	+SIG_EXPR_LIST_DECL_SINGLE(E7, RGMII1TXD2, RGMII1);
	1172	+PIN_DECL_(E7, SIG_EXPR_LIST_PTR(E7, GPIOT4), SIG_EXPR_LIST_PTR(E7, RMII1DASH0),
	1173	+ SIG_EXPR_LIST_PTR(E7, RGMII1TXD2));
1111	1174
1112	1175	#define D7 157
1113		-SIG_EXPR_LIST_DECL_SINGLE(GPIOT5, GPIOT5, SIG_DESC_SET(SCUA0, 5));
1114		-SIG_EXPR_LIST_DECL_SINGLE(RMII1DASH1, RMII1, RMII1_DESC);
1115		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD3, RGMII1);
1116		-MS_PIN_DECL_(D7, SIG_EXPR_LIST_PTR(GPIOT5), SIG_EXPR_LIST_PTR(RMII1DASH1),
1117		- SIG_EXPR_LIST_PTR(RGMII1TXD3));
	1176	+SIG_EXPR_LIST_DECL_SINGLE(D7, GPIOT5, GPIOT5, SIG_DESC_SET(SCUA0, 5));
	1177	+SIG_EXPR_LIST_DECL_SINGLE(D7, RMII1DASH1, RMII1, RMII1_DESC);
	1178	+SIG_EXPR_LIST_DECL_SINGLE(D7, RGMII1TXD3, RGMII1);
	1179	+PIN_DECL_(D7, SIG_EXPR_LIST_PTR(D7, GPIOT5), SIG_EXPR_LIST_PTR(D7, RMII1DASH1),
	1180	+ SIG_EXPR_LIST_PTR(D7, RGMII1TXD3));
1118	1181
1119	1182	#define B2 158
1120		-SIG_EXPR_LIST_DECL_SINGLE(GPIOT6, GPIOT6, SIG_DESC_SET(SCUA0, 6));
1121		-SIG_EXPR_LIST_DECL_SINGLE(RMII2RCLKO, RMII2, RMII2_DESC,
	1183	+SIG_EXPR_LIST_DECL_SINGLE(B2, GPIOT6, GPIOT6, SIG_DESC_SET(SCUA0, 6));
	1184	+SIG_EXPR_LIST_DECL_SINGLE(B2, RMII2RCLKO, RMII2, RMII2_DESC,
1122	1185	SIG_DESC_SET(SCU48, 30));
1123		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXCK, RGMII2);
1124		-MS_PIN_DECL_(B2, SIG_EXPR_LIST_PTR(GPIOT6), SIG_EXPR_LIST_PTR(RMII2RCLKO),
1125		- SIG_EXPR_LIST_PTR(RGMII2TXCK));
	1186	+SIG_EXPR_LIST_DECL_SINGLE(B2, RGMII2TXCK, RGMII2);
	1187	+PIN_DECL_(B2, SIG_EXPR_LIST_PTR(B2, GPIOT6), SIG_EXPR_LIST_PTR(B2, RMII2RCLKO),
	1188	+ SIG_EXPR_LIST_PTR(B2, RGMII2TXCK));
1126	1189
1127	1190	#define B1 159
1128		-SIG_EXPR_LIST_DECL_SINGLE(GPIOT7, GPIOT7, SIG_DESC_SET(SCUA0, 7));
1129		-SIG_EXPR_LIST_DECL_SINGLE(RMII2TXEN, RMII2, RMII2_DESC);
1130		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXCTL, RGMII2);
1131		-MS_PIN_DECL_(B1, SIG_EXPR_LIST_PTR(GPIOT7), SIG_EXPR_LIST_PTR(RMII2TXEN),
1132		- SIG_EXPR_LIST_PTR(RGMII2TXCTL));
	1191	+SIG_EXPR_LIST_DECL_SINGLE(B1, GPIOT7, GPIOT7, SIG_DESC_SET(SCUA0, 7));
	1192	+SIG_EXPR_LIST_DECL_SINGLE(B1, RMII2TXEN, RMII2, RMII2_DESC);
	1193	+SIG_EXPR_LIST_DECL_SINGLE(B1, RGMII2TXCTL, RGMII2);
	1194	+PIN_DECL_(B1, SIG_EXPR_LIST_PTR(B1, GPIOT7), SIG_EXPR_LIST_PTR(B1, RMII2TXEN),
	1195	+ SIG_EXPR_LIST_PTR(B1, RGMII2TXCTL));
1133	1196
1134	1197	#define A2 160
1135		-SIG_EXPR_LIST_DECL_SINGLE(GPIOU0, GPIOU0, SIG_DESC_SET(SCUA0, 8));
1136		-SIG_EXPR_LIST_DECL_SINGLE(RMII2TXD0, RMII2, RMII2_DESC);
1137		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD0, RGMII2);
1138		-MS_PIN_DECL_(A2, SIG_EXPR_LIST_PTR(GPIOU0), SIG_EXPR_LIST_PTR(RMII2TXD0),
1139		- SIG_EXPR_LIST_PTR(RGMII2TXD0));
	1198	+SIG_EXPR_LIST_DECL_SINGLE(A2, GPIOU0, GPIOU0, SIG_DESC_SET(SCUA0, 8));
	1199	+SIG_EXPR_LIST_DECL_SINGLE(A2, RMII2TXD0, RMII2, RMII2_DESC);
	1200	+SIG_EXPR_LIST_DECL_SINGLE(A2, RGMII2TXD0, RGMII2);
	1201	+PIN_DECL_(A2, SIG_EXPR_LIST_PTR(A2, GPIOU0), SIG_EXPR_LIST_PTR(A2, RMII2TXD0),
	1202	+ SIG_EXPR_LIST_PTR(A2, RGMII2TXD0));
1140	1203
1141	1204	#define B3 161
1142		-SIG_EXPR_LIST_DECL_SINGLE(GPIOU1, GPIOU1, SIG_DESC_SET(SCUA0, 9));
1143		-SIG_EXPR_LIST_DECL_SINGLE(RMII2TXD1, RMII2, RMII2_DESC);
1144		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD1, RGMII2);
1145		-MS_PIN_DECL_(B3, SIG_EXPR_LIST_PTR(GPIOU1), SIG_EXPR_LIST_PTR(RMII2TXD1),
1146		- SIG_EXPR_LIST_PTR(RGMII2TXD1));
	1205	+SIG_EXPR_LIST_DECL_SINGLE(B3, GPIOU1, GPIOU1, SIG_DESC_SET(SCUA0, 9));
	1206	+SIG_EXPR_LIST_DECL_SINGLE(B3, RMII2TXD1, RMII2, RMII2_DESC);
	1207	+SIG_EXPR_LIST_DECL_SINGLE(B3, RGMII2TXD1, RGMII2);
	1208	+PIN_DECL_(B3, SIG_EXPR_LIST_PTR(B3, GPIOU1), SIG_EXPR_LIST_PTR(B3, RMII2TXD1),
	1209	+ SIG_EXPR_LIST_PTR(B3, RGMII2TXD1));
1147	1210
1148	1211	#define D5 162
1149		-SIG_EXPR_LIST_DECL_SINGLE(GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10));
1150		-SIG_EXPR_LIST_DECL_SINGLE(RMII2DASH0, RMII2, RMII2_DESC);
1151		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD2, RGMII2);
1152		-MS_PIN_DECL_(D5, SIG_EXPR_LIST_PTR(GPIOU2), SIG_EXPR_LIST_PTR(RMII2DASH0),
1153		- SIG_EXPR_LIST_PTR(RGMII2TXD2));
	1212	+SIG_EXPR_LIST_DECL_SINGLE(D5, GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10));
	1213	+SIG_EXPR_LIST_DECL_SINGLE(D5, RMII2DASH0, RMII2, RMII2_DESC);
	1214	+SIG_EXPR_LIST_DECL_SINGLE(D5, RGMII2TXD2, RGMII2);
	1215	+PIN_DECL_(D5, SIG_EXPR_LIST_PTR(D5, GPIOU2), SIG_EXPR_LIST_PTR(D5, RMII2DASH0),
	1216	+ SIG_EXPR_LIST_PTR(D5, RGMII2TXD2));
1154	1217
1155	1218	#define D4 163
1156		-SIG_EXPR_LIST_DECL_SINGLE(GPIOU3, GPIOU3, SIG_DESC_SET(SCUA0, 11));
1157		-SIG_EXPR_LIST_DECL_SINGLE(RMII2DASH1, RMII2, RMII2_DESC);
1158		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD3, RGMII2);
1159		-MS_PIN_DECL_(D4, SIG_EXPR_LIST_PTR(GPIOU3), SIG_EXPR_LIST_PTR(RMII2DASH1),
1160		- SIG_EXPR_LIST_PTR(RGMII2TXD3));
	1219	+SIG_EXPR_LIST_DECL_SINGLE(D4, GPIOU3, GPIOU3, SIG_DESC_SET(SCUA0, 11));
	1220	+SIG_EXPR_LIST_DECL_SINGLE(D4, RMII2DASH1, RMII2, RMII2_DESC);
	1221	+SIG_EXPR_LIST_DECL_SINGLE(D4, RGMII2TXD3, RGMII2);
	1222	+PIN_DECL_(D4, SIG_EXPR_LIST_PTR(D4, GPIOU3), SIG_EXPR_LIST_PTR(D4, RMII2DASH1),
	1223	+ SIG_EXPR_LIST_PTR(D4, RGMII2TXD3));
1161	1224
1162	1225	#define B4 164
1163		-SIG_EXPR_LIST_DECL_SINGLE(GPIOU4, GPIOU4, SIG_DESC_SET(SCUA0, 12));
1164		-SIG_EXPR_LIST_DECL_SINGLE(RMII1RCLKI, RMII1, RMII1_DESC);
1165		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCK, RGMII1);
1166		-MS_PIN_DECL_(B4, SIG_EXPR_LIST_PTR(GPIOU4), SIG_EXPR_LIST_PTR(RMII1RCLKI),
1167		- SIG_EXPR_LIST_PTR(RGMII1RXCK));
	1226	+SIG_EXPR_LIST_DECL_SINGLE(B4, GPIOU4, GPIOU4, SIG_DESC_SET(SCUA0, 12));
	1227	+SIG_EXPR_LIST_DECL_SINGLE(B4, RMII1RCLKI, RMII1, RMII1_DESC);
	1228	+SIG_EXPR_LIST_DECL_SINGLE(B4, RGMII1RXCK, RGMII1);
	1229	+PIN_DECL_(B4, SIG_EXPR_LIST_PTR(B4, GPIOU4), SIG_EXPR_LIST_PTR(B4, RMII1RCLKI),
	1230	+ SIG_EXPR_LIST_PTR(B4, RGMII1RXCK));
1168	1231
1169	1232	#define A4 165
1170		-SIG_EXPR_LIST_DECL_SINGLE(GPIOU5, GPIOU5, SIG_DESC_SET(SCUA0, 13));
1171		-SIG_EXPR_LIST_DECL_SINGLE(RMII1DASH2, RMII1, RMII1_DESC);
1172		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCTL, RGMII1);
1173		-MS_PIN_DECL_(A4, SIG_EXPR_LIST_PTR(GPIOU5), SIG_EXPR_LIST_PTR(RMII1DASH2),
1174		- SIG_EXPR_LIST_PTR(RGMII1RXCTL));
	1233	+SIG_EXPR_LIST_DECL_SINGLE(A4, GPIOU5, GPIOU5, SIG_DESC_SET(SCUA0, 13));
	1234	+SIG_EXPR_LIST_DECL_SINGLE(A4, RMII1DASH2, RMII1, RMII1_DESC);
	1235	+SIG_EXPR_LIST_DECL_SINGLE(A4, RGMII1RXCTL, RGMII1);
	1236	+PIN_DECL_(A4, SIG_EXPR_LIST_PTR(A4, GPIOU5), SIG_EXPR_LIST_PTR(A4, RMII1DASH2),
	1237	+ SIG_EXPR_LIST_PTR(A4, RGMII1RXCTL));
1175	1238
1176	1239	#define A3 166
1177		-SIG_EXPR_LIST_DECL_SINGLE(GPIOU6, GPIOU6, SIG_DESC_SET(SCUA0, 14));
1178		-SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD0, RMII1, RMII1_DESC);
1179		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD0, RGMII1);
1180		-MS_PIN_DECL_(A3, SIG_EXPR_LIST_PTR(GPIOU6), SIG_EXPR_LIST_PTR(RMII1RXD0),
1181		- SIG_EXPR_LIST_PTR(RGMII1RXD0));
	1240	+SIG_EXPR_LIST_DECL_SINGLE(A3, GPIOU6, GPIOU6, SIG_DESC_SET(SCUA0, 14));
	1241	+SIG_EXPR_LIST_DECL_SINGLE(A3, RMII1RXD0, RMII1, RMII1_DESC);
	1242	+SIG_EXPR_LIST_DECL_SINGLE(A3, RGMII1RXD0, RGMII1);
	1243	+PIN_DECL_(A3, SIG_EXPR_LIST_PTR(A3, GPIOU6), SIG_EXPR_LIST_PTR(A3, RMII1RXD0),
	1244	+ SIG_EXPR_LIST_PTR(A3, RGMII1RXD0));
1182	1245
1183	1246	#define D6 167
1184		-SIG_EXPR_LIST_DECL_SINGLE(GPIOU7, GPIOU7, SIG_DESC_SET(SCUA0, 15));
1185		-SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD1, RMII1, RMII1_DESC);
1186		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD1, RGMII1);
1187		-MS_PIN_DECL_(D6, SIG_EXPR_LIST_PTR(GPIOU7), SIG_EXPR_LIST_PTR(RMII1RXD1),
1188		- SIG_EXPR_LIST_PTR(RGMII1RXD1));
	1247	+SIG_EXPR_LIST_DECL_SINGLE(D6, GPIOU7, GPIOU7, SIG_DESC_SET(SCUA0, 15));
	1248	+SIG_EXPR_LIST_DECL_SINGLE(D6, RMII1RXD1, RMII1, RMII1_DESC);
	1249	+SIG_EXPR_LIST_DECL_SINGLE(D6, RGMII1RXD1, RGMII1);
	1250	+PIN_DECL_(D6, SIG_EXPR_LIST_PTR(D6, GPIOU7), SIG_EXPR_LIST_PTR(D6, RMII1RXD1),
	1251	+ SIG_EXPR_LIST_PTR(D6, RGMII1RXD1));
1189	1252
1190	1253	#define C5 168
1191		-SIG_EXPR_LIST_DECL_SINGLE(GPIOV0, GPIOV0, SIG_DESC_SET(SCUA0, 16));
1192		-SIG_EXPR_LIST_DECL_SINGLE(RMII1CRSDV, RMII1, RMII1_DESC);
1193		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD2, RGMII1);
1194		-MS_PIN_DECL_(C5, SIG_EXPR_LIST_PTR(GPIOV0), SIG_EXPR_LIST_PTR(RMII1CRSDV),
1195		- SIG_EXPR_LIST_PTR(RGMII1RXD2));
	1254	+SIG_EXPR_LIST_DECL_SINGLE(C5, GPIOV0, GPIOV0, SIG_DESC_SET(SCUA0, 16));
	1255	+SIG_EXPR_LIST_DECL_SINGLE(C5, RMII1CRSDV, RMII1, RMII1_DESC);
	1256	+SIG_EXPR_LIST_DECL_SINGLE(C5, RGMII1RXD2, RGMII1);
	1257	+PIN_DECL_(C5, SIG_EXPR_LIST_PTR(C5, GPIOV0), SIG_EXPR_LIST_PTR(C5, RMII1CRSDV),
	1258	+ SIG_EXPR_LIST_PTR(C5, RGMII1RXD2));
1196	1259
1197	1260	#define C4 169
1198		-SIG_EXPR_LIST_DECL_SINGLE(GPIOV1, GPIOV1, SIG_DESC_SET(SCUA0, 17));
1199		-SIG_EXPR_LIST_DECL_SINGLE(RMII1RXER, RMII1, RMII1_DESC);
1200		-SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD3, RGMII1);
1201		-MS_PIN_DECL_(C4, SIG_EXPR_LIST_PTR(GPIOV1), SIG_EXPR_LIST_PTR(RMII1RXER),
1202		- SIG_EXPR_LIST_PTR(RGMII1RXD3));
	1261	+SIG_EXPR_LIST_DECL_SINGLE(C4, GPIOV1, GPIOV1, SIG_DESC_SET(SCUA0, 17));
	1262	+SIG_EXPR_LIST_DECL_SINGLE(C4, RMII1RXER, RMII1, RMII1_DESC);
	1263	+SIG_EXPR_LIST_DECL_SINGLE(C4, RGMII1RXD3, RGMII1);
	1264	+PIN_DECL_(C4, SIG_EXPR_LIST_PTR(C4, GPIOV1), SIG_EXPR_LIST_PTR(C4, RMII1RXER),
	1265	+ SIG_EXPR_LIST_PTR(C4, RGMII1RXD3));
1203	1266
1204	1267	FUNC_GROUP_DECL(RGMII1, B4, A4, A3, D6, C5, C4, B5, E9, F9, A5, E7, D7);
1205	1268	FUNC_GROUP_DECL(RMII1, B4, A3, D6, C5, C4, B5, E9, F9, A5);
1206	1269
1207	1270	#define C2 170
1208		-SIG_EXPR_LIST_DECL_SINGLE(GPIOV2, GPIOV2, SIG_DESC_SET(SCUA0, 18));
1209		-SIG_EXPR_LIST_DECL_SINGLE(RMII2RCLKI, RMII2, RMII2_DESC);
1210		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXCK, RGMII2);
1211		-MS_PIN_DECL_(C2, SIG_EXPR_LIST_PTR(GPIOV2), SIG_EXPR_LIST_PTR(RMII2RCLKI),
1212		- SIG_EXPR_LIST_PTR(RGMII2RXCK));
	1271	+SIG_EXPR_LIST_DECL_SINGLE(C2, GPIOV2, GPIOV2, SIG_DESC_SET(SCUA0, 18));
	1272	+SIG_EXPR_LIST_DECL_SINGLE(C2, RMII2RCLKI, RMII2, RMII2_DESC);
	1273	+SIG_EXPR_LIST_DECL_SINGLE(C2, RGMII2RXCK, RGMII2);
	1274	+PIN_DECL_(C2, SIG_EXPR_LIST_PTR(C2, GPIOV2), SIG_EXPR_LIST_PTR(C2, RMII2RCLKI),
	1275	+ SIG_EXPR_LIST_PTR(C2, RGMII2RXCK));
1213	1276
1214	1277	#define C1 171
1215		-SIG_EXPR_LIST_DECL_SINGLE(GPIOV3, GPIOV3, SIG_DESC_SET(SCUA0, 19));
1216		-SIG_EXPR_LIST_DECL_SINGLE(RMII2DASH2, RMII2, RMII2_DESC);
1217		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXCTL, RGMII2);
1218		-MS_PIN_DECL_(C1, SIG_EXPR_LIST_PTR(GPIOV3), SIG_EXPR_LIST_PTR(RMII2DASH2),
1219		- SIG_EXPR_LIST_PTR(RGMII2RXCTL));
	1278	+SIG_EXPR_LIST_DECL_SINGLE(C1, GPIOV3, GPIOV3, SIG_DESC_SET(SCUA0, 19));
	1279	+SIG_EXPR_LIST_DECL_SINGLE(C1, RMII2DASH2, RMII2, RMII2_DESC);
	1280	+SIG_EXPR_LIST_DECL_SINGLE(C1, RGMII2RXCTL, RGMII2);
	1281	+PIN_DECL_(C1, SIG_EXPR_LIST_PTR(C1, GPIOV3), SIG_EXPR_LIST_PTR(C1, RMII2DASH2),
	1282	+ SIG_EXPR_LIST_PTR(C1, RGMII2RXCTL));
1220	1283
1221	1284	#define C3 172
1222		-SIG_EXPR_LIST_DECL_SINGLE(GPIOV4, GPIOV4, SIG_DESC_SET(SCUA0, 20));
1223		-SIG_EXPR_LIST_DECL_SINGLE(RMII2RXD0, RMII2, RMII2_DESC);
1224		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD0, RGMII2);
1225		-MS_PIN_DECL_(C3, SIG_EXPR_LIST_PTR(GPIOV4), SIG_EXPR_LIST_PTR(RMII2RXD0),
1226		- SIG_EXPR_LIST_PTR(RGMII2RXD0));
	1285	+SIG_EXPR_LIST_DECL_SINGLE(C3, GPIOV4, GPIOV4, SIG_DESC_SET(SCUA0, 20));
	1286	+SIG_EXPR_LIST_DECL_SINGLE(C3, RMII2RXD0, RMII2, RMII2_DESC);
	1287	+SIG_EXPR_LIST_DECL_SINGLE(C3, RGMII2RXD0, RGMII2);
	1288	+PIN_DECL_(C3, SIG_EXPR_LIST_PTR(C3, GPIOV4), SIG_EXPR_LIST_PTR(C3, RMII2RXD0),
	1289	+ SIG_EXPR_LIST_PTR(C3, RGMII2RXD0));
1227	1290
1228	1291	#define D1 173
1229		-SIG_EXPR_LIST_DECL_SINGLE(GPIOV5, GPIOV5, SIG_DESC_SET(SCUA0, 21));
1230		-SIG_EXPR_LIST_DECL_SINGLE(RMII2RXD1, RMII2, RMII2_DESC);
1231		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD1, RGMII2);
1232		-MS_PIN_DECL_(D1, SIG_EXPR_LIST_PTR(GPIOV5), SIG_EXPR_LIST_PTR(RMII2RXD1),
1233		- SIG_EXPR_LIST_PTR(RGMII2RXD1));
	1292	+SIG_EXPR_LIST_DECL_SINGLE(D1, GPIOV5, GPIOV5, SIG_DESC_SET(SCUA0, 21));
	1293	+SIG_EXPR_LIST_DECL_SINGLE(D1, RMII2RXD1, RMII2, RMII2_DESC);
	1294	+SIG_EXPR_LIST_DECL_SINGLE(D1, RGMII2RXD1, RGMII2);
	1295	+PIN_DECL_(D1, SIG_EXPR_LIST_PTR(D1, GPIOV5), SIG_EXPR_LIST_PTR(D1, RMII2RXD1),
	1296	+ SIG_EXPR_LIST_PTR(D1, RGMII2RXD1));
1234	1297
1235	1298	#define D2 174
1236		-SIG_EXPR_LIST_DECL_SINGLE(GPIOV6, GPIOV6, SIG_DESC_SET(SCUA0, 22));
1237		-SIG_EXPR_LIST_DECL_SINGLE(RMII2CRSDV, RMII2, RMII2_DESC);
1238		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD2, RGMII2);
1239		-MS_PIN_DECL_(D2, SIG_EXPR_LIST_PTR(GPIOV6), SIG_EXPR_LIST_PTR(RMII2CRSDV),
1240		- SIG_EXPR_LIST_PTR(RGMII2RXD2));
	1299	+SIG_EXPR_LIST_DECL_SINGLE(D2, GPIOV6, GPIOV6, SIG_DESC_SET(SCUA0, 22));
	1300	+SIG_EXPR_LIST_DECL_SINGLE(D2, RMII2CRSDV, RMII2, RMII2_DESC);
	1301	+SIG_EXPR_LIST_DECL_SINGLE(D2, RGMII2RXD2, RGMII2);
	1302	+PIN_DECL_(D2, SIG_EXPR_LIST_PTR(D2, GPIOV6), SIG_EXPR_LIST_PTR(D2, RMII2CRSDV),
	1303	+ SIG_EXPR_LIST_PTR(D2, RGMII2RXD2));
1241	1304
1242	1305	#define E6 175
1243		-SIG_EXPR_LIST_DECL_SINGLE(GPIOV7, GPIOV7, SIG_DESC_SET(SCUA0, 23));
1244		-SIG_EXPR_LIST_DECL_SINGLE(RMII2RXER, RMII2, RMII2_DESC);
1245		-SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD3, RGMII2);
1246		-MS_PIN_DECL_(E6, SIG_EXPR_LIST_PTR(GPIOV7), SIG_EXPR_LIST_PTR(RMII2RXER),
1247		- SIG_EXPR_LIST_PTR(RGMII2RXD3));
	1306	+SIG_EXPR_LIST_DECL_SINGLE(E6, GPIOV7, GPIOV7, SIG_DESC_SET(SCUA0, 23));
	1307	+SIG_EXPR_LIST_DECL_SINGLE(E6, RMII2RXER, RMII2, RMII2_DESC);
	1308	+SIG_EXPR_LIST_DECL_SINGLE(E6, RGMII2RXD3, RGMII2);
	1309	+PIN_DECL_(E6, SIG_EXPR_LIST_PTR(E6, GPIOV7), SIG_EXPR_LIST_PTR(E6, RMII2RXER),
	1310	+ SIG_EXPR_LIST_PTR(E6, RGMII2RXD3));
1248	1311
1249	1312	FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
1250	1313	FUNC_GROUP_DECL(RMII2, B2, B1, A2, B3, C2, C3, D1, D2, E6);
1251	1314
1252	1315	#define F4 176
1253		-SIG_EXPR_LIST_DECL_SINGLE(GPIOW0, GPIOW0, SIG_DESC_SET(SCUA0, 24));
1254		-SIG_EXPR_LIST_DECL_SINGLE(ADC0, ADC0);
1255		-MS_PIN_DECL_(F4, SIG_EXPR_LIST_PTR(GPIOW0), SIG_EXPR_LIST_PTR(ADC0));
	1316	+SIG_EXPR_LIST_DECL_SINGLE(F4, GPIOW0, GPIOW0, SIG_DESC_SET(SCUA0, 24));
	1317	+SIG_EXPR_LIST_DECL_SINGLE(F4, ADC0, ADC0);
	1318	+PIN_DECL_(F4, SIG_EXPR_LIST_PTR(F4, GPIOW0), SIG_EXPR_LIST_PTR(F4, ADC0));
1256	1319	FUNC_GROUP_DECL(ADC0, F4);
1257	1320
1258	1321	#define F5 177
1259		-SIG_EXPR_LIST_DECL_SINGLE(GPIOW1, GPIOW1, SIG_DESC_SET(SCUA0, 25));
1260		-SIG_EXPR_LIST_DECL_SINGLE(ADC1, ADC1);
1261		-MS_PIN_DECL_(F5, SIG_EXPR_LIST_PTR(GPIOW1), SIG_EXPR_LIST_PTR(ADC1));
	1322	+SIG_EXPR_LIST_DECL_SINGLE(F5, GPIOW1, GPIOW1, SIG_DESC_SET(SCUA0, 25));
	1323	+SIG_EXPR_LIST_DECL_SINGLE(F5, ADC1, ADC1);
	1324	+PIN_DECL_(F5, SIG_EXPR_LIST_PTR(F5, GPIOW1), SIG_EXPR_LIST_PTR(F5, ADC1));
1262	1325	FUNC_GROUP_DECL(ADC1, F5);
1263	1326
1264	1327	#define E2 178
1265		-SIG_EXPR_LIST_DECL_SINGLE(GPIOW2, GPIOW2, SIG_DESC_SET(SCUA0, 26));
1266		-SIG_EXPR_LIST_DECL_SINGLE(ADC2, ADC2);
1267		-MS_PIN_DECL_(E2, SIG_EXPR_LIST_PTR(GPIOW2), SIG_EXPR_LIST_PTR(ADC2));
	1328	+SIG_EXPR_LIST_DECL_SINGLE(E2, GPIOW2, GPIOW2, SIG_DESC_SET(SCUA0, 26));
	1329	+SIG_EXPR_LIST_DECL_SINGLE(E2, ADC2, ADC2);
	1330	+PIN_DECL_(E2, SIG_EXPR_LIST_PTR(E2, GPIOW2), SIG_EXPR_LIST_PTR(E2, ADC2));
1268	1331	FUNC_GROUP_DECL(ADC2, E2);
1269	1332
1270	1333	#define E1 179
1271		-SIG_EXPR_LIST_DECL_SINGLE(GPIOW3, GPIOW3, SIG_DESC_SET(SCUA0, 27));
1272		-SIG_EXPR_LIST_DECL_SINGLE(ADC3, ADC3);
1273		-MS_PIN_DECL_(E1, SIG_EXPR_LIST_PTR(GPIOW3), SIG_EXPR_LIST_PTR(ADC3));
	1334	+SIG_EXPR_LIST_DECL_SINGLE(E1, GPIOW3, GPIOW3, SIG_DESC_SET(SCUA0, 27));
	1335	+SIG_EXPR_LIST_DECL_SINGLE(E1, ADC3, ADC3);
	1336	+PIN_DECL_(E1, SIG_EXPR_LIST_PTR(E1, GPIOW3), SIG_EXPR_LIST_PTR(E1, ADC3));
1274	1337	FUNC_GROUP_DECL(ADC3, E1);
1275	1338
1276	1339	#define F3 180
1277		-SIG_EXPR_LIST_DECL_SINGLE(GPIOW4, GPIOW4, SIG_DESC_SET(SCUA0, 28));
1278		-SIG_EXPR_LIST_DECL_SINGLE(ADC4, ADC4);
1279		-MS_PIN_DECL_(F3, SIG_EXPR_LIST_PTR(GPIOW4), SIG_EXPR_LIST_PTR(ADC4));
	1340	+SIG_EXPR_LIST_DECL_SINGLE(F3, GPIOW4, GPIOW4, SIG_DESC_SET(SCUA0, 28));
	1341	+SIG_EXPR_LIST_DECL_SINGLE(F3, ADC4, ADC4);
	1342	+PIN_DECL_(F3, SIG_EXPR_LIST_PTR(F3, GPIOW4), SIG_EXPR_LIST_PTR(F3, ADC4));
1280	1343	FUNC_GROUP_DECL(ADC4, F3);
1281	1344
1282	1345	#define E3 181
1283		-SIG_EXPR_LIST_DECL_SINGLE(GPIOW5, GPIOW5, SIG_DESC_SET(SCUA0, 29));
1284		-SIG_EXPR_LIST_DECL_SINGLE(ADC5, ADC5);
1285		-MS_PIN_DECL_(E3, SIG_EXPR_LIST_PTR(GPIOW5), SIG_EXPR_LIST_PTR(ADC5));
	1346	+SIG_EXPR_LIST_DECL_SINGLE(E3, GPIOW5, GPIOW5, SIG_DESC_SET(SCUA0, 29));
	1347	+SIG_EXPR_LIST_DECL_SINGLE(E3, ADC5, ADC5);
	1348	+PIN_DECL_(E3, SIG_EXPR_LIST_PTR(E3, GPIOW5), SIG_EXPR_LIST_PTR(E3, ADC5));
1286	1349	FUNC_GROUP_DECL(ADC5, E3);
1287	1350
1288	1351	#define G5 182
1289		-SIG_EXPR_LIST_DECL_SINGLE(GPIOW6, GPIOW6, SIG_DESC_SET(SCUA0, 30));
1290		-SIG_EXPR_LIST_DECL_SINGLE(ADC6, ADC6);
1291		-MS_PIN_DECL_(G5, SIG_EXPR_LIST_PTR(GPIOW6), SIG_EXPR_LIST_PTR(ADC6));
	1352	+SIG_EXPR_LIST_DECL_SINGLE(G5, GPIOW6, GPIOW6, SIG_DESC_SET(SCUA0, 30));
	1353	+SIG_EXPR_LIST_DECL_SINGLE(G5, ADC6, ADC6);
	1354	+PIN_DECL_(G5, SIG_EXPR_LIST_PTR(G5, GPIOW6), SIG_EXPR_LIST_PTR(G5, ADC6));
1292	1355	FUNC_GROUP_DECL(ADC6, G5);
1293	1356
1294	1357	#define G4 183
1295		-SIG_EXPR_LIST_DECL_SINGLE(GPIOW7, GPIOW7, SIG_DESC_SET(SCUA0, 31));
1296		-SIG_EXPR_LIST_DECL_SINGLE(ADC7, ADC7);
1297		-MS_PIN_DECL_(G4, SIG_EXPR_LIST_PTR(GPIOW7), SIG_EXPR_LIST_PTR(ADC7));
	1358	+SIG_EXPR_LIST_DECL_SINGLE(G4, GPIOW7, GPIOW7, SIG_DESC_SET(SCUA0, 31));
	1359	+SIG_EXPR_LIST_DECL_SINGLE(G4, ADC7, ADC7);
	1360	+PIN_DECL_(G4, SIG_EXPR_LIST_PTR(G4, GPIOW7), SIG_EXPR_LIST_PTR(G4, ADC7));
1298	1361	FUNC_GROUP_DECL(ADC7, G4);
1299	1362
1300	1363	#define F2 184
1301		-SIG_EXPR_LIST_DECL_SINGLE(GPIOX0, GPIOX0, SIG_DESC_SET(SCUA4, 0));
1302		-SIG_EXPR_LIST_DECL_SINGLE(ADC8, ADC8);
1303		-MS_PIN_DECL_(F2, SIG_EXPR_LIST_PTR(GPIOX0), SIG_EXPR_LIST_PTR(ADC8));
	1364	+SIG_EXPR_LIST_DECL_SINGLE(F2, GPIOX0, GPIOX0, SIG_DESC_SET(SCUA4, 0));
	1365	+SIG_EXPR_LIST_DECL_SINGLE(F2, ADC8, ADC8);
	1366	+PIN_DECL_(F2, SIG_EXPR_LIST_PTR(F2, GPIOX0), SIG_EXPR_LIST_PTR(F2, ADC8));
1304	1367	FUNC_GROUP_DECL(ADC8, F2);
1305	1368
1306	1369	#define G3 185
1307		-SIG_EXPR_LIST_DECL_SINGLE(GPIOX1, GPIOX1, SIG_DESC_SET(SCUA4, 1));
1308		-SIG_EXPR_LIST_DECL_SINGLE(ADC9, ADC9);
1309		-MS_PIN_DECL_(G3, SIG_EXPR_LIST_PTR(GPIOX1), SIG_EXPR_LIST_PTR(ADC9));
	1370	+SIG_EXPR_LIST_DECL_SINGLE(G3, GPIOX1, GPIOX1, SIG_DESC_SET(SCUA4, 1));
	1371	+SIG_EXPR_LIST_DECL_SINGLE(G3, ADC9, ADC9);
	1372	+PIN_DECL_(G3, SIG_EXPR_LIST_PTR(G3, GPIOX1), SIG_EXPR_LIST_PTR(G3, ADC9));
1310	1373	FUNC_GROUP_DECL(ADC9, G3);
1311	1374
1312	1375	#define G2 186
1313		-SIG_EXPR_LIST_DECL_SINGLE(GPIOX2, GPIOX2, SIG_DESC_SET(SCUA4, 2));
1314		-SIG_EXPR_LIST_DECL_SINGLE(ADC10, ADC10);
1315		-MS_PIN_DECL_(G2, SIG_EXPR_LIST_PTR(GPIOX2), SIG_EXPR_LIST_PTR(ADC10));
	1376	+SIG_EXPR_LIST_DECL_SINGLE(G2, GPIOX2, GPIOX2, SIG_DESC_SET(SCUA4, 2));
	1377	+SIG_EXPR_LIST_DECL_SINGLE(G2, ADC10, ADC10);
	1378	+PIN_DECL_(G2, SIG_EXPR_LIST_PTR(G2, GPIOX2), SIG_EXPR_LIST_PTR(G2, ADC10));
1316	1379	FUNC_GROUP_DECL(ADC10, G2);
1317	1380
1318	1381	#define F1 187
1319		-SIG_EXPR_LIST_DECL_SINGLE(GPIOX3, GPIOX3, SIG_DESC_SET(SCUA4, 3));
1320		-SIG_EXPR_LIST_DECL_SINGLE(ADC11, ADC11);
1321		-MS_PIN_DECL_(F1, SIG_EXPR_LIST_PTR(GPIOX3), SIG_EXPR_LIST_PTR(ADC11));
	1382	+SIG_EXPR_LIST_DECL_SINGLE(F1, GPIOX3, GPIOX3, SIG_DESC_SET(SCUA4, 3));
	1383	+SIG_EXPR_LIST_DECL_SINGLE(F1, ADC11, ADC11);
	1384	+PIN_DECL_(F1, SIG_EXPR_LIST_PTR(F1, GPIOX3), SIG_EXPR_LIST_PTR(F1, ADC11));
1322	1385	FUNC_GROUP_DECL(ADC11, F1);
1323	1386
1324	1387	#define H5 188
1325		-SIG_EXPR_LIST_DECL_SINGLE(GPIOX4, GPIOX4, SIG_DESC_SET(SCUA4, 4));
1326		-SIG_EXPR_LIST_DECL_SINGLE(ADC12, ADC12);
1327		-MS_PIN_DECL_(H5, SIG_EXPR_LIST_PTR(GPIOX4), SIG_EXPR_LIST_PTR(ADC12));
	1388	+SIG_EXPR_LIST_DECL_SINGLE(H5, GPIOX4, GPIOX4, SIG_DESC_SET(SCUA4, 4));
	1389	+SIG_EXPR_LIST_DECL_SINGLE(H5, ADC12, ADC12);
	1390	+PIN_DECL_(H5, SIG_EXPR_LIST_PTR(H5, GPIOX4), SIG_EXPR_LIST_PTR(H5, ADC12));
1328	1391	FUNC_GROUP_DECL(ADC12, H5);
1329	1392
1330	1393	#define G1 189
1331		-SIG_EXPR_LIST_DECL_SINGLE(GPIOX5, GPIOX5, SIG_DESC_SET(SCUA4, 5));
1332		-SIG_EXPR_LIST_DECL_SINGLE(ADC13, ADC13);
1333		-MS_PIN_DECL_(G1, SIG_EXPR_LIST_PTR(GPIOX5), SIG_EXPR_LIST_PTR(ADC13));
	1394	+SIG_EXPR_LIST_DECL_SINGLE(G1, GPIOX5, GPIOX5, SIG_DESC_SET(SCUA4, 5));
	1395	+SIG_EXPR_LIST_DECL_SINGLE(G1, ADC13, ADC13);
	1396	+PIN_DECL_(G1, SIG_EXPR_LIST_PTR(G1, GPIOX5), SIG_EXPR_LIST_PTR(G1, ADC13));
1334	1397	FUNC_GROUP_DECL(ADC13, G1);
1335	1398
1336	1399	#define H3 190
1337		-SIG_EXPR_LIST_DECL_SINGLE(GPIOX6, GPIOX6, SIG_DESC_SET(SCUA4, 6));
1338		-SIG_EXPR_LIST_DECL_SINGLE(ADC14, ADC14);
1339		-MS_PIN_DECL_(H3, SIG_EXPR_LIST_PTR(GPIOX6), SIG_EXPR_LIST_PTR(ADC14));
	1400	+SIG_EXPR_LIST_DECL_SINGLE(H3, GPIOX6, GPIOX6, SIG_DESC_SET(SCUA4, 6));
	1401	+SIG_EXPR_LIST_DECL_SINGLE(H3, ADC14, ADC14);
	1402	+PIN_DECL_(H3, SIG_EXPR_LIST_PTR(H3, GPIOX6), SIG_EXPR_LIST_PTR(H3, ADC14));
1340	1403	FUNC_GROUP_DECL(ADC14, H3);
1341	1404
1342	1405	#define H4 191
1343		-SIG_EXPR_LIST_DECL_SINGLE(GPIOX7, GPIOX7, SIG_DESC_SET(SCUA4, 7));
1344		-SIG_EXPR_LIST_DECL_SINGLE(ADC15, ADC15);
1345		-MS_PIN_DECL_(H4, SIG_EXPR_LIST_PTR(GPIOX7), SIG_EXPR_LIST_PTR(ADC15));
	1406	+SIG_EXPR_LIST_DECL_SINGLE(H4, GPIOX7, GPIOX7, SIG_DESC_SET(SCUA4, 7));
	1407	+SIG_EXPR_LIST_DECL_SINGLE(H4, ADC15, ADC15);
	1408	+PIN_DECL_(H4, SIG_EXPR_LIST_PTR(H4, GPIOX7), SIG_EXPR_LIST_PTR(H4, ADC15));
1346	1409	FUNC_GROUP_DECL(ADC15, H4);
1347	1410
1348	1411	#define ACPI_DESC SIG_DESC_SET(HW_STRAP1, 19)
1349	1412
1350	1413	#define R22 192
1351		-SIG_EXPR_DECL(SIOS3, SIOS3, SIG_DESC_SET(SCUA4, 8));
1352		-SIG_EXPR_DECL(SIOS3, ACPI, ACPI_DESC);
1353		-SIG_EXPR_LIST_DECL_DUAL(SIOS3, SIOS3, ACPI);
1354		-SIG_EXPR_LIST_DECL_SINGLE(DASHR22, DASHR22, SIG_DESC_SET(SCU94, 10));
1355		-MS_PIN_DECL(R22, GPIOY0, SIOS3, DASHR22);
	1414	+SIG_EXPR_DECL_SINGLE(SIOS3, SIOS3, SIG_DESC_SET(SCUA4, 8));
	1415	+SIG_EXPR_DECL_SINGLE(SIOS3, ACPI, ACPI_DESC);
	1416	+SIG_EXPR_LIST_DECL_DUAL(R22, SIOS3, SIOS3, ACPI);
	1417	+SIG_EXPR_LIST_DECL_SINGLE(R22, DASHR22, DASHR22, SIG_DESC_SET(SCU94, 10));
	1418	+PIN_DECL_2(R22, GPIOY0, SIOS3, DASHR22);
1356	1419	FUNC_GROUP_DECL(SIOS3, R22);
1357	1420
1358	1421	#define R21 193
1359		-SIG_EXPR_DECL(SIOS5, SIOS5, SIG_DESC_SET(SCUA4, 9));
1360		-SIG_EXPR_DECL(SIOS5, ACPI, ACPI_DESC);
1361		-SIG_EXPR_LIST_DECL_DUAL(SIOS5, SIOS5, ACPI);
1362		-SIG_EXPR_LIST_DECL_SINGLE(DASHR21, DASHR21, SIG_DESC_SET(SCU94, 10));
1363		-MS_PIN_DECL(R21, GPIOY1, SIOS5, DASHR21);
	1422	+SIG_EXPR_DECL_SINGLE(SIOS5, SIOS5, SIG_DESC_SET(SCUA4, 9));
	1423	+SIG_EXPR_DECL_SINGLE(SIOS5, ACPI, ACPI_DESC);
	1424	+SIG_EXPR_LIST_DECL_DUAL(R21, SIOS5, SIOS5, ACPI);
	1425	+SIG_EXPR_LIST_DECL_SINGLE(R21, DASHR21, DASHR21, SIG_DESC_SET(SCU94, 10));
	1426	+PIN_DECL_2(R21, GPIOY1, SIOS5, DASHR21);
1364	1427	FUNC_GROUP_DECL(SIOS5, R21);
1365	1428
1366	1429	#define P22 194
1367		-SIG_EXPR_DECL(SIOPWREQ, SIOPWREQ, SIG_DESC_SET(SCUA4, 10));
1368		-SIG_EXPR_DECL(SIOPWREQ, ACPI, ACPI_DESC);
1369		-SIG_EXPR_LIST_DECL_DUAL(SIOPWREQ, SIOPWREQ, ACPI);
1370		-SIG_EXPR_LIST_DECL_SINGLE(DASHP22, DASHP22, SIG_DESC_SET(SCU94, 11));
1371		-MS_PIN_DECL(P22, GPIOY2, SIOPWREQ, DASHP22);
	1430	+SIG_EXPR_DECL_SINGLE(SIOPWREQ, SIOPWREQ, SIG_DESC_SET(SCUA4, 10));
	1431	+SIG_EXPR_DECL_SINGLE(SIOPWREQ, ACPI, ACPI_DESC);
	1432	+SIG_EXPR_LIST_DECL_DUAL(P22, SIOPWREQ, SIOPWREQ, ACPI);
	1433	+SIG_EXPR_LIST_DECL_SINGLE(P22, DASHP22, DASHP22, SIG_DESC_SET(SCU94, 11));
	1434	+PIN_DECL_2(P22, GPIOY2, SIOPWREQ, DASHP22);
1372	1435	FUNC_GROUP_DECL(SIOPWREQ, P22);
1373	1436
1374	1437	#define P21 195
1375		-SIG_EXPR_DECL(SIOONCTRL, SIOONCTRL, SIG_DESC_SET(SCUA4, 11));
1376		-SIG_EXPR_DECL(SIOONCTRL, ACPI, ACPI_DESC);
1377		-SIG_EXPR_LIST_DECL_DUAL(SIOONCTRL, SIOONCTRL, ACPI);
1378		-SIG_EXPR_LIST_DECL_SINGLE(DASHP21, DASHP21, SIG_DESC_SET(SCU94, 11));
1379		-MS_PIN_DECL(P21, GPIOY3, SIOONCTRL, DASHP21);
	1438	+SIG_EXPR_DECL_SINGLE(SIOONCTRL, SIOONCTRL, SIG_DESC_SET(SCUA4, 11));
	1439	+SIG_EXPR_DECL_SINGLE(SIOONCTRL, ACPI, ACPI_DESC);
	1440	+SIG_EXPR_LIST_DECL_DUAL(P21, SIOONCTRL, SIOONCTRL, ACPI);
	1441	+SIG_EXPR_LIST_DECL_SINGLE(P21, DASHP21, DASHP21, SIG_DESC_SET(SCU94, 11));
	1442	+PIN_DECL_2(P21, GPIOY3, SIOONCTRL, DASHP21);
1380	1443	FUNC_GROUP_DECL(SIOONCTRL, P21);
1381	1444
1382	1445	#define M18 196
..	..	@@ -1395,66 +1458,81 @@
1395	1458
1396	1459	#define Y20 200
1397	1460	#define Y20_DESC SIG_DESC_SET(SCUA4, 16)
1398		-SIG_EXPR_DECL(VPOG2, VPO, Y20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1399		-SIG_EXPR_DECL(VPOG2, VPOOFF1, Y20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1400		-SIG_EXPR_DECL(VPOG2, VPOOFF2, Y20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1401		-SIG_EXPR_LIST_DECL(VPOG2, SIG_EXPR_PTR(VPOG2, VPO),
1402		- SIG_EXPR_PTR(VPOG2, VPOOFF1), SIG_EXPR_PTR(VPOG2, VPOOFF2));
1403		-SIG_EXPR_DECL(SIOPBI, SIOPBI, Y20_DESC);
1404		-SIG_EXPR_DECL(SIOPBI, ACPI, Y20_DESC);
1405		-SIG_EXPR_LIST_DECL_DUAL(SIOPBI, SIOPBI, ACPI);
1406		-SIG_EXPR_LIST_DECL_SINGLE(NORA0, PNOR, PNOR_DESC);
1407		-SIG_EXPR_LIST_DECL_SINGLE(GPIOZ0, GPIOZ0);
1408		-MS_PIN_DECL_(Y20, SIG_EXPR_LIST_PTR(VPOG2), SIG_EXPR_LIST_PTR(SIOPBI),
1409		- SIG_EXPR_LIST_PTR(NORA0), SIG_EXPR_LIST_PTR(GPIOZ0));
	1461	+SIG_EXPR_DECL_SINGLE(VPOG2, VPO, Y20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1462	+SIG_EXPR_DECL_SINGLE(VPOG2, VPOOFF1, Y20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1463	+SIG_EXPR_DECL_SINGLE(VPOG2, VPOOFF2, Y20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1464	+SIG_EXPR_LIST_DECL(VPOG2, VPO,
	1465	+ SIG_EXPR_PTR(VPOG2, VPO),
	1466	+ SIG_EXPR_PTR(VPOG2, VPOOFF1),
	1467	+ SIG_EXPR_PTR(VPOG2, VPOOFF2));
	1468	+SIG_EXPR_LIST_ALIAS(Y20, VPOG2, VPO);
	1469	+SIG_EXPR_DECL_SINGLE(SIOPBI, SIOPBI, Y20_DESC);
	1470	+SIG_EXPR_DECL_SINGLE(SIOPBI, ACPI, Y20_DESC);
	1471	+SIG_EXPR_LIST_DECL_DUAL(Y20, SIOPBI, SIOPBI, ACPI);
	1472	+SIG_EXPR_LIST_DECL_SINGLE(Y20, NORA0, PNOR, PNOR_DESC);
	1473	+SIG_EXPR_LIST_DECL_SINGLE(Y20, GPIOZ0, GPIOZ0);
	1474	+PIN_DECL_(Y20, SIG_EXPR_LIST_PTR(Y20, VPOG2), SIG_EXPR_LIST_PTR(Y20, SIOPBI),
	1475	+ SIG_EXPR_LIST_PTR(Y20, NORA0), SIG_EXPR_LIST_PTR(Y20, GPIOZ0));
1410	1476	FUNC_GROUP_DECL(SIOPBI, Y20);
1411	1477
1412	1478	#define AB20 201
1413	1479	#define AB20_DESC SIG_DESC_SET(SCUA4, 17)
1414		-SIG_EXPR_DECL(VPOG3, VPO, AB20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1415		-SIG_EXPR_DECL(VPOG3, VPOOFF1, AB20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1416		-SIG_EXPR_DECL(VPOG3, VPOOFF2, AB20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1417		-SIG_EXPR_LIST_DECL(VPOG3, SIG_EXPR_PTR(VPOG3, VPO),
1418		- SIG_EXPR_PTR(VPOG3, VPOOFF1), SIG_EXPR_PTR(VPOG3, VPOOFF2));
1419		-SIG_EXPR_DECL(SIOPWRGD, SIOPWRGD, AB20_DESC);
1420		-SIG_EXPR_DECL(SIOPWRGD, ACPI, AB20_DESC);
1421		-SIG_EXPR_LIST_DECL_DUAL(SIOPWRGD, SIOPWRGD, ACPI);
1422		-SIG_EXPR_LIST_DECL_SINGLE(NORA1, PNOR, PNOR_DESC);
1423		-SIG_EXPR_LIST_DECL_SINGLE(GPIOZ1, GPIOZ1);
1424		-MS_PIN_DECL_(AB20, SIG_EXPR_LIST_PTR(VPOG3), SIG_EXPR_LIST_PTR(SIOPWRGD),
1425		- SIG_EXPR_LIST_PTR(NORA1), SIG_EXPR_LIST_PTR(GPIOZ1));
	1480	+SIG_EXPR_DECL_SINGLE(VPOG3, VPO, AB20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1481	+SIG_EXPR_DECL_SINGLE(VPOG3, VPOOFF1, AB20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1482	+SIG_EXPR_DECL_SINGLE(VPOG3, VPOOFF2, AB20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1483	+SIG_EXPR_LIST_DECL(VPOG3, VPO,
	1484	+ SIG_EXPR_PTR(VPOG3, VPO),
	1485	+ SIG_EXPR_PTR(VPOG3, VPOOFF1),
	1486	+ SIG_EXPR_PTR(VPOG3, VPOOFF2));
	1487	+SIG_EXPR_LIST_ALIAS(AB20, VPOG3, VPO);
	1488	+SIG_EXPR_DECL_SINGLE(SIOPWRGD, SIOPWRGD, AB20_DESC);
	1489	+SIG_EXPR_DECL_SINGLE(SIOPWRGD, ACPI, AB20_DESC);
	1490	+SIG_EXPR_LIST_DECL_DUAL(AB20, SIOPWRGD, SIOPWRGD, ACPI);
	1491	+SIG_EXPR_LIST_DECL_SINGLE(AB20, NORA1, PNOR, PNOR_DESC);
	1492	+SIG_EXPR_LIST_DECL_SINGLE(AB20, GPIOZ1, GPIOZ1);
	1493	+PIN_DECL_(AB20, SIG_EXPR_LIST_PTR(AB20, VPOG3),
	1494	+ SIG_EXPR_LIST_PTR(AB20, SIOPWRGD), SIG_EXPR_LIST_PTR(AB20, NORA1),
	1495	+ SIG_EXPR_LIST_PTR(AB20, GPIOZ1));
1426	1496	FUNC_GROUP_DECL(SIOPWRGD, AB20);
1427	1497
1428	1498	#define AB21 202
1429	1499	#define AB21_DESC SIG_DESC_SET(SCUA4, 18)
1430		-SIG_EXPR_DECL(VPOG4, VPO, AB21_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1431		-SIG_EXPR_DECL(VPOG4, VPOOFF1, AB21_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1432		-SIG_EXPR_DECL(VPOG4, VPOOFF2, AB21_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1433		-SIG_EXPR_LIST_DECL(VPOG4, SIG_EXPR_PTR(VPOG4, VPO),
1434		- SIG_EXPR_PTR(VPOG4, VPOOFF1), SIG_EXPR_PTR(VPOG4, VPOOFF2));
1435		-SIG_EXPR_DECL(SIOPBO, SIOPBO, AB21_DESC);
1436		-SIG_EXPR_DECL(SIOPBO, ACPI, AB21_DESC);
1437		-SIG_EXPR_LIST_DECL_DUAL(SIOPBO, SIOPBO, ACPI);
1438		-SIG_EXPR_LIST_DECL_SINGLE(NORA2, PNOR, PNOR_DESC);
1439		-SIG_EXPR_LIST_DECL_SINGLE(GPIOZ2, GPIOZ2);
1440		-MS_PIN_DECL_(AB21, SIG_EXPR_LIST_PTR(VPOG4), SIG_EXPR_LIST_PTR(SIOPBO),
1441		- SIG_EXPR_LIST_PTR(NORA2), SIG_EXPR_LIST_PTR(GPIOZ2));
	1500	+SIG_EXPR_DECL_SINGLE(VPOG4, VPO, AB21_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1501	+SIG_EXPR_DECL_SINGLE(VPOG4, VPOOFF1, AB21_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1502	+SIG_EXPR_DECL_SINGLE(VPOG4, VPOOFF2, AB21_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1503	+SIG_EXPR_LIST_DECL(VPOG4, VPO,
	1504	+ SIG_EXPR_PTR(VPOG4, VPO),
	1505	+ SIG_EXPR_PTR(VPOG4, VPOOFF1),
	1506	+ SIG_EXPR_PTR(VPOG4, VPOOFF2));
	1507	+SIG_EXPR_LIST_ALIAS(AB21, VPOG4, VPO);
	1508	+SIG_EXPR_DECL_SINGLE(SIOPBO, SIOPBO, AB21_DESC);
	1509	+SIG_EXPR_DECL_SINGLE(SIOPBO, ACPI, AB21_DESC);
	1510	+SIG_EXPR_LIST_DECL_DUAL(AB21, SIOPBO, SIOPBO, ACPI);
	1511	+SIG_EXPR_LIST_DECL_SINGLE(AB21, NORA2, PNOR, PNOR_DESC);
	1512	+SIG_EXPR_LIST_DECL_SINGLE(AB21, GPIOZ2, GPIOZ2);
	1513	+PIN_DECL_(AB21, SIG_EXPR_LIST_PTR(AB21, VPOG4),
	1514	+ SIG_EXPR_LIST_PTR(AB21, SIOPBO), SIG_EXPR_LIST_PTR(AB21, NORA2),
	1515	+ SIG_EXPR_LIST_PTR(AB21, GPIOZ2));
1442	1516	FUNC_GROUP_DECL(SIOPBO, AB21);
1443	1517
1444	1518	#define AA21 203
1445	1519	#define AA21_DESC SIG_DESC_SET(SCUA4, 19)
1446		-SIG_EXPR_DECL(VPOG5, VPO, AA21_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1447		-SIG_EXPR_DECL(VPOG5, VPOOFF1, AA21_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1448		-SIG_EXPR_DECL(VPOG5, VPOOFF2, AA21_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1449		-SIG_EXPR_LIST_DECL(VPOG5, SIG_EXPR_PTR(VPOG5, VPO),
1450		- SIG_EXPR_PTR(VPOG5, VPOOFF1), SIG_EXPR_PTR(VPOG5, VPOOFF2));
1451		-SIG_EXPR_DECL(SIOSCI, SIOSCI, AA21_DESC);
1452		-SIG_EXPR_DECL(SIOSCI, ACPI, AA21_DESC);
1453		-SIG_EXPR_LIST_DECL_DUAL(SIOSCI, SIOSCI, ACPI);
1454		-SIG_EXPR_LIST_DECL_SINGLE(NORA3, PNOR, PNOR_DESC);
1455		-SIG_EXPR_LIST_DECL_SINGLE(GPIOZ3, GPIOZ3);
1456		-MS_PIN_DECL_(AA21, SIG_EXPR_LIST_PTR(VPOG5), SIG_EXPR_LIST_PTR(SIOSCI),
1457		- SIG_EXPR_LIST_PTR(NORA3), SIG_EXPR_LIST_PTR(GPIOZ3));
	1520	+SIG_EXPR_DECL_SINGLE(VPOG5, VPO, AA21_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1521	+SIG_EXPR_DECL_SINGLE(VPOG5, VPOOFF1, AA21_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1522	+SIG_EXPR_DECL_SINGLE(VPOG5, VPOOFF2, AA21_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1523	+SIG_EXPR_LIST_DECL(VPOG5, VPO,
	1524	+ SIG_EXPR_PTR(VPOG5, VPO),
	1525	+ SIG_EXPR_PTR(VPOG5, VPOOFF1),
	1526	+ SIG_EXPR_PTR(VPOG5, VPOOFF2));
	1527	+SIG_EXPR_LIST_ALIAS(AA21, VPOG5, VPO);
	1528	+SIG_EXPR_DECL_SINGLE(SIOSCI, SIOSCI, AA21_DESC);
	1529	+SIG_EXPR_DECL_SINGLE(SIOSCI, ACPI, AA21_DESC);
	1530	+SIG_EXPR_LIST_DECL_DUAL(AA21, SIOSCI, SIOSCI, ACPI);
	1531	+SIG_EXPR_LIST_DECL_SINGLE(AA21, NORA3, PNOR, PNOR_DESC);
	1532	+SIG_EXPR_LIST_DECL_SINGLE(AA21, GPIOZ3, GPIOZ3);
	1533	+PIN_DECL_(AA21, SIG_EXPR_LIST_PTR(AA21, VPOG5),
	1534	+ SIG_EXPR_LIST_PTR(AA21, SIOSCI), SIG_EXPR_LIST_PTR(AA21, NORA3),
	1535	+ SIG_EXPR_LIST_PTR(AA21, GPIOZ3));
1458	1536	FUNC_GROUP_DECL(SIOSCI, AA21);
1459	1537
1460	1538	FUNC_GROUP_DECL(ACPI, R22, R21, P22, P21, Y20, AB20, AB21, AA21);
..	..	@@ -1473,199 +1551,248 @@
1473	1551
1474	1552	#define U21 204
1475	1553	#define U21_DESC SIG_DESC_SET(SCUA4, 20)
1476		-SIG_EXPR_DECL(VPOG6, VPO, U21_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1477		-SIG_EXPR_DECL(VPOG6, VPOOFF1, U21_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1478		-SIG_EXPR_DECL(VPOG6, VPOOFF2, U21_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1479		-SIG_EXPR_LIST_DECL(VPOG6, SIG_EXPR_PTR(VPOG6, VPO),
1480		- SIG_EXPR_PTR(VPOG6, VPOOFF1), SIG_EXPR_PTR(VPOG6, VPOOFF2));
1481		-SIG_EXPR_LIST_DECL_SINGLE(NORA4, PNOR, PNOR_DESC);
1482		-MS_PIN_DECL(U21, GPIOZ4, VPOG6, NORA4);
	1554	+SIG_EXPR_DECL_SINGLE(VPOG6, VPO, U21_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1555	+SIG_EXPR_DECL_SINGLE(VPOG6, VPOOFF1, U21_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1556	+SIG_EXPR_DECL_SINGLE(VPOG6, VPOOFF2, U21_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1557	+SIG_EXPR_LIST_DECL(VPOG6, VPO,
	1558	+ SIG_EXPR_PTR(VPOG6, VPO),
	1559	+ SIG_EXPR_PTR(VPOG6, VPOOFF1),
	1560	+ SIG_EXPR_PTR(VPOG6, VPOOFF2));
	1561	+SIG_EXPR_LIST_ALIAS(U21, VPOG6, VPO);
	1562	+SIG_EXPR_LIST_DECL_SINGLE(U21, NORA4, PNOR, PNOR_DESC);
	1563	+PIN_DECL_2(U21, GPIOZ4, VPOG6, NORA4);
1483	1564
1484	1565	#define W22 205
1485	1566	#define W22_DESC SIG_DESC_SET(SCUA4, 21)
1486		-SIG_EXPR_DECL(VPOG7, VPO, W22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1487		-SIG_EXPR_DECL(VPOG7, VPOOFF1, W22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1488		-SIG_EXPR_DECL(VPOG7, VPOOFF2, W22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1489		-SIG_EXPR_LIST_DECL(VPOG7, SIG_EXPR_PTR(VPOG7, VPO),
1490		- SIG_EXPR_PTR(VPOG7, VPOOFF1), SIG_EXPR_PTR(VPOG7, VPOOFF2));
1491		-SIG_EXPR_LIST_DECL_SINGLE(NORA5, PNOR, PNOR_DESC);
1492		-MS_PIN_DECL(W22, GPIOZ5, VPOG7, NORA5);
	1567	+SIG_EXPR_DECL_SINGLE(VPOG7, VPO, W22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1568	+SIG_EXPR_DECL_SINGLE(VPOG7, VPOOFF1, W22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1569	+SIG_EXPR_DECL_SINGLE(VPOG7, VPOOFF2, W22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1570	+SIG_EXPR_LIST_DECL(VPOG7, VPO,
	1571	+ SIG_EXPR_PTR(VPOG7, VPO),
	1572	+ SIG_EXPR_PTR(VPOG7, VPOOFF1),
	1573	+ SIG_EXPR_PTR(VPOG7, VPOOFF2));
	1574	+SIG_EXPR_LIST_ALIAS(W22, VPOG7, VPO);
	1575	+SIG_EXPR_LIST_DECL_SINGLE(W22, NORA5, PNOR, PNOR_DESC);
	1576	+PIN_DECL_2(W22, GPIOZ5, VPOG7, NORA5);
1493	1577
1494	1578	#define V22 206
1495	1579	#define V22_DESC SIG_DESC_SET(SCUA4, 22)
1496		-SIG_EXPR_DECL(VPOG8, VPO, V22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1497		-SIG_EXPR_DECL(VPOG8, VPOOFF1, V22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1498		-SIG_EXPR_DECL(VPOG8, VPOOFF2, V22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1499		-SIG_EXPR_LIST_DECL(VPOG8, SIG_EXPR_PTR(VPOG8, VPO),
1500		- SIG_EXPR_PTR(VPOG8, VPOOFF1), SIG_EXPR_PTR(VPOG8, VPOOFF2));
1501		-SIG_EXPR_LIST_DECL_SINGLE(NORA6, PNOR, PNOR_DESC);
1502		-MS_PIN_DECL(V22, GPIOZ6, VPOG8, NORA6);
	1580	+SIG_EXPR_DECL_SINGLE(VPOG8, VPO, V22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1581	+SIG_EXPR_DECL_SINGLE(VPOG8, VPOOFF1, V22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1582	+SIG_EXPR_DECL_SINGLE(VPOG8, VPOOFF2, V22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1583	+SIG_EXPR_LIST_DECL(VPOG8, VPO,
	1584	+ SIG_EXPR_PTR(VPOG8, VPO),
	1585	+ SIG_EXPR_PTR(VPOG8, VPOOFF1),
	1586	+ SIG_EXPR_PTR(VPOG8, VPOOFF2));
	1587	+SIG_EXPR_LIST_ALIAS(V22, VPOG8, VPO);
	1588	+SIG_EXPR_LIST_DECL_SINGLE(V22, NORA6, PNOR, PNOR_DESC);
	1589	+PIN_DECL_2(V22, GPIOZ6, VPOG8, NORA6);
1503	1590
1504	1591	#define W21 207
1505	1592	#define W21_DESC SIG_DESC_SET(SCUA4, 23)
1506		-SIG_EXPR_DECL(VPOG9, VPO, W21_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1507		-SIG_EXPR_DECL(VPOG9, VPOOFF1, W21_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1508		-SIG_EXPR_DECL(VPOG9, VPOOFF2, W21_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1509		-SIG_EXPR_LIST_DECL(VPOG9, SIG_EXPR_PTR(VPOG9, VPO),
1510		- SIG_EXPR_PTR(VPOG9, VPOOFF1), SIG_EXPR_PTR(VPOG9, VPOOFF2));
1511		-SIG_EXPR_LIST_DECL_SINGLE(NORA7, PNOR, PNOR_DESC);
1512		-MS_PIN_DECL(W21, GPIOZ7, VPOG9, NORA7);
	1593	+SIG_EXPR_DECL_SINGLE(VPOG9, VPO, W21_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1594	+SIG_EXPR_DECL_SINGLE(VPOG9, VPOOFF1, W21_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1595	+SIG_EXPR_DECL_SINGLE(VPOG9, VPOOFF2, W21_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1596	+SIG_EXPR_LIST_DECL(VPOG9, VPO,
	1597	+ SIG_EXPR_PTR(VPOG9, VPO),
	1598	+ SIG_EXPR_PTR(VPOG9, VPOOFF1),
	1599	+ SIG_EXPR_PTR(VPOG9, VPOOFF2));
	1600	+SIG_EXPR_LIST_ALIAS(W21, VPOG9, VPO);
	1601	+SIG_EXPR_LIST_DECL_SINGLE(W21, NORA7, PNOR, PNOR_DESC);
	1602	+PIN_DECL_2(W21, GPIOZ7, VPOG9, NORA7);
1513	1603
1514	1604	#define Y21 208
1515	1605	#define Y21_DESC SIG_DESC_SET(SCUA4, 24)
1516		-SIG_EXPR_DECL(VPOR2, VPO, Y21_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1517		-SIG_EXPR_DECL(VPOR2, VPOOFF1, Y21_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1518		-SIG_EXPR_DECL(VPOR2, VPOOFF2, Y21_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1519		-SIG_EXPR_LIST_DECL(VPOR2, SIG_EXPR_PTR(VPOR2, VPO),
1520		- SIG_EXPR_PTR(VPOR2, VPOOFF1), SIG_EXPR_PTR(VPOR2, VPOOFF2));
1521		-SIG_EXPR_LIST_DECL_SINGLE(SALT7, SALT7, Y21_DESC);
1522		-SIG_EXPR_LIST_DECL_SINGLE(NORD0, PNOR, PNOR_DESC);
1523		-SIG_EXPR_LIST_DECL_SINGLE(GPIOAA0, GPIOAA0);
1524		-MS_PIN_DECL_(Y21, SIG_EXPR_LIST_PTR(VPOR2), SIG_EXPR_LIST_PTR(SALT7),
1525		- SIG_EXPR_LIST_PTR(NORD0), SIG_EXPR_LIST_PTR(GPIOAA0));
	1606	+SIG_EXPR_DECL_SINGLE(VPOR2, VPO, Y21_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1607	+SIG_EXPR_DECL_SINGLE(VPOR2, VPOOFF1, Y21_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1608	+SIG_EXPR_DECL_SINGLE(VPOR2, VPOOFF2, Y21_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1609	+SIG_EXPR_LIST_DECL(VPOR2, VPO,
	1610	+ SIG_EXPR_PTR(VPOR2, VPO),
	1611	+ SIG_EXPR_PTR(VPOR2, VPOOFF1),
	1612	+ SIG_EXPR_PTR(VPOR2, VPOOFF2));
	1613	+SIG_EXPR_LIST_ALIAS(Y21, VPOR2, VPO);
	1614	+SIG_EXPR_LIST_DECL_SINGLE(Y21, SALT7, SALT7, Y21_DESC);
	1615	+SIG_EXPR_LIST_DECL_SINGLE(Y21, NORD0, PNOR, PNOR_DESC);
	1616	+SIG_EXPR_LIST_DECL_SINGLE(Y21, GPIOAA0, GPIOAA0);
	1617	+PIN_DECL_(Y21, SIG_EXPR_LIST_PTR(Y21, VPOR2), SIG_EXPR_LIST_PTR(Y21, SALT7),
	1618	+ SIG_EXPR_LIST_PTR(Y21, NORD0), SIG_EXPR_LIST_PTR(Y21, GPIOAA0));
1526	1619	FUNC_GROUP_DECL(SALT7, Y21);
1527	1620
1528	1621	#define V21 209
1529	1622	#define V21_DESC SIG_DESC_SET(SCUA4, 25)
1530		-SIG_EXPR_DECL(VPOR3, VPO, V21_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1531		-SIG_EXPR_DECL(VPOR3, VPOOFF1, V21_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1532		-SIG_EXPR_DECL(VPOR3, VPOOFF2, V21_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1533		-SIG_EXPR_LIST_DECL(VPOR3, SIG_EXPR_PTR(VPOR3, VPO),
1534		- SIG_EXPR_PTR(VPOR3, VPOOFF1), SIG_EXPR_PTR(VPOR3, VPOOFF2));
1535		-SIG_EXPR_LIST_DECL_SINGLE(SALT8, SALT8, V21_DESC);
1536		-SIG_EXPR_LIST_DECL_SINGLE(NORD1, PNOR, PNOR_DESC);
1537		-SIG_EXPR_LIST_DECL_SINGLE(GPIOAA1, GPIOAA1);
1538		-MS_PIN_DECL_(V21, SIG_EXPR_LIST_PTR(VPOR3), SIG_EXPR_LIST_PTR(SALT8),
1539		- SIG_EXPR_LIST_PTR(NORD1), SIG_EXPR_LIST_PTR(GPIOAA1));
	1623	+SIG_EXPR_DECL_SINGLE(VPOR3, VPO, V21_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1624	+SIG_EXPR_DECL_SINGLE(VPOR3, VPOOFF1, V21_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1625	+SIG_EXPR_DECL_SINGLE(VPOR3, VPOOFF2, V21_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1626	+SIG_EXPR_LIST_DECL(VPOR3, VPO,
	1627	+ SIG_EXPR_PTR(VPOR3, VPO),
	1628	+ SIG_EXPR_PTR(VPOR3, VPOOFF1),
	1629	+ SIG_EXPR_PTR(VPOR3, VPOOFF2));
	1630	+SIG_EXPR_LIST_ALIAS(V21, VPOR3, VPO);
	1631	+SIG_EXPR_LIST_DECL_SINGLE(V21, SALT8, SALT8, V21_DESC);
	1632	+SIG_EXPR_LIST_DECL_SINGLE(V21, NORD1, PNOR, PNOR_DESC);
	1633	+SIG_EXPR_LIST_DECL_SINGLE(V21, GPIOAA1, GPIOAA1);
	1634	+PIN_DECL_(V21, SIG_EXPR_LIST_PTR(V21, VPOR3), SIG_EXPR_LIST_PTR(V21, SALT8),
	1635	+ SIG_EXPR_LIST_PTR(V21, NORD1), SIG_EXPR_LIST_PTR(V21, GPIOAA1));
1540	1636	FUNC_GROUP_DECL(SALT8, V21);
1541	1637
1542	1638	#define Y22 210
1543	1639	#define Y22_DESC SIG_DESC_SET(SCUA4, 26)
1544		-SIG_EXPR_DECL(VPOR4, VPO, Y22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1545		-SIG_EXPR_DECL(VPOR4, VPOOFF1, Y22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1546		-SIG_EXPR_DECL(VPOR4, VPOOFF2, Y22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1547		-SIG_EXPR_LIST_DECL(VPOR4, SIG_EXPR_PTR(VPOR4, VPO),
1548		- SIG_EXPR_PTR(VPOR4, VPOOFF1), SIG_EXPR_PTR(VPOR4, VPOOFF2));
1549		-SIG_EXPR_LIST_DECL_SINGLE(SALT9, SALT9, Y22_DESC);
1550		-SIG_EXPR_LIST_DECL_SINGLE(NORD2, PNOR, PNOR_DESC);
1551		-SIG_EXPR_LIST_DECL_SINGLE(GPIOAA2, GPIOAA2);
1552		-MS_PIN_DECL_(Y22, SIG_EXPR_LIST_PTR(VPOR4), SIG_EXPR_LIST_PTR(SALT9),
1553		- SIG_EXPR_LIST_PTR(NORD2), SIG_EXPR_LIST_PTR(GPIOAA2));
	1640	+SIG_EXPR_DECL_SINGLE(VPOR4, VPO, Y22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1641	+SIG_EXPR_DECL_SINGLE(VPOR4, VPOOFF1, Y22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1642	+SIG_EXPR_DECL_SINGLE(VPOR4, VPOOFF2, Y22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1643	+SIG_EXPR_LIST_DECL(VPOR4, VPO,
	1644	+ SIG_EXPR_PTR(VPOR4, VPO),
	1645	+ SIG_EXPR_PTR(VPOR4, VPOOFF1),
	1646	+ SIG_EXPR_PTR(VPOR4, VPOOFF2));
	1647	+SIG_EXPR_LIST_ALIAS(Y22, VPOR4, VPO);
	1648	+SIG_EXPR_LIST_DECL_SINGLE(Y22, SALT9, SALT9, Y22_DESC);
	1649	+SIG_EXPR_LIST_DECL_SINGLE(Y22, NORD2, PNOR, PNOR_DESC);
	1650	+SIG_EXPR_LIST_DECL_SINGLE(Y22, GPIOAA2, GPIOAA2);
	1651	+PIN_DECL_(Y22, SIG_EXPR_LIST_PTR(Y22, VPOR4), SIG_EXPR_LIST_PTR(Y22, SALT9),
	1652	+ SIG_EXPR_LIST_PTR(Y22, NORD2), SIG_EXPR_LIST_PTR(Y22, GPIOAA2));
1554	1653	FUNC_GROUP_DECL(SALT9, Y22);
1555	1654
1556	1655	#define AA22 211
1557	1656	#define AA22_DESC SIG_DESC_SET(SCUA4, 27)
1558		-SIG_EXPR_DECL(VPOR5, VPO, AA22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1559		-SIG_EXPR_DECL(VPOR5, VPOOFF1, AA22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1560		-SIG_EXPR_DECL(VPOR5, VPOOFF2, AA22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1561		-SIG_EXPR_LIST_DECL(VPOR5, SIG_EXPR_PTR(VPOR5, VPO),
1562		- SIG_EXPR_PTR(VPOR5, VPOOFF1), SIG_EXPR_PTR(VPOR5, VPOOFF2));
1563		-SIG_EXPR_LIST_DECL_SINGLE(SALT10, SALT10, AA22_DESC);
1564		-SIG_EXPR_LIST_DECL_SINGLE(NORD3, PNOR, PNOR_DESC);
1565		-SIG_EXPR_LIST_DECL_SINGLE(GPIOAA3, GPIOAA3);
1566		-MS_PIN_DECL_(AA22, SIG_EXPR_LIST_PTR(VPOR5), SIG_EXPR_LIST_PTR(SALT10),
1567		- SIG_EXPR_LIST_PTR(NORD3), SIG_EXPR_LIST_PTR(GPIOAA3));
	1657	+SIG_EXPR_DECL_SINGLE(VPOR5, VPO, AA22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1658	+SIG_EXPR_DECL_SINGLE(VPOR5, VPOOFF1, AA22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1659	+SIG_EXPR_DECL_SINGLE(VPOR5, VPOOFF2, AA22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1660	+SIG_EXPR_LIST_DECL(VPOR5, VPO,
	1661	+ SIG_EXPR_PTR(VPOR5, VPO),
	1662	+ SIG_EXPR_PTR(VPOR5, VPOOFF1),
	1663	+ SIG_EXPR_PTR(VPOR5, VPOOFF2));
	1664	+SIG_EXPR_LIST_ALIAS(AA22, VPOR5, VPO);
	1665	+SIG_EXPR_LIST_DECL_SINGLE(AA22, SALT10, SALT10, AA22_DESC);
	1666	+SIG_EXPR_LIST_DECL_SINGLE(AA22, NORD3, PNOR, PNOR_DESC);
	1667	+SIG_EXPR_LIST_DECL_SINGLE(AA22, GPIOAA3, GPIOAA3);
	1668	+PIN_DECL_(AA22, SIG_EXPR_LIST_PTR(AA22, VPOR5),
	1669	+ SIG_EXPR_LIST_PTR(AA22, SALT10), SIG_EXPR_LIST_PTR(AA22, NORD3),
	1670	+ SIG_EXPR_LIST_PTR(AA22, GPIOAA3));
1568	1671	FUNC_GROUP_DECL(SALT10, AA22);
1569	1672
1570	1673	#define U22 212
1571	1674	#define U22_DESC SIG_DESC_SET(SCUA4, 28)
1572		-SIG_EXPR_DECL(VPOR6, VPO, U22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1573		-SIG_EXPR_DECL(VPOR6, VPOOFF1, U22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1574		-SIG_EXPR_DECL(VPOR6, VPOOFF2, U22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1575		-SIG_EXPR_LIST_DECL(VPOR6, SIG_EXPR_PTR(VPOR6, VPO),
1576		- SIG_EXPR_PTR(VPOR6, VPOOFF1), SIG_EXPR_PTR(VPOR6, VPOOFF2));
1577		-SIG_EXPR_LIST_DECL_SINGLE(SALT11, SALT11, U22_DESC);
1578		-SIG_EXPR_LIST_DECL_SINGLE(NORD4, PNOR, PNOR_DESC);
1579		-SIG_EXPR_LIST_DECL_SINGLE(GPIOAA4, GPIOAA4);
1580		-MS_PIN_DECL_(U22, SIG_EXPR_LIST_PTR(VPOR6), SIG_EXPR_LIST_PTR(SALT11),
1581		- SIG_EXPR_LIST_PTR(NORD4), SIG_EXPR_LIST_PTR(GPIOAA4));
	1675	+SIG_EXPR_DECL_SINGLE(VPOR6, VPO, U22_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1676	+SIG_EXPR_DECL_SINGLE(VPOR6, VPOOFF1, U22_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1677	+SIG_EXPR_DECL_SINGLE(VPOR6, VPOOFF2, U22_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1678	+SIG_EXPR_LIST_DECL(VPOR6, VPO,
	1679	+ SIG_EXPR_PTR(VPOR6, VPO),
	1680	+ SIG_EXPR_PTR(VPOR6, VPOOFF1),
	1681	+ SIG_EXPR_PTR(VPOR6, VPOOFF2));
	1682	+SIG_EXPR_LIST_ALIAS(U22, VPOR6, VPO);
	1683	+SIG_EXPR_LIST_DECL_SINGLE(U22, SALT11, SALT11, U22_DESC);
	1684	+SIG_EXPR_LIST_DECL_SINGLE(U22, NORD4, PNOR, PNOR_DESC);
	1685	+SIG_EXPR_LIST_DECL_SINGLE(U22, GPIOAA4, GPIOAA4);
	1686	+PIN_DECL_(U22, SIG_EXPR_LIST_PTR(U22, VPOR6), SIG_EXPR_LIST_PTR(U22, SALT11),
	1687	+ SIG_EXPR_LIST_PTR(U22, NORD4), SIG_EXPR_LIST_PTR(U22, GPIOAA4));
1582	1688	FUNC_GROUP_DECL(SALT11, U22);
1583	1689
1584	1690	#define T20 213
1585	1691	#define T20_DESC SIG_DESC_SET(SCUA4, 29)
1586		-SIG_EXPR_DECL(VPOR7, VPO, T20_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1587		-SIG_EXPR_DECL(VPOR7, VPOOFF1, T20_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1588		-SIG_EXPR_DECL(VPOR7, VPOOFF2, T20_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1589		-SIG_EXPR_LIST_DECL(VPOR7, SIG_EXPR_PTR(VPOR7, VPO),
1590		- SIG_EXPR_PTR(VPOR7, VPOOFF1), SIG_EXPR_PTR(VPOR7, VPOOFF2));
1591		-SIG_EXPR_LIST_DECL_SINGLE(SALT12, SALT12, T20_DESC);
1592		-SIG_EXPR_LIST_DECL_SINGLE(NORD5, PNOR, PNOR_DESC);
1593		-SIG_EXPR_LIST_DECL_SINGLE(GPIOAA5, GPIOAA5);
1594		-MS_PIN_DECL_(T20, SIG_EXPR_LIST_PTR(VPOR7), SIG_EXPR_LIST_PTR(SALT12),
1595		- SIG_EXPR_LIST_PTR(NORD5), SIG_EXPR_LIST_PTR(GPIOAA5));
	1692	+SIG_EXPR_DECL_SINGLE(VPOR7, VPO, T20_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1693	+SIG_EXPR_DECL_SINGLE(VPOR7, VPOOFF1, T20_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1694	+SIG_EXPR_DECL_SINGLE(VPOR7, VPOOFF2, T20_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1695	+SIG_EXPR_LIST_DECL(VPOR7, VPO,
	1696	+ SIG_EXPR_PTR(VPOR7, VPO),
	1697	+ SIG_EXPR_PTR(VPOR7, VPOOFF1),
	1698	+ SIG_EXPR_PTR(VPOR7, VPOOFF2));
	1699	+SIG_EXPR_LIST_ALIAS(T20, VPOR7, VPO);
	1700	+SIG_EXPR_LIST_DECL_SINGLE(T20, SALT12, SALT12, T20_DESC);
	1701	+SIG_EXPR_LIST_DECL_SINGLE(T20, NORD5, PNOR, PNOR_DESC);
	1702	+SIG_EXPR_LIST_DECL_SINGLE(T20, GPIOAA5, GPIOAA5);
	1703	+PIN_DECL_(T20, SIG_EXPR_LIST_PTR(T20, VPOR7), SIG_EXPR_LIST_PTR(T20, SALT12),
	1704	+ SIG_EXPR_LIST_PTR(T20, NORD5), SIG_EXPR_LIST_PTR(T20, GPIOAA5));
1596	1705	FUNC_GROUP_DECL(SALT12, T20);
1597	1706
1598	1707	#define N18 214
1599	1708	#define N18_DESC SIG_DESC_SET(SCUA4, 30)
1600		-SIG_EXPR_DECL(VPOR8, VPO, N18_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1601		-SIG_EXPR_DECL(VPOR8, VPOOFF1, N18_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1602		-SIG_EXPR_DECL(VPOR8, VPOOFF2, N18_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1603		-SIG_EXPR_LIST_DECL(VPOR8, SIG_EXPR_PTR(VPOR8, VPO),
1604		- SIG_EXPR_PTR(VPOR8, VPOOFF1), SIG_EXPR_PTR(VPOR8, VPOOFF2));
1605		-SIG_EXPR_LIST_DECL_SINGLE(SALT13, SALT13, N18_DESC);
1606		-SIG_EXPR_LIST_DECL_SINGLE(NORD6, PNOR, PNOR_DESC);
1607		-SIG_EXPR_LIST_DECL_SINGLE(GPIOAA6, GPIOAA6);
1608		-MS_PIN_DECL_(N18, SIG_EXPR_LIST_PTR(VPOR8), SIG_EXPR_LIST_PTR(SALT13),
1609		- SIG_EXPR_LIST_PTR(NORD6), SIG_EXPR_LIST_PTR(GPIOAA6));
	1709	+SIG_EXPR_DECL_SINGLE(VPOR8, VPO, N18_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1710	+SIG_EXPR_DECL_SINGLE(VPOR8, VPOOFF1, N18_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1711	+SIG_EXPR_DECL_SINGLE(VPOR8, VPOOFF2, N18_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1712	+SIG_EXPR_LIST_DECL(VPOR8, VPO,
	1713	+ SIG_EXPR_PTR(VPOR8, VPO),
	1714	+ SIG_EXPR_PTR(VPOR8, VPOOFF1),
	1715	+ SIG_EXPR_PTR(VPOR8, VPOOFF2));
	1716	+SIG_EXPR_LIST_ALIAS(N18, VPOR8, VPO);
	1717	+SIG_EXPR_LIST_DECL_SINGLE(N18, SALT13, SALT13, N18_DESC);
	1718	+SIG_EXPR_LIST_DECL_SINGLE(N18, NORD6, PNOR, PNOR_DESC);
	1719	+SIG_EXPR_LIST_DECL_SINGLE(N18, GPIOAA6, GPIOAA6);
	1720	+PIN_DECL_(N18, SIG_EXPR_LIST_PTR(N18, VPOR8), SIG_EXPR_LIST_PTR(N18, SALT13),
	1721	+ SIG_EXPR_LIST_PTR(N18, NORD6), SIG_EXPR_LIST_PTR(N18, GPIOAA6));
1610	1722	FUNC_GROUP_DECL(SALT13, N18);
1611	1723
1612	1724	#define P19 215
1613	1725	#define P19_DESC SIG_DESC_SET(SCUA4, 31)
1614		-SIG_EXPR_DECL(VPOR9, VPO, P19_DESC, VPO_DESC, CRT_DVO_ES_DESC);
1615		-SIG_EXPR_DECL(VPOR9, VPOOFF1, P19_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
1616		-SIG_EXPR_DECL(VPOR9, VPOOFF2, P19_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
1617		-SIG_EXPR_LIST_DECL(VPOR9, SIG_EXPR_PTR(VPOR9, VPO),
1618		- SIG_EXPR_PTR(VPOR9, VPOOFF1), SIG_EXPR_PTR(VPOR9, VPOOFF2));
1619		-SIG_EXPR_LIST_DECL_SINGLE(SALT14, SALT14, P19_DESC);
1620		-SIG_EXPR_LIST_DECL_SINGLE(NORD7, PNOR, PNOR_DESC);
1621		-SIG_EXPR_LIST_DECL_SINGLE(GPIOAA7, GPIOAA7);
1622		-MS_PIN_DECL_(P19, SIG_EXPR_LIST_PTR(VPOR9), SIG_EXPR_LIST_PTR(SALT14),
1623		- SIG_EXPR_LIST_PTR(NORD7), SIG_EXPR_LIST_PTR(GPIOAA7));
	1726	+SIG_EXPR_DECL_SINGLE(VPOR9, VPO, P19_DESC, VPO_DESC, CRT_DVO_ES_DESC);
	1727	+SIG_EXPR_DECL_SINGLE(VPOR9, VPOOFF1, P19_DESC, VPOOFF1_DESC, CRT_DVO_ES_DESC);
	1728	+SIG_EXPR_DECL_SINGLE(VPOR9, VPOOFF2, P19_DESC, VPOOFF2_DESC, CRT_DVO_ES_DESC);
	1729	+SIG_EXPR_LIST_DECL(VPOR9, VPO,
	1730	+ SIG_EXPR_PTR(VPOR9, VPO),
	1731	+ SIG_EXPR_PTR(VPOR9, VPOOFF1),
	1732	+ SIG_EXPR_PTR(VPOR9, VPOOFF2));
	1733	+SIG_EXPR_LIST_ALIAS(P19, VPOR9, VPO);
	1734	+SIG_EXPR_LIST_DECL_SINGLE(P19, SALT14, SALT14, P19_DESC);
	1735	+SIG_EXPR_LIST_DECL_SINGLE(P19, NORD7, PNOR, PNOR_DESC);
	1736	+SIG_EXPR_LIST_DECL_SINGLE(P19, GPIOAA7, GPIOAA7);
	1737	+PIN_DECL_(P19, SIG_EXPR_LIST_PTR(P19, VPOR9), SIG_EXPR_LIST_PTR(P19, SALT14),
	1738	+ SIG_EXPR_LIST_PTR(P19, NORD7), SIG_EXPR_LIST_PTR(P19, GPIOAA7));
1624	1739	FUNC_GROUP_DECL(SALT14, P19);
1625	1740
1626	1741	#define N19 216
1627	1742	#define N19_DESC SIG_DESC_SET(SCUA8, 0)
1628		-SIG_EXPR_DECL(VPODE, VPO, N19_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1629		-SIG_EXPR_DECL(VPODE, VPOOFF1, N19_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1630		-SIG_EXPR_DECL(VPODE, VPOOFF2, N19_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1631		-SIG_EXPR_LIST_DECL(VPODE, SIG_EXPR_PTR(VPODE, VPO),
1632		- SIG_EXPR_PTR(VPODE, VPOOFF1), SIG_EXPR_PTR(VPODE, VPOOFF2));
1633		-SIG_EXPR_LIST_DECL_SINGLE(NOROE, PNOR, PNOR_DESC);
1634		-MS_PIN_DECL(N19, GPIOAB0, VPODE, NOROE);
	1743	+SIG_EXPR_DECL_SINGLE(VPODE, VPO, N19_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1744	+SIG_EXPR_DECL_SINGLE(VPODE, VPOOFF1, N19_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1745	+SIG_EXPR_DECL_SINGLE(VPODE, VPOOFF2, N19_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1746	+SIG_EXPR_LIST_DECL(VPODE, VPO,
	1747	+ SIG_EXPR_PTR(VPODE, VPO),
	1748	+ SIG_EXPR_PTR(VPODE, VPOOFF1),
	1749	+ SIG_EXPR_PTR(VPODE, VPOOFF2));
	1750	+SIG_EXPR_LIST_ALIAS(N19, VPODE, VPO);
	1751	+SIG_EXPR_LIST_DECL_SINGLE(N19, NOROE, PNOR, PNOR_DESC);
	1752	+PIN_DECL_2(N19, GPIOAB0, VPODE, NOROE);
1635	1753
1636	1754	#define T21 217
1637	1755	#define T21_DESC SIG_DESC_SET(SCUA8, 1)
1638		-SIG_EXPR_DECL(VPOHS, VPO, T21_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1639		-SIG_EXPR_DECL(VPOHS, VPOOFF1, T21_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1640		-SIG_EXPR_DECL(VPOHS, VPOOFF2, T21_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1641		-SIG_EXPR_LIST_DECL(VPOHS, SIG_EXPR_PTR(VPOHS, VPO),
1642		- SIG_EXPR_PTR(VPOHS, VPOOFF1), SIG_EXPR_PTR(VPOHS, VPOOFF2));
1643		-SIG_EXPR_LIST_DECL_SINGLE(NORWE, PNOR, PNOR_DESC);
1644		-MS_PIN_DECL(T21, GPIOAB1, VPOHS, NORWE);
	1756	+SIG_EXPR_DECL_SINGLE(VPOHS, VPO, T21_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1757	+SIG_EXPR_DECL_SINGLE(VPOHS, VPOOFF1, T21_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1758	+SIG_EXPR_DECL_SINGLE(VPOHS, VPOOFF2, T21_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1759	+SIG_EXPR_LIST_DECL(VPOHS, VPO,
	1760	+ SIG_EXPR_PTR(VPOHS, VPO),
	1761	+ SIG_EXPR_PTR(VPOHS, VPOOFF1),
	1762	+ SIG_EXPR_PTR(VPOHS, VPOOFF2));
	1763	+SIG_EXPR_LIST_ALIAS(T21, VPOHS, VPO);
	1764	+SIG_EXPR_LIST_DECL_SINGLE(T21, NORWE, PNOR, PNOR_DESC);
	1765	+PIN_DECL_2(T21, GPIOAB1, VPOHS, NORWE);
1645	1766
1646	1767	FUNC_GROUP_DECL(PNOR, Y20, AB20, AB21, AA21, U21, W22, V22, W21, Y21, V21, Y22,
1647	1768	AA22, U22, T20, N18, P19, N19, T21);
1648	1769
1649	1770	#define T22 218
1650	1771	#define T22_DESC SIG_DESC_SET(SCUA8, 2)
1651		-SIG_EXPR_DECL(VPOVS, VPO, T22_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1652		-SIG_EXPR_DECL(VPOVS, VPOOFF1, T22_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1653		-SIG_EXPR_DECL(VPOVS, VPOOFF2, T22_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1654		-SIG_EXPR_LIST_DECL(VPOVS, SIG_EXPR_PTR(VPOVS, VPO),
1655		- SIG_EXPR_PTR(VPOVS, VPOOFF1), SIG_EXPR_PTR(VPOVS, VPOOFF2));
1656		-SIG_EXPR_LIST_DECL_SINGLE(WDTRST1, WDTRST1, T22_DESC);
1657		-MS_PIN_DECL(T22, GPIOAB2, VPOVS, WDTRST1);
	1772	+SIG_EXPR_DECL_SINGLE(VPOVS, VPO, T22_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1773	+SIG_EXPR_DECL_SINGLE(VPOVS, VPOOFF1, T22_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1774	+SIG_EXPR_DECL_SINGLE(VPOVS, VPOOFF2, T22_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1775	+SIG_EXPR_LIST_DECL(VPOVS, VPO,
	1776	+ SIG_EXPR_PTR(VPOVS, VPO),
	1777	+ SIG_EXPR_PTR(VPOVS, VPOOFF1),
	1778	+ SIG_EXPR_PTR(VPOVS, VPOOFF2));
	1779	+SIG_EXPR_LIST_ALIAS(T22, VPOVS, VPO);
	1780	+SIG_EXPR_LIST_DECL_SINGLE(T22, WDTRST1, WDTRST1, T22_DESC);
	1781	+PIN_DECL_2(T22, GPIOAB2, VPOVS, WDTRST1);
1658	1782	FUNC_GROUP_DECL(WDTRST1, T22);
1659	1783
1660	1784	#define R20 219
1661	1785	#define R20_DESC SIG_DESC_SET(SCUA8, 3)
1662		-SIG_EXPR_DECL(VPOCLK, VPO, R20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
1663		-SIG_EXPR_DECL(VPOCLK, VPOOFF1, R20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
1664		-SIG_EXPR_DECL(VPOCLK, VPOOFF2, R20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
1665		-SIG_EXPR_LIST_DECL(VPOCLK, SIG_EXPR_PTR(VPOCLK, VPO),
1666		- SIG_EXPR_PTR(VPOCLK, VPOOFF1), SIG_EXPR_PTR(VPOCLK, VPOOFF2));
1667		-SIG_EXPR_LIST_DECL_SINGLE(WDTRST2, WDTRST2, R20_DESC);
1668		-MS_PIN_DECL(R20, GPIOAB3, VPOCLK, WDTRST2);
	1786	+SIG_EXPR_DECL_SINGLE(VPOCLK, VPO, R20_DESC, VPO_DESC, CRT_DVO_EN_DESC);
	1787	+SIG_EXPR_DECL_SINGLE(VPOCLK, VPOOFF1, R20_DESC, VPOOFF1_DESC, CRT_DVO_EN_DESC);
	1788	+SIG_EXPR_DECL_SINGLE(VPOCLK, VPOOFF2, R20_DESC, VPOOFF2_DESC, CRT_DVO_EN_DESC);
	1789	+SIG_EXPR_LIST_DECL(VPOCLK, VPO,
	1790	+ SIG_EXPR_PTR(VPOCLK, VPO),
	1791	+ SIG_EXPR_PTR(VPOCLK, VPOOFF1),
	1792	+ SIG_EXPR_PTR(VPOCLK, VPOOFF2));
	1793	+SIG_EXPR_LIST_ALIAS(R20, VPOCLK, VPO);
	1794	+SIG_EXPR_LIST_DECL_SINGLE(R20, WDTRST2, WDTRST2, R20_DESC);
	1795	+PIN_DECL_2(R20, GPIOAB3, VPOCLK, WDTRST2);
1669	1796	FUNC_GROUP_DECL(WDTRST2, R20);
1670	1797
1671	1798	FUNC_GROUP_DECL(VPO, V20, U19, R18, P18, R19, W20, U20, AA20, Y20, AB20,
..	..	@@ -1675,64 +1802,64 @@
1675	1802	#define ESPI_DESC SIG_DESC_SET(HW_STRAP1, 25)
1676	1803
1677	1804	#define G21 224
1678		-SIG_EXPR_LIST_DECL_SINGLE(ESPID0, ESPI, ESPI_DESC);
1679		-SIG_EXPR_LIST_DECL_SINGLE(LAD0, LAD0, SIG_DESC_SET(SCUAC, 0));
1680		-MS_PIN_DECL(G21, GPIOAC0, ESPID0, LAD0);
	1805	+SIG_EXPR_LIST_DECL_SINGLE(G21, ESPID0, ESPI, ESPI_DESC);
	1806	+SIG_EXPR_LIST_DECL_SINGLE(G21, LAD0, LAD0, SIG_DESC_SET(SCUAC, 0));
	1807	+PIN_DECL_2(G21, GPIOAC0, ESPID0, LAD0);
1681	1808	FUNC_GROUP_DECL(LAD0, G21);
1682	1809
1683	1810	#define G20 225
1684		-SIG_EXPR_LIST_DECL_SINGLE(ESPID1, ESPI, ESPI_DESC);
1685		-SIG_EXPR_LIST_DECL_SINGLE(LAD1, LAD1, SIG_DESC_SET(SCUAC, 1));
1686		-MS_PIN_DECL(G20, GPIOAC1, ESPID1, LAD1);
	1811	+SIG_EXPR_LIST_DECL_SINGLE(G20, ESPID1, ESPI, ESPI_DESC);
	1812	+SIG_EXPR_LIST_DECL_SINGLE(G20, LAD1, LAD1, SIG_DESC_SET(SCUAC, 1));
	1813	+PIN_DECL_2(G20, GPIOAC1, ESPID1, LAD1);
1687	1814	FUNC_GROUP_DECL(LAD1, G20);
1688	1815
1689	1816	#define D22 226
1690		-SIG_EXPR_LIST_DECL_SINGLE(ESPID2, ESPI, ESPI_DESC);
1691		-SIG_EXPR_LIST_DECL_SINGLE(LAD2, LAD2, SIG_DESC_SET(SCUAC, 2));
1692		-MS_PIN_DECL(D22, GPIOAC2, ESPID2, LAD2);
	1817	+SIG_EXPR_LIST_DECL_SINGLE(D22, ESPID2, ESPI, ESPI_DESC);
	1818	+SIG_EXPR_LIST_DECL_SINGLE(D22, LAD2, LAD2, SIG_DESC_SET(SCUAC, 2));
	1819	+PIN_DECL_2(D22, GPIOAC2, ESPID2, LAD2);
1693	1820	FUNC_GROUP_DECL(LAD2, D22);
1694	1821
1695	1822	#define E22 227
1696		-SIG_EXPR_LIST_DECL_SINGLE(ESPID3, ESPI, ESPI_DESC);
1697		-SIG_EXPR_LIST_DECL_SINGLE(LAD3, LAD3, SIG_DESC_SET(SCUAC, 3));
1698		-MS_PIN_DECL(E22, GPIOAC3, ESPID3, LAD3);
	1823	+SIG_EXPR_LIST_DECL_SINGLE(E22, ESPID3, ESPI, ESPI_DESC);
	1824	+SIG_EXPR_LIST_DECL_SINGLE(E22, LAD3, LAD3, SIG_DESC_SET(SCUAC, 3));
	1825	+PIN_DECL_2(E22, GPIOAC3, ESPID3, LAD3);
1699	1826	FUNC_GROUP_DECL(LAD3, E22);
1700	1827
1701	1828	#define C22 228
1702		-SIG_EXPR_LIST_DECL_SINGLE(ESPICK, ESPI, ESPI_DESC);
1703		-SIG_EXPR_LIST_DECL_SINGLE(LCLK, LCLK, SIG_DESC_SET(SCUAC, 4));
1704		-MS_PIN_DECL(C22, GPIOAC4, ESPICK, LCLK);
	1829	+SIG_EXPR_LIST_DECL_SINGLE(C22, ESPICK, ESPI, ESPI_DESC);
	1830	+SIG_EXPR_LIST_DECL_SINGLE(C22, LCLK, LCLK, SIG_DESC_SET(SCUAC, 4));
	1831	+PIN_DECL_2(C22, GPIOAC4, ESPICK, LCLK);
1705	1832	FUNC_GROUP_DECL(LCLK, C22);
1706	1833
1707	1834	#define F21 229
1708		-SIG_EXPR_LIST_DECL_SINGLE(ESPICS, ESPI, ESPI_DESC);
1709		-SIG_EXPR_LIST_DECL_SINGLE(LFRAME, LFRAME, SIG_DESC_SET(SCUAC, 5));
1710		-MS_PIN_DECL(F21, GPIOAC5, ESPICS, LFRAME);
	1835	+SIG_EXPR_LIST_DECL_SINGLE(F21, ESPICS, ESPI, ESPI_DESC);
	1836	+SIG_EXPR_LIST_DECL_SINGLE(F21, LFRAME, LFRAME, SIG_DESC_SET(SCUAC, 5));
	1837	+PIN_DECL_2(F21, GPIOAC5, ESPICS, LFRAME);
1711	1838	FUNC_GROUP_DECL(LFRAME, F21);
1712	1839
1713	1840	#define F22 230
1714		-SIG_EXPR_LIST_DECL_SINGLE(ESPIALT, ESPI, ESPI_DESC);
1715		-SIG_EXPR_LIST_DECL_SINGLE(LSIRQ, LSIRQ, SIG_DESC_SET(SCUAC, 6));
1716		-MS_PIN_DECL(F22, GPIOAC6, ESPIALT, LSIRQ);
	1841	+SIG_EXPR_LIST_DECL_SINGLE(F22, ESPIALT, ESPI, ESPI_DESC);
	1842	+SIG_EXPR_LIST_DECL_SINGLE(F22, LSIRQ, LSIRQ, SIG_DESC_SET(SCUAC, 6));
	1843	+PIN_DECL_2(F22, GPIOAC6, ESPIALT, LSIRQ);
1717	1844	FUNC_GROUP_DECL(LSIRQ, F22);
1718	1845
1719	1846	#define G22 231
1720		-SIG_EXPR_LIST_DECL_SINGLE(ESPIRST, ESPI, ESPI_DESC);
1721		-SIG_EXPR_LIST_DECL_SINGLE(LPCRST, LPCRST, SIG_DESC_SET(SCUAC, 7));
1722		-MS_PIN_DECL(G22, GPIOAC7, ESPIRST, LPCRST);
	1847	+SIG_EXPR_LIST_DECL_SINGLE(G22, ESPIRST, ESPI, ESPI_DESC);
	1848	+SIG_EXPR_LIST_DECL_SINGLE(G22, LPCRST, LPCRST, SIG_DESC_SET(SCUAC, 7));
	1849	+PIN_DECL_2(G22, GPIOAC7, ESPIRST, LPCRST);
1723	1850	FUNC_GROUP_DECL(LPCRST, G22);
1724	1851
1725	1852	FUNC_GROUP_DECL(ESPI, G21, G20, D22, E22, C22, F21, F22, G22);
1726	1853
1727	1854	#define A7 232
1728		-SIG_EXPR_LIST_DECL_SINGLE(USB2AHDP, USB2AH, SIG_DESC_SET(SCU90, 29));
1729		-SIG_EXPR_LIST_DECL_SINGLE(USB2ADDP, USB2AD, SIG_DESC_BIT(SCU90, 29, 0));
1730		-MS_PIN_DECL_(A7, SIG_EXPR_LIST_PTR(USB2AHDP), SIG_EXPR_LIST_PTR(USB2ADDP));
	1855	+SIG_EXPR_LIST_DECL_SINGLE(A7, USB2AHDP, USB2AH, SIG_DESC_SET(SCU90, 29));
	1856	+SIG_EXPR_LIST_DECL_SINGLE(A7, USB2ADDP, USB2AD, SIG_DESC_BIT(SCU90, 29, 0));
	1857	+PIN_DECL_(A7, SIG_EXPR_LIST_PTR(A7, USB2AHDP), SIG_EXPR_LIST_PTR(A7, USB2ADDP));
1731	1858
1732	1859	#define A8 233
1733		-SIG_EXPR_LIST_DECL_SINGLE(USB2AHDN, USB2AH, SIG_DESC_SET(SCU90, 29));
1734		-SIG_EXPR_LIST_DECL_SINGLE(USB2ADDN, USB2AD, SIG_DESC_BIT(SCU90, 29, 0));
1735		-MS_PIN_DECL_(A8, SIG_EXPR_LIST_PTR(USB2AHDN), SIG_EXPR_LIST_PTR(USB2ADDN));
	1860	+SIG_EXPR_LIST_DECL_SINGLE(A8, USB2AHDN, USB2AH, SIG_DESC_SET(SCU90, 29));
	1861	+SIG_EXPR_LIST_DECL_SINGLE(A8, USB2ADDN, USB2AD, SIG_DESC_BIT(SCU90, 29, 0));
	1862	+PIN_DECL_(A8, SIG_EXPR_LIST_PTR(A8, USB2AHDN), SIG_EXPR_LIST_PTR(A8, USB2ADDN));
1736	1863
1737	1864	FUNC_GROUP_DECL(USB2AH, A7, A8);
1738	1865	FUNC_GROUP_DECL(USB2AD, A7, A8);
..	..	@@ -1743,24 +1870,28 @@
1743	1870	#define USB2BH2_DESC { ASPEED_IP_SCU, SCU94, GENMASK(14, 13), 3, 0 }
1744	1871
1745	1872	#define B6 234
1746		-SIG_EXPR_LIST_DECL_SINGLE(USB11BDP, USB11BHID, USB11BHID_DESC);
1747		-SIG_EXPR_LIST_DECL_SINGLE(USB2BDDP, USB2BD, USB2BD_DESC);
1748		-SIG_EXPR_DECL(USB2BHDP1, USB2BH, USB2BH1_DESC);
1749		-SIG_EXPR_DECL(USB2BHDP2, USB2BH, USB2BH2_DESC);
1750		-SIG_EXPR_LIST_DECL(USB2BHDP, SIG_EXPR_PTR(USB2BHDP1, USB2BH),
	1873	+SIG_EXPR_LIST_DECL_SINGLE(B6, USB11BDP, USB11BHID, USB11BHID_DESC);
	1874	+SIG_EXPR_LIST_DECL_SINGLE(B6, USB2BDDP, USB2BD, USB2BD_DESC);
	1875	+SIG_EXPR_DECL_SINGLE(USB2BHDP1, USB2BH, USB2BH1_DESC);
	1876	+SIG_EXPR_DECL_SINGLE(USB2BHDP2, USB2BH, USB2BH2_DESC);
	1877	+SIG_EXPR_LIST_DECL(USB2BHDP, USB2BH,
	1878	+ SIG_EXPR_PTR(USB2BHDP1, USB2BH),
1751	1879	SIG_EXPR_PTR(USB2BHDP2, USB2BH));
1752		-MS_PIN_DECL_(B6, SIG_EXPR_LIST_PTR(USB11BDP), SIG_EXPR_LIST_PTR(USB2BDDP),
1753		- SIG_EXPR_LIST_PTR(USB2BHDP));
	1880	+SIG_EXPR_LIST_ALIAS(B6, USB2BHDP, USB2BH);
	1881	+PIN_DECL_(B6, SIG_EXPR_LIST_PTR(B6, USB11BDP), SIG_EXPR_LIST_PTR(B6, USB2BDDP),
	1882	+ SIG_EXPR_LIST_PTR(B6, USB2BHDP));
1754	1883
1755	1884	#define A6 235
1756		-SIG_EXPR_LIST_DECL_SINGLE(USB11BDN, USB11BHID, USB11BHID_DESC);
1757		-SIG_EXPR_LIST_DECL_SINGLE(USB2BDN, USB2BD, USB2BD_DESC);
1758		-SIG_EXPR_DECL(USB2BHDN1, USB2BH, USB2BH1_DESC);
1759		-SIG_EXPR_DECL(USB2BHDN2, USB2BH, USB2BH2_DESC);
1760		-SIG_EXPR_LIST_DECL(USB2BHDN, SIG_EXPR_PTR(USB2BHDN1, USB2BH),
	1885	+SIG_EXPR_LIST_DECL_SINGLE(A6, USB11BDN, USB11BHID, USB11BHID_DESC);
	1886	+SIG_EXPR_LIST_DECL_SINGLE(A6, USB2BDN, USB2BD, USB2BD_DESC);
	1887	+SIG_EXPR_DECL_SINGLE(USB2BHDN1, USB2BH, USB2BH1_DESC);
	1888	+SIG_EXPR_DECL_SINGLE(USB2BHDN2, USB2BH, USB2BH2_DESC);
	1889	+SIG_EXPR_LIST_DECL(USB2BHDN, USB2BH,
	1890	+ SIG_EXPR_PTR(USB2BHDN1, USB2BH),
1761	1891	SIG_EXPR_PTR(USB2BHDN2, USB2BH));
1762		-MS_PIN_DECL_(A6, SIG_EXPR_LIST_PTR(USB11BDN), SIG_EXPR_LIST_PTR(USB2BDN),
1763		- SIG_EXPR_LIST_PTR(USB2BHDN));
	1892	+SIG_EXPR_LIST_ALIAS(A6, USB2BHDN, USB2BH);
	1893	+PIN_DECL_(A6, SIG_EXPR_LIST_PTR(A6, USB11BDN), SIG_EXPR_LIST_PTR(A6, USB2BDN),
	1894	+ SIG_EXPR_LIST_PTR(A6, USB2BHDN));
1764	1895
1765	1896	FUNC_GROUP_DECL(USB11BHID, B6, A6);
1766	1897	FUNC_GROUP_DECL(USB2BD, B6, A6);
..	..	@@ -2127,6 +2258,7 @@
2127	2258	ASPEED_PINCTRL_GROUP(SD2),
2128	2259	ASPEED_PINCTRL_GROUP(SDA1),
2129	2260	ASPEED_PINCTRL_GROUP(SDA2),
	2261	+ ASPEED_PINCTRL_GROUP(SGPM),
2130	2262	ASPEED_PINCTRL_GROUP(SGPS1),
2131	2263	ASPEED_PINCTRL_GROUP(SGPS2),
2132	2264	ASPEED_PINCTRL_GROUP(SIOONCTRL),
..	..	@@ -2296,6 +2428,7 @@
2296	2428	ASPEED_PINCTRL_FUNC(SD2),
2297	2429	ASPEED_PINCTRL_FUNC(SDA1),
2298	2430	ASPEED_PINCTRL_FUNC(SDA2),
	2431	+ ASPEED_PINCTRL_FUNC(SGPM),
2299	2432	ASPEED_PINCTRL_FUNC(SGPS1),
2300	2433	ASPEED_PINCTRL_FUNC(SGPS2),
2301	2434	ASPEED_PINCTRL_FUNC(SIOONCTRL),
..	..	@@ -2343,124 +2476,124 @@
2343	2476
2344	2477	static struct aspeed_pin_config aspeed_g5_configs[] = {
2345	2478	/* GPIOA, GPIOQ */
2346		- { PIN_CONFIG_BIAS_PULL_DOWN, { B14, B13 }, SCU8C, 16 },
2347		- { PIN_CONFIG_BIAS_DISABLE, { B14, B13 }, SCU8C, 16 },
2348		- { PIN_CONFIG_BIAS_PULL_DOWN, { A11, N20 }, SCU8C, 16 },
2349		- { PIN_CONFIG_BIAS_DISABLE, { A11, N20 }, SCU8C, 16 },
	2479	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B14, B13, SCU8C, 16),
	2480	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B14, B13, SCU8C, 16),
	2481	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, A11, N20, SCU8C, 16),
	2482	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, A11, N20, SCU8C, 16),
2350	2483
2351	2484	/* GPIOB, GPIOR */
2352		- { PIN_CONFIG_BIAS_PULL_DOWN, { K19, H20 }, SCU8C, 17 },
2353		- { PIN_CONFIG_BIAS_DISABLE, { K19, H20 }, SCU8C, 17 },
2354		- { PIN_CONFIG_BIAS_PULL_DOWN, { AA19, E10 }, SCU8C, 17 },
2355		- { PIN_CONFIG_BIAS_DISABLE, { AA19, E10 }, SCU8C, 17 },
	2485	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, K19, H20, SCU8C, 17),
	2486	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, K19, H20, SCU8C, 17),
	2487	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, AA19, E10, SCU8C, 17),
	2488	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, AA19, E10, SCU8C, 17),
2356	2489
2357	2490	/* GPIOC, GPIOS*/
2358		- { PIN_CONFIG_BIAS_PULL_DOWN, { C12, B11 }, SCU8C, 18 },
2359		- { PIN_CONFIG_BIAS_DISABLE, { C12, B11 }, SCU8C, 18 },
2360		- { PIN_CONFIG_BIAS_PULL_DOWN, { V20, AA20 }, SCU8C, 18 },
2361		- { PIN_CONFIG_BIAS_DISABLE, { V20, AA20 }, SCU8C, 18 },
	2491	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C12, B11, SCU8C, 18),
	2492	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, C12, B11, SCU8C, 18),
	2493	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, V20, AA20, SCU8C, 18),
	2494	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, V20, AA20, SCU8C, 18),
2362	2495
2363	2496	/* GPIOD, GPIOY */
2364		- { PIN_CONFIG_BIAS_PULL_DOWN, { F19, C21 }, SCU8C, 19 },
2365		- { PIN_CONFIG_BIAS_DISABLE, { F19, C21 }, SCU8C, 19 },
2366		- { PIN_CONFIG_BIAS_PULL_DOWN, { R22, P20 }, SCU8C, 19 },
2367		- { PIN_CONFIG_BIAS_DISABLE, { R22, P20 }, SCU8C, 19 },
	2497	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F19, C21, SCU8C, 19),
	2498	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, F19, C21, SCU8C, 19),
	2499	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, R22, P20, SCU8C, 19),
	2500	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, R22, P20, SCU8C, 19),
2368	2501
2369	2502	/* GPIOE, GPIOZ */
2370		- { PIN_CONFIG_BIAS_PULL_DOWN, { B20, B19 }, SCU8C, 20 },
2371		- { PIN_CONFIG_BIAS_DISABLE, { B20, B19 }, SCU8C, 20 },
2372		- { PIN_CONFIG_BIAS_PULL_DOWN, { Y20, W21 }, SCU8C, 20 },
2373		- { PIN_CONFIG_BIAS_DISABLE, { Y20, W21 }, SCU8C, 20 },
	2503	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B20, B19, SCU8C, 20),
	2504	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B20, B19, SCU8C, 20),
	2505	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, Y20, W21, SCU8C, 20),
	2506	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, Y20, W21, SCU8C, 20),
2374	2507
2375	2508	/* GPIOF, GPIOAA */
2376		- { PIN_CONFIG_BIAS_PULL_DOWN, { J19, H18 }, SCU8C, 21 },
2377		- { PIN_CONFIG_BIAS_DISABLE, { J19, H18 }, SCU8C, 21 },
2378		- { PIN_CONFIG_BIAS_PULL_DOWN, { Y21, P19 }, SCU8C, 21 },
2379		- { PIN_CONFIG_BIAS_DISABLE, { Y21, P19 }, SCU8C, 21 },
	2509	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, J19, H18, SCU8C, 21),
	2510	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, J19, H18, SCU8C, 21),
	2511	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, Y21, P19, SCU8C, 21),
	2512	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, Y21, P19, SCU8C, 21),
2380	2513
2381		- /* GPIOG, GPIOAB */
2382		- { PIN_CONFIG_BIAS_PULL_DOWN, { A19, E14 }, SCU8C, 22 },
2383		- { PIN_CONFIG_BIAS_DISABLE, { A19, E14 }, SCU8C, 22 },
2384		- { PIN_CONFIG_BIAS_PULL_DOWN, { N19, R20 }, SCU8C, 22 },
2385		- { PIN_CONFIG_BIAS_DISABLE, { N19, R20 }, SCU8C, 22 },
	2514	+ /* GPIOG, GPIOAB */
	2515	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, A19, E14, SCU8C, 22),
	2516	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, A19, E14, SCU8C, 22),
	2517	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, N19, R20, SCU8C, 22),
	2518	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, N19, R20, SCU8C, 22),
2386	2519
2387	2520	/* GPIOH, GPIOAC */
2388		- { PIN_CONFIG_BIAS_PULL_DOWN, { A18, D18 }, SCU8C, 23 },
2389		- { PIN_CONFIG_BIAS_DISABLE, { A18, D18 }, SCU8C, 23 },
2390		- { PIN_CONFIG_BIAS_PULL_DOWN, { G21, G22 }, SCU8C, 23 },
2391		- { PIN_CONFIG_BIAS_DISABLE, { G21, G22 }, SCU8C, 23 },
	2521	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, A18, D18, SCU8C, 23),
	2522	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, A18, D18, SCU8C, 23),
	2523	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, G21, G22, SCU8C, 23),
	2524	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, G21, G22, SCU8C, 23),
2392	2525
2393	2526	/* GPIOs [I, P] */
2394		- { PIN_CONFIG_BIAS_PULL_DOWN, { C18, A15 }, SCU8C, 24 },
2395		- { PIN_CONFIG_BIAS_DISABLE, { C18, A15 }, SCU8C, 24 },
2396		- { PIN_CONFIG_BIAS_PULL_DOWN, { R2, T3 }, SCU8C, 25 },
2397		- { PIN_CONFIG_BIAS_DISABLE, { R2, T3 }, SCU8C, 25 },
2398		- { PIN_CONFIG_BIAS_PULL_DOWN, { L3, R1 }, SCU8C, 26 },
2399		- { PIN_CONFIG_BIAS_DISABLE, { L3, R1 }, SCU8C, 26 },
2400		- { PIN_CONFIG_BIAS_PULL_DOWN, { T2, W1 }, SCU8C, 27 },
2401		- { PIN_CONFIG_BIAS_DISABLE, { T2, W1 }, SCU8C, 27 },
2402		- { PIN_CONFIG_BIAS_PULL_DOWN, { Y1, T5 }, SCU8C, 28 },
2403		- { PIN_CONFIG_BIAS_DISABLE, { Y1, T5 }, SCU8C, 28 },
2404		- { PIN_CONFIG_BIAS_PULL_DOWN, { V2, T4 }, SCU8C, 29 },
2405		- { PIN_CONFIG_BIAS_DISABLE, { V2, T4 }, SCU8C, 29 },
2406		- { PIN_CONFIG_BIAS_PULL_DOWN, { U5, W4 }, SCU8C, 30 },
2407		- { PIN_CONFIG_BIAS_DISABLE, { U5, W4 }, SCU8C, 30 },
2408		- { PIN_CONFIG_BIAS_PULL_DOWN, { V4, V6 }, SCU8C, 31 },
2409		- { PIN_CONFIG_BIAS_DISABLE, { V4, V6 }, SCU8C, 31 },
	2527	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C18, A15, SCU8C, 24),
	2528	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, C18, A15, SCU8C, 24),
	2529	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, R2, T3, SCU8C, 25),
	2530	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, R2, T3, SCU8C, 25),
	2531	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, L3, R1, SCU8C, 26),
	2532	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, L3, R1, SCU8C, 26),
	2533	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, T2, W1, SCU8C, 27),
	2534	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, T2, W1, SCU8C, 27),
	2535	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, Y1, T5, SCU8C, 28),
	2536	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, Y1, T5, SCU8C, 28),
	2537	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, V2, T4, SCU8C, 29),
	2538	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, V2, T4, SCU8C, 29),
	2539	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, U5, W4, SCU8C, 30),
	2540	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, U5, W4, SCU8C, 30),
	2541	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, V4, V6, SCU8C, 31),
	2542	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, V4, V6, SCU8C, 31),
2410	2543
2411	2544	/* GPIOs T[0-5] (RGMII1 Tx pins) */
2412		- { PIN_CONFIG_DRIVE_STRENGTH, { B5, B5 }, SCU90, 8 },
2413		- { PIN_CONFIG_DRIVE_STRENGTH, { E9, A5 }, SCU90, 9 },
2414		- { PIN_CONFIG_BIAS_PULL_DOWN, { B5, D7 }, SCU90, 12 },
2415		- { PIN_CONFIG_BIAS_DISABLE, { B5, D7 }, SCU90, 12 },
	2545	+ ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, B5, B5, SCU90, 8),
	2546	+ ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, E9, A5, SCU90, 9),
	2547	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B5, D7, SCU90, 12),
	2548	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B5, D7, SCU90, 12),
2416	2549
2417	2550	/* GPIOs T[6-7], U[0-3] (RGMII2 TX pins) */
2418		- { PIN_CONFIG_DRIVE_STRENGTH, { B2, B2 }, SCU90, 10 },
2419		- { PIN_CONFIG_DRIVE_STRENGTH, { B1, B3 }, SCU90, 11 },
2420		- { PIN_CONFIG_BIAS_PULL_DOWN, { B2, D4 }, SCU90, 14 },
2421		- { PIN_CONFIG_BIAS_DISABLE, { B2, D4 }, SCU90, 14 },
	2551	+ ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, B2, B2, SCU90, 10),
	2552	+ ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, B1, B3, SCU90, 11),
	2553	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D4, SCU90, 14),
	2554	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B2, D4, SCU90, 14),
2422	2555
2423	2556	/* GPIOs U[4-7], V[0-1] (RGMII1 Rx pins) */
2424		- { PIN_CONFIG_BIAS_PULL_DOWN, { B4, C4 }, SCU90, 13 },
2425		- { PIN_CONFIG_BIAS_DISABLE, { B4, C4 }, SCU90, 13 },
	2557	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B4, C4, SCU90, 13),
	2558	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B4, C4, SCU90, 13),
2426	2559
2427	2560	/* GPIOs V[2-7] (RGMII2 Rx pins) */
2428		- { PIN_CONFIG_BIAS_PULL_DOWN, { C2, E6 }, SCU90, 15 },
2429		- { PIN_CONFIG_BIAS_DISABLE, { C2, E6 }, SCU90, 15 },
	2561	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C2, E6, SCU90, 15),
	2562	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, C2, E6, SCU90, 15),
2430	2563
2431	2564	/* ADC pull-downs (SCUA8[19:4]) */
2432		- { PIN_CONFIG_BIAS_PULL_DOWN, { F4, F4 }, SCUA8, 4 },
2433		- { PIN_CONFIG_BIAS_DISABLE, { F4, F4 }, SCUA8, 4 },
2434		- { PIN_CONFIG_BIAS_PULL_DOWN, { F5, F5 }, SCUA8, 5 },
2435		- { PIN_CONFIG_BIAS_DISABLE, { F5, F5 }, SCUA8, 5 },
2436		- { PIN_CONFIG_BIAS_PULL_DOWN, { E2, E2 }, SCUA8, 6 },
2437		- { PIN_CONFIG_BIAS_DISABLE, { E2, E2 }, SCUA8, 6 },
2438		- { PIN_CONFIG_BIAS_PULL_DOWN, { E1, E1 }, SCUA8, 7 },
2439		- { PIN_CONFIG_BIAS_DISABLE, { E1, E1 }, SCUA8, 7 },
2440		- { PIN_CONFIG_BIAS_PULL_DOWN, { F3, F3 }, SCUA8, 8 },
2441		- { PIN_CONFIG_BIAS_DISABLE, { F3, F3 }, SCUA8, 8 },
2442		- { PIN_CONFIG_BIAS_PULL_DOWN, { E3, E3 }, SCUA8, 9 },
2443		- { PIN_CONFIG_BIAS_DISABLE, { E3, E3 }, SCUA8, 9 },
2444		- { PIN_CONFIG_BIAS_PULL_DOWN, { G5, G5 }, SCUA8, 10 },
2445		- { PIN_CONFIG_BIAS_DISABLE, { G5, G5 }, SCUA8, 10 },
2446		- { PIN_CONFIG_BIAS_PULL_DOWN, { G4, G4 }, SCUA8, 11 },
2447		- { PIN_CONFIG_BIAS_DISABLE, { G4, G4 }, SCUA8, 11 },
2448		- { PIN_CONFIG_BIAS_PULL_DOWN, { F2, F2 }, SCUA8, 12 },
2449		- { PIN_CONFIG_BIAS_DISABLE, { F2, F2 }, SCUA8, 12 },
2450		- { PIN_CONFIG_BIAS_PULL_DOWN, { G3, G3 }, SCUA8, 13 },
2451		- { PIN_CONFIG_BIAS_DISABLE, { G3, G3 }, SCUA8, 13 },
2452		- { PIN_CONFIG_BIAS_PULL_DOWN, { G2, G2 }, SCUA8, 14 },
2453		- { PIN_CONFIG_BIAS_DISABLE, { G2, G2 }, SCUA8, 14 },
2454		- { PIN_CONFIG_BIAS_PULL_DOWN, { F1, F1 }, SCUA8, 15 },
2455		- { PIN_CONFIG_BIAS_DISABLE, { F1, F1 }, SCUA8, 15 },
2456		- { PIN_CONFIG_BIAS_PULL_DOWN, { H5, H5 }, SCUA8, 16 },
2457		- { PIN_CONFIG_BIAS_DISABLE, { H5, H5 }, SCUA8, 16 },
2458		- { PIN_CONFIG_BIAS_PULL_DOWN, { G1, G1 }, SCUA8, 17 },
2459		- { PIN_CONFIG_BIAS_DISABLE, { G1, G1 }, SCUA8, 17 },
2460		- { PIN_CONFIG_BIAS_PULL_DOWN, { H3, H3 }, SCUA8, 18 },
2461		- { PIN_CONFIG_BIAS_DISABLE, { H3, H3 }, SCUA8, 18 },
2462		- { PIN_CONFIG_BIAS_PULL_DOWN, { H4, H4 }, SCUA8, 19 },
2463		- { PIN_CONFIG_BIAS_DISABLE, { H4, H4 }, SCUA8, 19 },
	2565	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F4, F4, SCUA8, 4),
	2566	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, F4, F4, SCUA8, 4),
	2567	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F5, F5, SCUA8, 5),
	2568	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, F5, F5, SCUA8, 5),
	2569	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E2, E2, SCUA8, 6),
	2570	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, E2, E2, SCUA8, 6),
	2571	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E1, E1, SCUA8, 7),
	2572	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, E1, E1, SCUA8, 7),
	2573	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F3, F3, SCUA8, 8),
	2574	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, F3, F3, SCUA8, 8),
	2575	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E3, E3, SCUA8, 9),
	2576	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, E3, E3, SCUA8, 9),
	2577	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, G5, G5, SCUA8, 10),
	2578	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, G5, G5, SCUA8, 10),
	2579	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, G4, G4, SCUA8, 11),
	2580	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, G4, G4, SCUA8, 11),
	2581	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F2, F2, SCUA8, 12),
	2582	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, F2, F2, SCUA8, 12),
	2583	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, G3, G3, SCUA8, 13),
	2584	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, G3, G3, SCUA8, 13),
	2585	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, G2, G2, SCUA8, 14),
	2586	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, G2, G2, SCUA8, 14),
	2587	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F1, F1, SCUA8, 15),
	2588	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, F1, F1, SCUA8, 15),
	2589	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, H5, H5, SCUA8, 16),
	2590	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, H5, H5, SCUA8, 16),
	2591	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, G1, G1, SCUA8, 17),
	2592	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, G1, G1, SCUA8, 17),
	2593	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, H3, H3, SCUA8, 18),
	2594	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, H3, H3, SCUA8, 18),
	2595	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, H4, H4, SCUA8, 19),
	2596	+ ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, H4, H4, SCUA8, 19),
2464	2597
2465	2598	/*
2466	2599	* Debounce settings for GPIOs D and E passthrough mode are in
..	..	@@ -2471,25 +2604,209 @@
2471	2604	* controller. Due to this tangle between GPIO and pinctrl we don't yet
2472	2605	* fully support pass-through debounce.
2473	2606	*/
2474		- { PIN_CONFIG_INPUT_DEBOUNCE, { F19, E21 }, SCUA8, 20 },
2475		- { PIN_CONFIG_INPUT_DEBOUNCE, { F20, D20 }, SCUA8, 21 },
2476		- { PIN_CONFIG_INPUT_DEBOUNCE, { D21, E20 }, SCUA8, 22 },
2477		- { PIN_CONFIG_INPUT_DEBOUNCE, { G18, C21 }, SCUA8, 23 },
2478		- { PIN_CONFIG_INPUT_DEBOUNCE, { B20, C20 }, SCUA8, 24 },
2479		- { PIN_CONFIG_INPUT_DEBOUNCE, { F18, F17 }, SCUA8, 25 },
2480		- { PIN_CONFIG_INPUT_DEBOUNCE, { E18, D19 }, SCUA8, 26 },
2481		- { PIN_CONFIG_INPUT_DEBOUNCE, { A20, B19 }, SCUA8, 27 },
	2607	+ ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, F19, E21, SCUA8, 20),
	2608	+ ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, F20, D20, SCUA8, 21),
	2609	+ ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, D21, E20, SCUA8, 22),
	2610	+ ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, G18, C21, SCUA8, 23),
	2611	+ ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, B20, C20, SCUA8, 24),
	2612	+ ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, F18, F17, SCUA8, 25),
	2613	+ ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, E18, D19, SCUA8, 26),
	2614	+ ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, A20, B19, SCUA8, 27),
	2615	+};
	2616	+
	2617	+static struct regmap aspeed_g5_acquire_regmap(struct aspeed_pinmux_data ctx,
	2618	+ int ip)
	2619	+{
	2620	+ if (ip == ASPEED_IP_SCU) {
	2621	+ WARN(!ctx->maps[ip], "Missing SCU syscon!");
	2622	+ return ctx->maps[ip];
	2623	+ }
	2624	+
	2625	+ if (ip >= ASPEED_NR_PINMUX_IPS)
	2626	+ return ERR_PTR(-EINVAL);
	2627	+
	2628	+ if (likely(ctx->maps[ip]))
	2629	+ return ctx->maps[ip];
	2630	+
	2631	+ if (ip == ASPEED_IP_GFX) {
	2632	+ struct device_node *node;
	2633	+ struct regmap *map;
	2634	+
	2635	+ node = of_parse_phandle(ctx->dev->of_node,
	2636	+ "aspeed,external-nodes", 0);
	2637	+ if (node) {
	2638	+ map = syscon_node_to_regmap(node);
	2639	+ of_node_put(node);
	2640	+ if (IS_ERR(map))
	2641	+ return map;
	2642	+ } else
	2643	+ return ERR_PTR(-ENODEV);
	2644	+
	2645	+ ctx->maps[ASPEED_IP_GFX] = map;
	2646	+ dev_dbg(ctx->dev, "Acquired GFX regmap");
	2647	+ return map;
	2648	+ }
	2649	+
	2650	+ if (ip == ASPEED_IP_LPC) {
	2651	+ struct device_node *node;
	2652	+ struct regmap *map;
	2653	+
	2654	+ node = of_parse_phandle(ctx->dev->of_node,
	2655	+ "aspeed,external-nodes", 1);
	2656	+ if (node) {
	2657	+ map = syscon_node_to_regmap(node->parent);
	2658	+ of_node_put(node);
	2659	+ if (IS_ERR(map))
	2660	+ return map;
	2661	+ } else
	2662	+ return ERR_PTR(-ENODEV);
	2663	+
	2664	+ ctx->maps[ASPEED_IP_LPC] = map;
	2665	+ dev_dbg(ctx->dev, "Acquired LPC regmap");
	2666	+ return map;
	2667	+ }
	2668	+
	2669	+ return ERR_PTR(-EINVAL);
	2670	+}
	2671	+
	2672	+static int aspeed_g5_sig_expr_eval(struct aspeed_pinmux_data *ctx,
	2673	+ const struct aspeed_sig_expr *expr,
	2674	+ bool enabled)
	2675	+{
	2676	+ int ret;
	2677	+ int i;
	2678	+
	2679	+ for (i = 0; i < expr->ndescs; i++) {
	2680	+ const struct aspeed_sig_desc *desc = &expr->descs[i];
	2681	+ struct regmap *map;
	2682	+
	2683	+ map = aspeed_g5_acquire_regmap(ctx, desc->ip);
	2684	+ if (IS_ERR(map)) {
	2685	+ dev_err(ctx->dev,
	2686	+ "Failed to acquire regmap for IP block %d\n",
	2687	+ desc->ip);
	2688	+ return PTR_ERR(map);
	2689	+ }
	2690	+
	2691	+ ret = aspeed_sig_desc_eval(desc, enabled, ctx->maps[desc->ip]);
	2692	+ if (ret <= 0)
	2693	+ return ret;
	2694	+ }
	2695	+
	2696	+ return 1;
	2697	+}
	2698	+
	2699	+/**
	2700	+ * Configure a pin's signal by applying an expression's descriptor state for
	2701	+ * all descriptors in the expression.
	2702	+ *
	2703	+ * @ctx: The pinmux context
	2704	+ * @expr: The expression associated with the function whose signal is to be
	2705	+ * configured
	2706	+ * @enable: true to enable an function's signal through a pin's signal
	2707	+ * expression, false to disable the function's signal
	2708	+ *
	2709	+ * Return: 0 if the expression is configured as requested and a negative error
	2710	+ * code otherwise
	2711	+ */
	2712	+static int aspeed_g5_sig_expr_set(struct aspeed_pinmux_data *ctx,
	2713	+ const struct aspeed_sig_expr *expr,
	2714	+ bool enable)
	2715	+{
	2716	+ int ret;
	2717	+ int i;
	2718	+
	2719	+ for (i = 0; i < expr->ndescs; i++) {
	2720	+ const struct aspeed_sig_desc *desc = &expr->descs[i];
	2721	+ u32 pattern = enable ? desc->enable : desc->disable;
	2722	+ u32 val = (pattern << __ffs(desc->mask));
	2723	+ struct regmap *map;
	2724	+
	2725	+ map = aspeed_g5_acquire_regmap(ctx, desc->ip);
	2726	+ if (IS_ERR(map)) {
	2727	+ dev_err(ctx->dev,
	2728	+ "Failed to acquire regmap for IP block %d\n",
	2729	+ desc->ip);
	2730	+ return PTR_ERR(map);
	2731	+ }
	2732	+
	2733	+ /*
	2734	+ * Strap registers are configured in hardware or by early-boot
	2735	+ * firmware. Treat them as read-only despite that we can write
	2736	+ * them. This may mean that certain functions cannot be
	2737	+ * deconfigured and is the reason we re-evaluate after writing
	2738	+ * all descriptor bits.
	2739	+ *
	2740	+ * Port D and port E GPIO loopback modes are the only exception
	2741	+ * as those are commonly used with front-panel buttons to allow
	2742	+ * normal operation of the host when the BMC is powered off or
	2743	+ * fails to boot. Once the BMC has booted, the loopback mode
	2744	+ * must be disabled for the BMC to control host power-on and
	2745	+ * reset.
	2746	+ */
	2747	+ if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 &&
	2748	+ !(desc->mask & (BIT(21) \| BIT(22))))
	2749	+ continue;
	2750	+
	2751	+ if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
	2752	+ continue;
	2753	+
	2754	+ /* On AST2500, Set bits in SCU70 are cleared from SCU7C */
	2755	+ if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1) {
	2756	+ u32 value = ~val & desc->mask;
	2757	+
	2758	+ if (value) {
	2759	+ ret = regmap_write(ctx->maps[desc->ip],
	2760	+ HW_REVISION_ID, value);
	2761	+ if (ret < 0)
	2762	+ return ret;
	2763	+ }
	2764	+ }
	2765	+
	2766	+ ret = regmap_update_bits(ctx->maps[desc->ip], desc->reg,
	2767	+ desc->mask, val);
	2768	+
	2769	+ if (ret)
	2770	+ return ret;
	2771	+ }
	2772	+
	2773	+ ret = aspeed_sig_expr_eval(ctx, expr, enable);
	2774	+ if (ret < 0)
	2775	+ return ret;
	2776	+
	2777	+ if (!ret)
	2778	+ return -EPERM;
	2779	+
	2780	+ return 0;
	2781	+}
	2782	+
	2783	+static const struct aspeed_pin_config_map aspeed_g5_pin_config_map[] = {
	2784	+ { PIN_CONFIG_BIAS_PULL_DOWN, 0, 1, BIT_MASK(0)},
	2785	+ { PIN_CONFIG_BIAS_PULL_DOWN, -1, 0, BIT_MASK(0)},
	2786	+ { PIN_CONFIG_BIAS_DISABLE, -1, 1, BIT_MASK(0)},
	2787	+ { PIN_CONFIG_DRIVE_STRENGTH, 8, 0, BIT_MASK(0)},
	2788	+ { PIN_CONFIG_DRIVE_STRENGTH, 16, 1, BIT_MASK(0)},
	2789	+};
	2790	+
	2791	+static const struct aspeed_pinmux_ops aspeed_g5_ops = {
	2792	+ .eval = aspeed_g5_sig_expr_eval,
	2793	+ .set = aspeed_g5_sig_expr_set,
2482	2794	};
2483	2795
2484	2796	static struct aspeed_pinctrl_data aspeed_g5_pinctrl_data = {
2485	2797	.pins = aspeed_g5_pins,
2486	2798	.npins = ARRAY_SIZE(aspeed_g5_pins),
2487		- .groups = aspeed_g5_groups,
2488		- .ngroups = ARRAY_SIZE(aspeed_g5_groups),
2489		- .functions = aspeed_g5_functions,
2490		- .nfunctions = ARRAY_SIZE(aspeed_g5_functions),
	2799	+ .pinmux = {
	2800	+ .ops = &aspeed_g5_ops,
	2801	+ .groups = aspeed_g5_groups,
	2802	+ .ngroups = ARRAY_SIZE(aspeed_g5_groups),
	2803	+ .functions = aspeed_g5_functions,
	2804	+ .nfunctions = ARRAY_SIZE(aspeed_g5_functions),
	2805	+ },
2491	2806	.configs = aspeed_g5_configs,
2492	2807	.nconfigs = ARRAY_SIZE(aspeed_g5_configs),
	2808	+ .confmaps = aspeed_g5_pin_config_map,
	2809	+ .nconfmaps = ARRAY_SIZE(aspeed_g5_pin_config_map),
2493	2810	};
2494	2811
2495	2812	static const struct pinmux_ops aspeed_g5_pinmux_ops = {
..	..	@@ -2530,34 +2847,11 @@
2530	2847	static int aspeed_g5_pinctrl_probe(struct platform_device *pdev)
2531	2848	{
2532	2849	int i;
2533		- struct regmap *map;
2534		- struct device_node *node;
2535	2850
2536	2851	for (i = 0; i < ARRAY_SIZE(aspeed_g5_pins); i++)
2537	2852	aspeed_g5_pins[i].number = i;
2538	2853
2539		- node = of_parse_phandle(pdev->dev.of_node, "aspeed,external-nodes", 0);
2540		- map = syscon_node_to_regmap(node);
2541		- of_node_put(node);
2542		- if (IS_ERR(map)) {
2543		- dev_warn(&pdev->dev, "No GFX phandle found, some mux configurations may fail\n");
2544		- map = NULL;
2545		- }
2546		- aspeed_g5_pinctrl_data.maps[ASPEED_IP_GFX] = map;
2547		-
2548		- node = of_parse_phandle(pdev->dev.of_node, "aspeed,external-nodes", 1);
2549		- if (node) {
2550		- map = syscon_node_to_regmap(node->parent);
2551		- if (IS_ERR(map)) {
2552		- dev_warn(&pdev->dev, "LHC parent is not a syscon, some mux configurations may fail\n");
2553		- map = NULL;
2554		- }
2555		- } else {
2556		- dev_warn(&pdev->dev, "No LHC phandle found, some mux configurations may fail\n");
2557		- map = NULL;
2558		- }
2559		- of_node_put(node);
2560		- aspeed_g5_pinctrl_data.maps[ASPEED_IP_LPC] = map;
	2854	+ aspeed_g5_pinctrl_data.pinmux.dev = &pdev->dev;
2561	2855
2562	2856	return aspeed_pinctrl_probe(pdev, &aspeed_g5_pinctrl_desc,
2563	2857	&aspeed_g5_pinctrl_data);
..	..	@@ -2565,6 +2859,10 @@
2565	2859
2566	2860	static const struct of_device_id aspeed_g5_pinctrl_of_match[] = {
2567	2861	{ .compatible = "aspeed,ast2500-pinctrl", },
	2862	+ /*
	2863	+ * The aspeed,g5-pinctrl compatible has been removed the from the
	2864	+ * bindings, but keep the match in case of old devicetrees.
	2865	+ */
2568	2866	{ .compatible = "aspeed,g5-pinctrl", },
2569	2867	{ },
2570	2868	};