add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/pinctrl/actions/pinctrl-owl.h
..
..
@@ -15,12 +15,135 @@
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 #define OWL_PINCONF_SLEW_SLOW 0
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 #define OWL_PINCONF_SLEW_FAST 1
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17
 
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-enum owl_pinconf_pull {
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-	OWL_PINCONF_PULL_HIZ,
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-	OWL_PINCONF_PULL_DOWN,
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-	OWL_PINCONF_PULL_UP,
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-	OWL_PINCONF_PULL_HOLD,
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-};
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+#define MUX_PG(group_name, reg, shift, width)				\
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+	{								\
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+		.name = #group_name,					\
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+		.pads = group_name##_pads,				\
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+		.npads = ARRAY_SIZE(group_name##_pads),			\
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+		.funcs = group_name##_funcs,				\
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+		.nfuncs = ARRAY_SIZE(group_name##_funcs),		\
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+		.mfpctl_reg  = MFCTL##reg,				\
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+		.mfpctl_shift = shift,					\
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+		.mfpctl_width = width,					\
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+		.drv_reg = -1,						\
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+		.drv_shift = -1,					\
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+		.drv_width = -1,					\
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+		.sr_reg = -1,						\
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+		.sr_shift = -1,						\
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+		.sr_width = -1,						\
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+	}
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+
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+#define DRV_PG(group_name, reg, shift, width)				\
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+	{								\
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+		.name = #group_name,					\
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+		.pads = group_name##_pads,				\
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+		.npads = ARRAY_SIZE(group_name##_pads),			\
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+		.mfpctl_reg  = -1,					\
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+		.mfpctl_shift = -1,					\
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+		.mfpctl_width = -1,					\
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+		.drv_reg = PAD_DRV##reg,				\
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+		.drv_shift = shift,					\
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+		.drv_width = width,					\
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+		.sr_reg = -1,						\
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+		.sr_shift = -1,						\
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+		.sr_width = -1,						\
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+	}
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+
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+#define SR_PG(group_name, reg, shift, width)				\
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+	{								\
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+		.name = #group_name,					\
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+		.pads = group_name##_pads,				\
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+		.npads = ARRAY_SIZE(group_name##_pads),			\
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+		.mfpctl_reg  = -1,					\
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+		.mfpctl_shift = -1,					\
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+		.mfpctl_width = -1,					\
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+		.drv_reg = -1,						\
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+		.drv_shift = -1,					\
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+		.drv_width = -1,					\
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+		.sr_reg = PAD_SR##reg,					\
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+		.sr_shift = shift,					\
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+		.sr_width = width,					\
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+	}
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+
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+#define FUNCTION(fname)					\
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+	{						\
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+		.name = #fname,				\
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+		.groups = fname##_groups,		\
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+		.ngroups = ARRAY_SIZE(fname##_groups),	\
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+	}
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+
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+/* PAD PULL UP/DOWN CONFIGURES */
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+#define PULLCTL_CONF(pull_reg, pull_sft, pull_wdt)	\
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+	{						\
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+		.reg = PAD_PULLCTL##pull_reg,		\
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+		.shift = pull_sft,			\
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+		.width = pull_wdt,			\
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+	}
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+
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+#define PAD_PULLCTL_CONF(pad_name, pull_reg, pull_sft, pull_wdt)	\
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+	struct owl_pullctl pad_name##_pullctl_conf			\
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+		= PULLCTL_CONF(pull_reg, pull_sft, pull_wdt)
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+
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+#define ST_CONF(st_reg, st_sft, st_wdt)			\
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+	{						\
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+		.reg = PAD_ST##st_reg,			\
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+		.shift = st_sft,			\
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+		.width = st_wdt,			\
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+	}
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+
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+#define PAD_ST_CONF(pad_name, st_reg, st_sft, st_wdt)	\
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+	struct owl_st pad_name##_st_conf		\
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+		= ST_CONF(st_reg, st_sft, st_wdt)
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+
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+#define PAD_INFO(name)					\
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+	{						\
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+		.pad = name,				\
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+		.pullctl = NULL,			\
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+		.st = NULL,				\
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+	}
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+
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+#define PAD_INFO_ST(name)				\
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+	{						\
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+		.pad = name,				\
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+		.pullctl = NULL,			\
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+		.st = &name##_st_conf,			\
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+	}
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+
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+#define PAD_INFO_PULLCTL(name)				\
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+	{						\
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+		.pad = name,				\
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+		.pullctl = &name##_pullctl_conf,	\
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+		.st = NULL,				\
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+	}
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+
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+#define PAD_INFO_PULLCTL_ST(name)			\
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+	{						\
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+		.pad = name,				\
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+		.pullctl = &name##_pullctl_conf,	\
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+		.st = &name##_st_conf,			\
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+	}
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+
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+#define OWL_GPIO_PORT_A		0
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+#define OWL_GPIO_PORT_B		1
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+#define OWL_GPIO_PORT_C		2
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+#define OWL_GPIO_PORT_D		3
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+#define OWL_GPIO_PORT_E		4
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+#define OWL_GPIO_PORT_F		5
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+
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+#define OWL_GPIO_PORT(port, base, count, _outen, _inen, _dat, _intc_ctl,\
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+			_intc_pd, _intc_msk, _intc_type, _share)	\
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+	[OWL_GPIO_PORT_##port] = {				\
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+		.offset = base,					\
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+		.pins = count,					\
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+		.outen = _outen,				\
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+		.inen = _inen,					\
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+		.dat = _dat,					\
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+		.intc_ctl = _intc_ctl,				\
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+		.intc_pd = _intc_pd,				\
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+		.intc_msk = _intc_msk,				\
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+		.intc_type = _intc_type,			\
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+		.shared_ctl_offset = _share,			\
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+	}
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 enum owl_pinconf_drv {
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 	OWL_PINCONF_DRV_2MA,
..
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@@ -148,6 +271,7 @@
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 	unsigned int intc_pd;
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 	unsigned int intc_msk;
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 	unsigned int intc_type;
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+	u8 shared_ctl_offset;
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 };
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 /**
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@@ -174,6 +298,12 @@
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 	unsigned int ngpios;
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 	const struct owl_gpio_port *ports;
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 	unsigned int nports;
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+	int (*padctl_val2arg)(const struct owl_padinfo *padinfo,
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+				unsigned int param,
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+				u32 *arg);
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+	int (*padctl_arg2val)(const struct owl_padinfo *info,
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+				unsigned int param,
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+				u32 *arg);
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 };
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 int owl_pinctrl_probe(struct platform_device *pdev,