hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/pci/controller/pci-xgene.c
....@@ -256,7 +256,7 @@
256256 return xgene_pcie_ecam_init(cfg, XGENE_PCIE_IP_VER_1);
257257 }
258258
259
-struct pci_ecam_ops xgene_v1_pcie_ecam_ops = {
259
+const struct pci_ecam_ops xgene_v1_pcie_ecam_ops = {
260260 .bus_shift = 16,
261261 .init = xgene_v1_pcie_ecam_init,
262262 .pci_ops = {
....@@ -271,7 +271,7 @@
271271 return xgene_pcie_ecam_init(cfg, XGENE_PCIE_IP_VER_2);
272272 }
273273
274
-struct pci_ecam_ops xgene_v2_pcie_ecam_ops = {
274
+const struct pci_ecam_ops xgene_v2_pcie_ecam_ops = {
275275 .bus_shift = 16,
276276 .init = xgene_v2_pcie_ecam_init,
277277 .pci_ops = {
....@@ -405,15 +405,13 @@
405405 xgene_pcie_writel(port, CFGCTL, EN_REG);
406406 }
407407
408
-static int xgene_pcie_map_ranges(struct xgene_pcie_port *port,
409
- struct list_head *res,
410
- resource_size_t io_base)
408
+static int xgene_pcie_map_ranges(struct xgene_pcie_port *port)
411409 {
410
+ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(port);
412411 struct resource_entry *window;
413412 struct device *dev = port->dev;
414
- int ret;
415413
416
- resource_list_for_each_entry(window, res) {
414
+ resource_list_for_each_entry(window, &bridge->windows) {
417415 struct resource *res = window->res;
418416 u64 restype = resource_type(res);
419417
....@@ -421,11 +419,9 @@
421419
422420 switch (restype) {
423421 case IORESOURCE_IO:
424
- xgene_pcie_setup_ob_reg(port, res, OMR3BARL, io_base,
422
+ xgene_pcie_setup_ob_reg(port, res, OMR3BARL,
423
+ pci_pio_to_address(res->start),
425424 res->start - window->offset);
426
- ret = devm_pci_remap_iospace(dev, res, io_base);
427
- if (ret < 0)
428
- return ret;
429425 break;
430426 case IORESOURCE_MEM:
431427 if (res->flags & IORESOURCE_PREFETCH)
....@@ -567,8 +563,7 @@
567563 xgene_pcie_writel(port, i, 0);
568564 }
569565
570
-static int xgene_pcie_setup(struct xgene_pcie_port *port, struct list_head *res,
571
- resource_size_t io_base)
566
+static int xgene_pcie_setup(struct xgene_pcie_port *port)
572567 {
573568 struct device *dev = port->dev;
574569 u32 val, lanes = 0, speed = 0;
....@@ -580,7 +575,7 @@
580575 val = (XGENE_PCIE_DEVICEID << 16) | XGENE_PCIE_VENDORID;
581576 xgene_pcie_writel(port, BRIDGE_CFG_0, val);
582577
583
- ret = xgene_pcie_map_ranges(port, res, io_base);
578
+ ret = xgene_pcie_map_ranges(port);
584579 if (ret)
585580 return ret;
586581
....@@ -607,11 +602,8 @@
607602 struct device *dev = &pdev->dev;
608603 struct device_node *dn = dev->of_node;
609604 struct xgene_pcie_port *port;
610
- resource_size_t iobase = 0;
611
- struct pci_bus *bus, *child;
612605 struct pci_host_bridge *bridge;
613606 int ret;
614
- LIST_HEAD(res);
615607
616608 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*port));
617609 if (!bridge)
....@@ -634,42 +626,14 @@
634626 if (ret)
635627 return ret;
636628
637
- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res,
638
- &iobase);
629
+ ret = xgene_pcie_setup(port);
639630 if (ret)
640631 return ret;
641632
642
- ret = devm_request_pci_bus_resources(dev, &res);
643
- if (ret)
644
- goto error;
645
-
646
- ret = xgene_pcie_setup(port, &res, iobase);
647
- if (ret)
648
- goto error;
649
-
650
- list_splice_init(&res, &bridge->windows);
651
- bridge->dev.parent = dev;
652633 bridge->sysdata = port;
653
- bridge->busnr = 0;
654634 bridge->ops = &xgene_pcie_ops;
655
- bridge->map_irq = of_irq_parse_and_map_pci;
656
- bridge->swizzle_irq = pci_common_swizzle;
657635
658
- ret = pci_scan_root_bus_bridge(bridge);
659
- if (ret < 0)
660
- goto error;
661
-
662
- bus = bridge->bus;
663
-
664
- pci_assign_unassigned_bus_resources(bus);
665
- list_for_each_entry(child, &bus->children, node)
666
- pcie_bus_configure_settings(child);
667
- pci_bus_add_devices(bus);
668
- return 0;
669
-
670
-error:
671
- pci_free_resource_list(&res);
672
- return ret;
636
+ return pci_host_probe(bridge);
673637 }
674638
675639 static const struct of_device_id xgene_pcie_match_table[] = {