add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/parisc/lba_pci.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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 **
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 **  PCI Lower Bus Adapter (LBA) manager
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@@ -5,10 +6,6 @@
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 **	(c) Copyright 1999,2000 Grant Grundler
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 **	(c) Copyright 1999,2000 Hewlett-Packard Company
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 **
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-**	This program is free software; you can redistribute it and/or modify
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-**	it under the terms of the GNU General Public License as published by
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-**      the Free Software Foundation; either version 2 of the License, or
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-**      (at your option) any later version.
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 **
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 **
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 ** This module primarily provides access to PCI bus (config/IOport
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@@ -48,6 +45,8 @@
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 #include <asm/hardware.h>	/* for register_parisc_driver() stuff */
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 #include <asm/parisc-device.h>
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 #include <asm/io.h>		/* read/write stuff */
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+
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+#include "iommu.h"
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 #undef DEBUG_LBA	/* general stuff */
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 #undef DEBUG_LBA_PORT	/* debug I/O Port access */
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@@ -109,12 +108,10 @@
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 #define LBA_SKIP_PROBE(d) ((d)->flags & LBA_FLAG_SKIP_PROBE)
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-
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-/* Looks nice and keeps the compiler happy */
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-#define LBA_DEV(d) ({				\
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-	void *__pdata = d;			\
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-	BUG_ON(!__pdata);			\
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-	(struct lba_device *)__pdata; })
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+static inline struct lba_device *LBA_DEV(struct pci_hba_data *hba)
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+{
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+	return container_of(hba, struct lba_device, hba);
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+}
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 /*
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 ** Only allow 8 subsidiary busses per LBA
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@@ -1137,7 +1134,7 @@
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 			** Postable I/O port space is per PCI host adapter.
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 			** base of 64MB PIOP region
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 			*/
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-			lba_dev->iop_base = ioremap_nocache(p->start, 64 * 1024 * 1024);
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+			lba_dev->iop_base = ioremap(p->start, 64 * 1024 * 1024);
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 			sprintf(lba_dev->hba.io_name, "PCI%02x Ports",
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 					(int)lba_dev->hba.bus_num.start);
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@@ -1275,7 +1272,7 @@
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 		r->flags = IORESOURCE_MEM;
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 		/* mmio_mask also clears Enable bit */
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 		r->start &= mmio_mask;
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-		r->start = PCI_HOST_ADDR(HBA_DATA(lba_dev), r->start);
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+		r->start = PCI_HOST_ADDR(&lba_dev->hba, r->start);
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 		rsize = ~ READ_REG32(lba_dev->hba.base_addr + LBA_LMMIO_MASK);
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 		/*
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@@ -1321,7 +1318,7 @@
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 		r->flags = IORESOURCE_MEM;
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 		/* mmio_mask also clears Enable bit */
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 		r->start &= mmio_mask;
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-		r->start = PCI_HOST_ADDR(HBA_DATA(lba_dev), r->start);
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+		r->start = PCI_HOST_ADDR(&lba_dev->hba, r->start);
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 		rsize = READ_REG32(lba_dev->hba.base_addr + LBA_ELMMIO_MASK);
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 		r->end = r->start + ~rsize;
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 	}
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@@ -1479,8 +1476,12 @@
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 	u32 func_class;
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 	void *tmp_obj;
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 	char *version;
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-	void __iomem *addr = ioremap_nocache(dev->hpa.start, 4096);
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+	void __iomem *addr;
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 	int max;
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+
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+	addr = ioremap(dev->hpa.start, 4096);
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+	if (addr == NULL)
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+		return -ENOMEM;
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 	/* Read HW Rev First */
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 	func_class = READ_REG32(addr + LBA_FCLASS);
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@@ -1562,7 +1563,7 @@
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 	/* ------------ Second : initialize common stuff ---------- */
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 	pci_bios = &lba_bios_ops;
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-	pcibios_register_hba(HBA_DATA(lba_dev));
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+	pcibios_register_hba(&lba_dev->hba);
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 	spin_lock_init(&lba_dev->lba_lock);
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 	if (lba_hw_init(lba_dev))
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@@ -1578,7 +1579,7 @@
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 	} else {
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 		if (!astro_iop_base) {
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 			/* Sprockets PDC uses NPIOP region */
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-			astro_iop_base = ioremap_nocache(LBA_PORT_BASE, 64 * 1024);
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+			astro_iop_base = ioremap(LBA_PORT_BASE, 64 * 1024);
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 			pci_port = &lba_astro_port_ops;
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 		}
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@@ -1696,7 +1697,7 @@
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 */
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 void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask)
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 {
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-	void __iomem * base_addr = ioremap_nocache(lba->hpa.start, 4096);
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+	void __iomem * base_addr = ioremap(lba->hpa.start, 4096);
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 	imask <<= 2;	/* adjust for hints - 2 more bits */
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@@ -1743,3 +1744,15 @@
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 }
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 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_DIVA_AUX,
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 	quirk_diva_aux_disable);
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+
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+static void quirk_tosca_aux_disable(struct pci_dev *dev)
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+{
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+	if (dev->subsystem_vendor != PCI_VENDOR_ID_HP ||
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+	    dev->subsystem_device != 0x104a)
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+		return;
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+
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+	dev_info(&dev->dev, "Hiding Tosca secondary built-in AUX serial device");
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+	dev->device = 0;
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+}
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_DIVA,
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+	quirk_tosca_aux_disable);