.. | .. |
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1 | | -/****************************************************************************** |
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2 | | - * |
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3 | | - * Copyright(c) 2009-2012 Realtek Corporation. |
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4 | | - * |
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5 | | - * This program is free software; you can redistribute it and/or modify it |
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6 | | - * under the terms of version 2 of the GNU General Public License as |
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7 | | - * published by the Free Software Foundation. |
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8 | | - * |
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9 | | - * This program is distributed in the hope that it will be useful, but WITHOUT |
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10 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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12 | | - * more details. |
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13 | | - * |
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14 | | - * The full GNU General Public License is included in this distribution in the |
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15 | | - * file called LICENSE. |
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16 | | - * |
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17 | | - * Contact Information: |
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18 | | - * wlanfae <wlanfae@realtek.com> |
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19 | | - * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, |
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20 | | - * Hsinchu 300, Taiwan. |
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21 | | - * |
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22 | | - * Larry Finger <Larry.Finger@lwfinger.net> |
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23 | | - * |
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24 | | - *****************************************************************************/ |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 2 | +/* Copyright(c) 2009-2012 Realtek Corporation.*/ |
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25 | 3 | |
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26 | 4 | #include "../wifi.h" |
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27 | 5 | #include "../efuse.h" |
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.. | .. |
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133 | 111 | case HW_VAR_SLOT_TIME:{ |
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134 | 112 | u8 e_aci; |
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135 | 113 | |
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136 | | - RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
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137 | | - "HW_VAR_SLOT_TIME %x\n", val[0]); |
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| 114 | + rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, |
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| 115 | + "HW_VAR_SLOT_TIME %x\n", val[0]); |
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138 | 116 | |
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139 | 117 | rtl_write_byte(rtlpriv, SLOT_TIME, val[0]); |
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140 | 118 | |
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.. | .. |
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178 | 156 | |
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179 | 157 | *val = min_spacing_to_set; |
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180 | 158 | |
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181 | | - RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
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182 | | - "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", |
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183 | | - mac->min_space_cfg); |
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| 159 | + rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, |
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| 160 | + "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", |
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| 161 | + mac->min_space_cfg); |
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184 | 162 | |
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185 | 163 | rtl_write_byte(rtlpriv, AMPDU_MIN_SPACE, |
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186 | 164 | mac->min_space_cfg); |
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.. | .. |
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194 | 172 | mac->min_space_cfg = rtlpriv->rtlhal.minspace_cfg; |
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195 | 173 | mac->min_space_cfg |= (density_to_set << 3); |
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196 | 174 | |
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197 | | - RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
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198 | | - "Set HW_VAR_SHORTGI_DENSITY: %#x\n", |
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199 | | - mac->min_space_cfg); |
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| 175 | + rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, |
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| 176 | + "Set HW_VAR_SHORTGI_DENSITY: %#x\n", |
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| 177 | + mac->min_space_cfg); |
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200 | 178 | |
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201 | 179 | rtl_write_byte(rtlpriv, AMPDU_MIN_SPACE, |
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202 | 180 | mac->min_space_cfg); |
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.. | .. |
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237 | 215 | (factorlevel[17] << 4)); |
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238 | 216 | rtl_write_byte(rtlpriv, AGGLEN_LMT_H, regtoset); |
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239 | 217 | |
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240 | | - RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, |
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241 | | - "Set HW_VAR_AMPDU_FACTOR: %#x\n", |
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242 | | - factor_toset); |
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| 218 | + rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, |
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| 219 | + "Set HW_VAR_AMPDU_FACTOR: %#x\n", |
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| 220 | + factor_toset); |
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243 | 221 | } |
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244 | 222 | break; |
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245 | 223 | } |
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.. | .. |
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258 | 236 | union aci_aifsn *p_aci_aifsn = (union aci_aifsn *)(&( |
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259 | 237 | mac->ac[0].aifs)); |
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260 | 238 | u8 acm = p_aci_aifsn->f.acm; |
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261 | | - u8 acm_ctrl = rtl_read_byte(rtlpriv, AcmHwCtrl); |
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| 239 | + u8 acm_ctrl = rtl_read_byte(rtlpriv, ACMHWCTRL); |
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262 | 240 | |
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263 | 241 | acm_ctrl = acm_ctrl | ((rtlpci->acm_method == 2) ? |
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264 | 242 | 0x0 : 0x1); |
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.. | .. |
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266 | 244 | if (acm) { |
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267 | 245 | switch (e_aci) { |
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268 | 246 | case AC0_BE: |
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269 | | - acm_ctrl |= AcmHw_BeqEn; |
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| 247 | + acm_ctrl |= ACMHW_BEQEN; |
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270 | 248 | break; |
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271 | 249 | case AC2_VI: |
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272 | | - acm_ctrl |= AcmHw_ViqEn; |
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| 250 | + acm_ctrl |= ACMHW_VIQEN; |
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273 | 251 | break; |
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274 | 252 | case AC3_VO: |
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275 | | - acm_ctrl |= AcmHw_VoqEn; |
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| 253 | + acm_ctrl |= ACMHW_VOQEN; |
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276 | 254 | break; |
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277 | 255 | default: |
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278 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
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279 | | - "HW_VAR_ACM_CTRL acm set failed: eACI is %d\n", |
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280 | | - acm); |
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| 256 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, |
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| 257 | + "HW_VAR_ACM_CTRL acm set failed: eACI is %d\n", |
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| 258 | + acm); |
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281 | 259 | break; |
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282 | 260 | } |
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283 | 261 | } else { |
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284 | 262 | switch (e_aci) { |
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285 | 263 | case AC0_BE: |
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286 | | - acm_ctrl &= (~AcmHw_BeqEn); |
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| 264 | + acm_ctrl &= (~ACMHW_BEQEN); |
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287 | 265 | break; |
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288 | 266 | case AC2_VI: |
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289 | | - acm_ctrl &= (~AcmHw_ViqEn); |
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| 267 | + acm_ctrl &= (~ACMHW_VIQEN); |
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290 | 268 | break; |
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291 | 269 | case AC3_VO: |
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292 | | - acm_ctrl &= (~AcmHw_VoqEn); |
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| 270 | + acm_ctrl &= (~ACMHW_VOQEN); |
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293 | 271 | break; |
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294 | 272 | default: |
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295 | 273 | pr_err("switch case %#x not processed\n", |
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.. | .. |
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298 | 276 | } |
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299 | 277 | } |
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300 | 278 | |
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301 | | - RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE, |
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302 | | - "HW_VAR_ACM_CTRL Write 0x%X\n", acm_ctrl); |
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303 | | - rtl_write_byte(rtlpriv, AcmHwCtrl, acm_ctrl); |
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| 279 | + rtl_dbg(rtlpriv, COMP_QOS, DBG_TRACE, |
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| 280 | + "HW_VAR_ACM_CTRL Write 0x%X\n", acm_ctrl); |
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| 281 | + rtl_write_byte(rtlpriv, ACMHWCTRL, acm_ctrl); |
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304 | 282 | break; |
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305 | 283 | } |
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306 | 284 | case HW_VAR_RCR:{ |
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.. | .. |
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439 | 417 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
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440 | 418 | u8 sec_reg_value = 0x0; |
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441 | 419 | |
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442 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
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443 | | - "PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n", |
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444 | | - rtlpriv->sec.pairwise_enc_algorithm, |
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445 | | - rtlpriv->sec.group_enc_algorithm); |
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| 420 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, |
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| 421 | + "PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n", |
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| 422 | + rtlpriv->sec.pairwise_enc_algorithm, |
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| 423 | + rtlpriv->sec.group_enc_algorithm); |
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446 | 424 | |
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447 | 425 | if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) { |
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448 | | - RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, |
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449 | | - "not open hw encryption\n"); |
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| 426 | + rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, |
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| 427 | + "not open hw encryption\n"); |
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450 | 428 | return; |
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451 | 429 | } |
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452 | 430 | |
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.. | .. |
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457 | 435 | sec_reg_value |= SCR_RXUSEDK; |
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458 | 436 | } |
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459 | 437 | |
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460 | | - RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, "The SECR-value %x\n", |
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461 | | - sec_reg_value); |
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| 438 | + rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD, "The SECR-value %x\n", |
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| 439 | + sec_reg_value); |
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462 | 440 | |
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463 | 441 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value); |
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464 | 442 | |
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.. | .. |
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869 | 847 | /* 10. Power Save Control Register (Offset: 0x0260 - 0x02DF) */ |
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870 | 848 | /* 11. General Purpose Register (Offset: 0x02E0 - 0x02FF) */ |
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871 | 849 | /* 12. Host Interrupt Status Register (Offset: 0x0300 - 0x030F) */ |
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872 | | - /* 13. Test Mode and Debug Control Register (Offset: 0x0310 - 0x034F) */ |
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| 850 | + /* 13. Test mode and Debug Control Register (Offset: 0x0310 - 0x034F) */ |
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873 | 851 | |
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874 | 852 | /* 14. Set driver info, we only accept PHY status now. */ |
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875 | 853 | rtl_write_byte(rtlpriv, RXDRVINFO_SZ, 4); |
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.. | .. |
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892 | 870 | |
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893 | 871 | /* Change Program timing */ |
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894 | 872 | rtl_write_byte(rtlpriv, REG_EFUSE_CTRL + 3, 0x72); |
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895 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "EFUSE CONFIG OK\n"); |
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| 873 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "EFUSE CONFIG OK\n"); |
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896 | 874 | } |
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897 | 875 | |
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898 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "OK\n"); |
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| 876 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "OK\n"); |
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899 | 877 | |
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900 | 878 | } |
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901 | 879 | |
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.. | .. |
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982 | 960 | /* 2. download firmware */ |
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983 | 961 | rtstatus = rtl92s_download_fw(hw); |
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984 | 962 | if (!rtstatus) { |
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985 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
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986 | | - "Failed to download FW. Init HW without FW now... " |
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987 | | - "Please copy FW into /lib/firmware/rtlwifi\n"); |
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| 963 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, |
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| 964 | + "Failed to download FW. Init HW without FW now... Please copy FW into /lib/firmware/rtlwifi\n"); |
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988 | 965 | err = 1; |
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989 | 966 | goto exit; |
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990 | 967 | } |
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.. | .. |
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1036 | 1013 | rtl_write_byte(rtlpriv, RF_CTRL, 0x07); |
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1037 | 1014 | |
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1038 | 1015 | if (!rtl92s_phy_rf_config(hw)) { |
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1039 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "RF Config failed\n"); |
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| 1016 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "RF Config failed\n"); |
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1040 | 1017 | err = rtstatus; |
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1041 | 1018 | goto exit; |
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1042 | 1019 | } |
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.. | .. |
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1169 | 1146 | switch (type) { |
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1170 | 1147 | case NL80211_IFTYPE_UNSPECIFIED: |
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1171 | 1148 | bt_msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT); |
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1172 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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1173 | | - "Set Network type to NO LINK!\n"); |
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| 1149 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 1150 | + "Set Network type to NO LINK!\n"); |
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1174 | 1151 | break; |
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1175 | 1152 | case NL80211_IFTYPE_ADHOC: |
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1176 | 1153 | bt_msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT); |
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1177 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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1178 | | - "Set Network type to Ad Hoc!\n"); |
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| 1154 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 1155 | + "Set Network type to Ad Hoc!\n"); |
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1179 | 1156 | break; |
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1180 | 1157 | case NL80211_IFTYPE_STATION: |
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1181 | 1158 | bt_msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT); |
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1182 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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1183 | | - "Set Network type to STA!\n"); |
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| 1159 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 1160 | + "Set Network type to STA!\n"); |
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1184 | 1161 | break; |
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1185 | 1162 | case NL80211_IFTYPE_AP: |
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1186 | 1163 | bt_msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT); |
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1187 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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1188 | | - "Set Network type to AP!\n"); |
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| 1164 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 1165 | + "Set Network type to AP!\n"); |
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1189 | 1166 | break; |
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1190 | 1167 | default: |
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1191 | 1168 | pr_err("Network type %d not supported!\n", type); |
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.. | .. |
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1374 | 1351 | /* SW/HW radio off or halt adapter!! For example S3/S4 */ |
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1375 | 1352 | } else { |
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1376 | 1353 | /* LED function disable. Power range is about 8mA now. */ |
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1377 | | - /* if write 0xF1 disconnet_pci power |
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| 1354 | + /* if write 0xF1 disconnect_pci power |
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1378 | 1355 | * ifconfig wlan0 down power are both high 35:70 */ |
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1379 | | - /* if write oxF9 disconnet_pci power |
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| 1356 | + /* if write oxF9 disconnect_pci power |
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1380 | 1357 | * ifconfig wlan0 down power are both low 12:45*/ |
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1381 | 1358 | rtl_write_byte(rtlpriv, 0x03, 0xF9); |
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1382 | 1359 | } |
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.. | .. |
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1628 | 1605 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
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1629 | 1606 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); |
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1630 | 1607 | |
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1631 | | - RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n", |
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1632 | | - add_msr, rm_msr); |
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| 1608 | + rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n", |
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| 1609 | + add_msr, rm_msr); |
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1633 | 1610 | |
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1634 | 1611 | if (add_msr) |
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1635 | 1612 | rtlpci->irq_mask[0] |= add_msr; |
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.. | .. |
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1641 | 1618 | rtl92se_enable_interrupt(hw); |
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1642 | 1619 | } |
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1643 | 1620 | |
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1644 | | -static void _rtl8192se_get_IC_Inferiority(struct ieee80211_hw *hw) |
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| 1621 | +static void _rtl8192se_get_ic_inferiority(struct ieee80211_hw *hw) |
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1645 | 1622 | { |
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1646 | 1623 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); |
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1647 | 1624 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
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.. | .. |
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1693 | 1670 | |
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1694 | 1671 | eeprom_id = *((u16 *)&hwinfo[0]); |
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1695 | 1672 | if (eeprom_id != RTL8190_EEPROM_ID) { |
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1696 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
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1697 | | - "EEPROM ID(%#x) is invalid!!\n", eeprom_id); |
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| 1673 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, |
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| 1674 | + "EEPROM ID(%#x) is invalid!!\n", eeprom_id); |
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1698 | 1675 | rtlefuse->autoload_failflag = true; |
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1699 | 1676 | } else { |
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1700 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); |
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| 1677 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); |
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1701 | 1678 | rtlefuse->autoload_failflag = false; |
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1702 | 1679 | } |
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1703 | 1680 | |
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1704 | 1681 | if (rtlefuse->autoload_failflag) |
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1705 | 1682 | return; |
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1706 | 1683 | |
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1707 | | - _rtl8192se_get_IC_Inferiority(hw); |
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| 1684 | + _rtl8192se_get_ic_inferiority(hw); |
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1708 | 1685 | |
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1709 | 1686 | /* Read IC Version && Channel Plan */ |
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1710 | 1687 | /* VID, DID SE 0xA-D */ |
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.. | .. |
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1714 | 1691 | rtlefuse->eeprom_smid = *(u16 *)&hwinfo[EEPROM_SMID]; |
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1715 | 1692 | rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; |
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1716 | 1693 | |
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1717 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
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1718 | | - "EEPROMId = 0x%4x\n", eeprom_id); |
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1719 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
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1720 | | - "EEPROM VID = 0x%4x\n", rtlefuse->eeprom_vid); |
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1721 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
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1722 | | - "EEPROM DID = 0x%4x\n", rtlefuse->eeprom_did); |
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1723 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
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1724 | | - "EEPROM SVID = 0x%4x\n", rtlefuse->eeprom_svid); |
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1725 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
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1726 | | - "EEPROM SMID = 0x%4x\n", rtlefuse->eeprom_smid); |
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| 1694 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, |
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| 1695 | + "EEPROMId = 0x%4x\n", eeprom_id); |
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| 1696 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, |
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| 1697 | + "EEPROM VID = 0x%4x\n", rtlefuse->eeprom_vid); |
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| 1698 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, |
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| 1699 | + "EEPROM DID = 0x%4x\n", rtlefuse->eeprom_did); |
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| 1700 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, |
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| 1701 | + "EEPROM SVID = 0x%4x\n", rtlefuse->eeprom_svid); |
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| 1702 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, |
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| 1703 | + "EEPROM SMID = 0x%4x\n", rtlefuse->eeprom_smid); |
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1727 | 1704 | |
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1728 | 1705 | for (i = 0; i < 6; i += 2) { |
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1729 | 1706 | usvalue = *(u16 *)&hwinfo[EEPROM_MAC_ADDR + i]; |
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.. | .. |
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1733 | 1710 | for (i = 0; i < 6; i++) |
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1734 | 1711 | rtl_write_byte(rtlpriv, MACIDR0 + i, rtlefuse->dev_addr[i]); |
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1735 | 1712 | |
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1736 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr); |
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| 1713 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr); |
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1737 | 1714 | |
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1738 | 1715 | /* Get Tx Power Level by Channel */ |
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1739 | 1716 | /* Read Tx power of Channel 1 ~ 14 from EEPROM. */ |
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.. | .. |
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1928 | 1905 | * index diff of legacy to HT OFDM rate. */ |
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1929 | 1906 | tempval = hwinfo[EEPROM_RFIND_POWERDIFF] & 0xff; |
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1930 | 1907 | rtlefuse->eeprom_txpowerdiff = tempval; |
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1931 | | - rtlefuse->legacy_httxpowerdiff = |
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| 1908 | + rtlefuse->legacy_ht_txpowerdiff = |
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1932 | 1909 | rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][0]; |
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1933 | 1910 | |
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1934 | 1911 | RTPRINT(rtlpriv, FINIT, INIT_TXPOWER, |
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.. | .. |
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1986 | 1963 | tempval = rtl_read_byte(rtlpriv, 0x07); |
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1987 | 1964 | if (!(tempval & BIT(0))) { |
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1988 | 1965 | rtlefuse->b1x1_recvcombine = true; |
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1989 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
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1990 | | - "RF_TYPE=1T2R but only 1SS\n"); |
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| 1966 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, |
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| 1967 | + "RF_TYPE=1T2R but only 1SS\n"); |
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1991 | 1968 | } |
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1992 | 1969 | } |
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1993 | 1970 | rtlefuse->b1ss_support = rtlefuse->b1x1_recvcombine; |
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1994 | 1971 | rtlefuse->eeprom_oemid = *&hwinfo[EEPROM_CUSTOMID]; |
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1995 | 1972 | |
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1996 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM Customer ID: 0x%2x\n", |
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1997 | | - rtlefuse->eeprom_oemid); |
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| 1973 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "EEPROM Customer ID: 0x%2x\n", |
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| 1974 | + rtlefuse->eeprom_oemid); |
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1998 | 1975 | |
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1999 | 1976 | /* set channel paln to world wide 13 */ |
---|
2000 | 1977 | rtlefuse->channel_plan = COUNTRY_CODE_WORLD_WIDE_13; |
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.. | .. |
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2009 | 1986 | tmp_u1b = rtl_read_byte(rtlpriv, EPROM_CMD); |
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2010 | 1987 | |
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2011 | 1988 | if (tmp_u1b & BIT(4)) { |
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2012 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n"); |
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| 1989 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n"); |
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2013 | 1990 | rtlefuse->epromtype = EEPROM_93C46; |
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2014 | 1991 | } else { |
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2015 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n"); |
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| 1992 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n"); |
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2016 | 1993 | rtlefuse->epromtype = EEPROM_BOOT_EFUSE; |
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2017 | 1994 | } |
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2018 | 1995 | |
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2019 | 1996 | if (tmp_u1b & BIT(5)) { |
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2020 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); |
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| 1997 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n"); |
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2021 | 1998 | rtlefuse->autoload_failflag = false; |
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2022 | 1999 | _rtl92se_read_adapter_info(hw); |
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2023 | 2000 | } else { |
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.. | .. |
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2123 | 2100 | else |
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2124 | 2101 | rtl92s_phy_set_fw_cmd(hw, FW_CMD_RA_REFRESH_BG); |
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2125 | 2102 | |
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2126 | | - RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n", |
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2127 | | - rtl_read_dword(rtlpriv, ARFR0)); |
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| 2103 | + rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n", |
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| 2104 | + rtl_read_dword(rtlpriv, ARFR0)); |
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2128 | 2105 | } |
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2129 | 2106 | |
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2130 | 2107 | static void rtl92se_update_hal_rate_mask(struct ieee80211_hw *hw, |
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.. | .. |
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2278 | 2255 | |
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2279 | 2256 | mask |= (bmulticast ? 1 : 0) << 9 | (macid & 0x1f) << 4 | (band & 0xf); |
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2280 | 2257 | |
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2281 | | - RT_TRACE(rtlpriv, COMP_RATR, DBG_TRACE, "mask = %x, bitmap = %x\n", |
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2282 | | - mask, ratr_bitmap); |
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| 2258 | + rtl_dbg(rtlpriv, COMP_RATR, DBG_TRACE, "mask = %x, bitmap = %x\n", |
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| 2259 | + mask, ratr_bitmap); |
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2283 | 2260 | rtl_write_dword(rtlpriv, 0x2c4, ratr_bitmap); |
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2284 | 2261 | rtl_write_dword(rtlpriv, WFM5, (FW_RA_UPDATE_MASK | (mask << 8))); |
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2285 | 2262 | |
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.. | .. |
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2354 | 2331 | rfpwr_toset = _rtl92se_rf_onoff_detect(hw); |
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2355 | 2332 | |
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2356 | 2333 | if ((ppsc->hwradiooff) && (rfpwr_toset == ERFON)) { |
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2357 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
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2358 | | - "RFKILL-HW Radio ON, RF ON\n"); |
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| 2334 | + rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG, |
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| 2335 | + "RFKILL-HW Radio ON, RF ON\n"); |
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2359 | 2336 | |
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2360 | 2337 | rfpwr_toset = ERFON; |
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2361 | 2338 | ppsc->hwradiooff = false; |
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2362 | 2339 | actuallyset = true; |
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2363 | 2340 | } else if ((!ppsc->hwradiooff) && (rfpwr_toset == ERFOFF)) { |
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2364 | | - RT_TRACE(rtlpriv, COMP_RF, |
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2365 | | - DBG_DMESG, "RFKILL-HW Radio OFF, RF OFF\n"); |
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| 2341 | + rtl_dbg(rtlpriv, COMP_RF, |
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| 2342 | + DBG_DMESG, "RFKILL-HW Radio OFF, RF OFF\n"); |
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2366 | 2343 | |
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2367 | 2344 | rfpwr_toset = ERFOFF; |
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2368 | 2345 | ppsc->hwradiooff = true; |
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.. | .. |
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2426 | 2403 | u8 cam_offset = 0; |
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2427 | 2404 | u8 clear_number = 5; |
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2428 | 2405 | |
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2429 | | - RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n"); |
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| 2406 | + rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n"); |
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2430 | 2407 | |
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2431 | 2408 | for (idx = 0; idx < clear_number; idx++) { |
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2432 | 2409 | rtl_cam_mark_invalid(hw, cam_offset + idx); |
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.. | .. |
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2485 | 2462 | } |
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2486 | 2463 | |
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2487 | 2464 | if (rtlpriv->sec.key_len[key_index] == 0) { |
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2488 | | - RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, |
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2489 | | - "delete one entry, entry_id is %d\n", |
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2490 | | - entry_id); |
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| 2465 | + rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, |
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| 2466 | + "delete one entry, entry_id is %d\n", |
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| 2467 | + entry_id); |
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2491 | 2468 | if (mac->opmode == NL80211_IFTYPE_AP) |
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2492 | 2469 | rtl_cam_del_entry(hw, p_macaddr); |
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2493 | 2470 | rtl_cam_delete_one_entry(hw, p_macaddr, entry_id); |
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2494 | 2471 | } else { |
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2495 | | - RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, |
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2496 | | - "add one entry\n"); |
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| 2472 | + rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, |
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| 2473 | + "add one entry\n"); |
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2497 | 2474 | if (is_pairwise) { |
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2498 | | - RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, |
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2499 | | - "set Pairwise key\n"); |
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| 2475 | + rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, |
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| 2476 | + "set Pairwise key\n"); |
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2500 | 2477 | |
---|
2501 | 2478 | rtl_cam_add_one_entry(hw, macaddr, key_index, |
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2502 | 2479 | entry_id, enc_algo, |
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2503 | 2480 | CAM_CONFIG_NO_USEDK, |
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2504 | 2481 | rtlpriv->sec.key_buf[key_index]); |
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2505 | 2482 | } else { |
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2506 | | - RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, |
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2507 | | - "set group key\n"); |
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| 2483 | + rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, |
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| 2484 | + "set group key\n"); |
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2508 | 2485 | |
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2509 | 2486 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
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2510 | 2487 | rtl_cam_add_one_entry(hw, |
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