add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/dm.c
..
..
@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2012  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2012  Realtek Corporation.*/
25
3
 
26
4
 #include "../wifi.h"
27
5
 #include "../base.h"
..
..
@@ -50,8 +28,8 @@
50
28
 
51
29
 	if ((mac->link_state < MAC80211_LINKED) &&
52
30
 	    (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) {
53
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
54
-			 "Not connected to any\n");
31
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE,
32
+			"Not connected to any\n");
55
33
 
56
34
 		rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
57
35
 
..
..
@@ -62,43 +40,43 @@
62
40
 	if (mac->link_state >= MAC80211_LINKED) {
63
41
 		if (mac->opmode == NL80211_IFTYPE_ADHOC) {
64
42
 			undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
65
-			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
66
-				 "AP Client PWDB = 0x%lx\n",
67
-				 undec_sm_pwdb);
43
+			rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
44
+				"AP Client PWDB = 0x%lx\n",
45
+				undec_sm_pwdb);
68
46
 		} else {
69
47
 			undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
70
-			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
71
-				 "STA Default Port PWDB = 0x%lx\n",
72
-				 undec_sm_pwdb);
48
+			rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
49
+				"STA Default Port PWDB = 0x%lx\n",
50
+				undec_sm_pwdb);
73
51
 		}
74
52
 	} else {
75
53
 		undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
76
54
 
77
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
78
-			 "AP Ext Port PWDB = 0x%lx\n",
79
-			 undec_sm_pwdb);
55
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
56
+			"AP Ext Port PWDB = 0x%lx\n",
57
+			undec_sm_pwdb);
80
58
 	}
81
59
 
82
60
 	if (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
83
61
 		rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
84
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
85
-			 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
62
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
63
+			"TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
86
64
 	} else if ((undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
87
65
 		   (undec_sm_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
88
66
 
89
67
 		rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1;
90
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
91
-			 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
68
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
69
+			"TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
92
70
 	} else if (undec_sm_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
93
71
 		rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
94
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
95
-			 "TXHIGHPWRLEVEL_NORMAL\n");
72
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
73
+			"TXHIGHPWRLEVEL_NORMAL\n");
96
74
 	}
97
75
 
98
76
 	if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
99
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
100
-			 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
101
-			 rtlphy->current_channel);
77
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
78
+			"PHY_SetTxPowerLevel8192S() Channel = %d\n",
79
+			rtlphy->current_channel);
102
80
 		rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel);
103
81
 	}
104
82