hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_uio.c
....@@ -16,7 +16,6 @@
1616 #include <linux/interrupt.h>
1717 #include <linux/ip.h>
1818 #include <linux/tcp.h>
19
-#include <linux/skbuff.h>
2019 #include <linux/ethtool.h>
2120 #include <linux/if_ether.h>
2221 #include <linux/crc32.h>
....@@ -45,14 +44,14 @@
4544
4645 #define DRIVER_NAME "rockchip_gmac_uio_drv"
4746 #define DRIVER_VERSION "0.1"
48
-#define STMMAC_ALIGN(x) ALIGN(ALIGN(x, SMP_CACHE_BYTES), 16)
4947
5048 #define TC_DEFAULT 64
51
-#define DEFAULT_BUFSIZE 1536
52
-#define STMMAC_RX_COPYBREAK 256
53
-
54
-static int buf_sz = DEFAULT_BUFSIZE;
5549 static int tc = TC_DEFAULT;
50
+
51
+#define DEFAULT_BUFSIZE 1536
52
+static int buf_sz = DEFAULT_BUFSIZE;
53
+
54
+#define STMMAC_RX_COPYBREAK 256
5655
5756 /**
5857 * rockchip_gmac_uio_pdev_info
....@@ -120,11 +119,11 @@
120119
121120 /* Free DMA regions of consistent memory previously allocated */
122121 if (!priv->extend_desc)
123
- dma_free_coherent(priv->device,
124
- DMA_RX_SIZE * sizeof(struct dma_desc),
122
+ dma_free_coherent(priv->device, priv->dma_rx_size *
123
+ sizeof(struct dma_desc),
125124 rx_q->dma_rx, rx_q->dma_rx_phy);
126125 else
127
- dma_free_coherent(priv->device, DMA_RX_SIZE *
126
+ dma_free_coherent(priv->device, priv->dma_rx_size *
128127 sizeof(struct dma_extended_desc),
129128 rx_q->dma_erx, rx_q->dma_rx_phy);
130129 }
....@@ -142,16 +141,23 @@
142141 /* Free TX queue resources */
143142 for (queue = 0; queue < tx_count; queue++) {
144143 struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
144
+ size_t size;
145
+ void *addr;
145146
146
- /* Free DMA regions of consistent memory previously allocated */
147
- if (!priv->extend_desc)
148
- dma_free_coherent(priv->device,
149
- DMA_TX_SIZE * sizeof(struct dma_desc),
150
- tx_q->dma_tx, tx_q->dma_tx_phy);
151
- else
152
- dma_free_coherent(priv->device, DMA_TX_SIZE *
153
- sizeof(struct dma_extended_desc),
154
- tx_q->dma_etx, tx_q->dma_tx_phy);
147
+ if (priv->extend_desc) {
148
+ size = sizeof(struct dma_extended_desc);
149
+ addr = tx_q->dma_etx;
150
+ } else if (tx_q->tbs & STMMAC_TBS_AVAIL) {
151
+ size = sizeof(struct dma_edesc);
152
+ addr = tx_q->dma_entx;
153
+ } else {
154
+ size = sizeof(struct dma_desc);
155
+ addr = tx_q->dma_tx;
156
+ }
157
+
158
+ size *= priv->dma_tx_size;
159
+
160
+ dma_free_coherent(priv->device, size, addr, tx_q->dma_tx_phy);
155161 }
156162 }
157163
....@@ -173,26 +179,20 @@
173179 for (queue = 0; queue < rx_count; queue++) {
174180 struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
175181
176
- rx_q->queue_index = queue;
177
- rx_q->priv_data = priv;
178
-
179182 if (priv->extend_desc) {
180
- rx_q->dma_erx = dma_zalloc_coherent(priv->device,
181
- DMA_RX_SIZE *
182
- sizeof(struct
183
- dma_extended_desc),
184
- &rx_q->dma_rx_phy,
185
- GFP_KERNEL);
186
- if (!rx_q->dma_erx)
187
- goto err_dma;
188
-
189
- } else {
190
- rx_q->dma_rx = dma_zalloc_coherent(priv->device,
191
- DMA_RX_SIZE *
192
- sizeof(struct
193
- dma_desc),
183
+ rx_q->dma_erx = dma_alloc_coherent(priv->device,
184
+ priv->dma_rx_size *
185
+ sizeof(struct dma_extended_desc),
194186 &rx_q->dma_rx_phy,
195187 GFP_KERNEL);
188
+ if (!rx_q->dma_erx)
189
+ goto err_dma;
190
+ } else {
191
+ rx_q->dma_rx = dma_alloc_coherent(priv->device,
192
+ priv->dma_rx_size *
193
+ sizeof(struct dma_desc),
194
+ &rx_q->dma_rx_phy,
195
+ GFP_KERNEL);
196196 if (!rx_q->dma_rx)
197197 goto err_dma;
198198 }
....@@ -223,36 +223,38 @@
223223 /* TX queues buffers and DMA */
224224 for (queue = 0; queue < tx_count; queue++) {
225225 struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
226
+ size_t size;
227
+ void *addr;
226228
227229 tx_q->queue_index = queue;
228230 tx_q->priv_data = priv;
229231
230
- if (priv->extend_desc) {
231
- tx_q->dma_etx = dma_zalloc_coherent(priv->device,
232
- DMA_TX_SIZE *
233
- sizeof(struct
234
- dma_extended_desc),
235
- &tx_q->dma_tx_phy,
236
- GFP_KERNEL);
237
- if (!tx_q->dma_etx)
238
- goto err_dma;
239
- } else {
240
- tx_q->dma_tx = dma_zalloc_coherent(priv->device,
241
- DMA_TX_SIZE *
242
- sizeof(struct
243
- dma_desc),
244
- &tx_q->dma_tx_phy,
245
- GFP_KERNEL);
246
- if (!tx_q->dma_tx)
247
- goto err_dma;
248
- }
232
+ if (priv->extend_desc)
233
+ size = sizeof(struct dma_extended_desc);
234
+ else if (tx_q->tbs & STMMAC_TBS_AVAIL)
235
+ size = sizeof(struct dma_edesc);
236
+ else
237
+ size = sizeof(struct dma_desc);
238
+
239
+ size *= priv->dma_tx_size;
240
+
241
+ addr = dma_alloc_coherent(priv->device, size,
242
+ &tx_q->dma_tx_phy, GFP_KERNEL);
243
+ if (!addr)
244
+ goto err_dma;
245
+
246
+ if (priv->extend_desc)
247
+ tx_q->dma_etx = addr;
248
+ else if (tx_q->tbs & STMMAC_TBS_AVAIL)
249
+ tx_q->dma_entx = addr;
250
+ else
251
+ tx_q->dma_tx = addr;
249252 }
250253
251254 return 0;
252255
253256 err_dma:
254257 uio_free_dma_tx_desc_resources(priv);
255
-
256258 return ret;
257259 }
258260
....@@ -291,121 +293,6 @@
291293 }
292294
293295 /**
294
- * uio_hw_fix_mac_speed - callback for speed selection
295
- * @priv: driver private structure
296
- * Description: on some platforms (e.g. ST), some HW system configuration
297
- * registers have to be set according to the link speed negotiated.
298
- */
299
-static inline void uio_hw_fix_mac_speed(struct stmmac_priv *priv)
300
-{
301
- struct net_device *ndev = priv->dev;
302
- struct phy_device *phydev = ndev->phydev;
303
-
304
- if (likely(priv->plat->fix_mac_speed))
305
- priv->plat->fix_mac_speed(priv->plat->bsp_priv, phydev->speed);
306
-}
307
-
308
-/**
309
- * uio_mac_flow_ctrl - Configure flow control in all queues
310
- * @priv: driver private structure
311
- * Description: It is used for configuring the flow control in all queues
312
- */
313
-static void uio_mac_flow_ctrl(struct stmmac_priv *priv, u32 duplex)
314
-{
315
- u32 tx_cnt = priv->plat->tx_queues_to_use;
316
-
317
- stmmac_flow_ctrl(priv, priv->hw, duplex, priv->flow_ctrl,
318
- priv->pause, tx_cnt);
319
-}
320
-
321
-/**
322
- * uio_adjust_link - adjusts the link parameters
323
- * @dev: net device structure
324
- * Description: this is the helper called by the physical abstraction layer
325
- * drivers to communicate the phy link status. According the speed and duplex
326
- * this driver can invoke registered glue-logic as well.
327
- * It also invoke the eee initialization because it could happen when switch
328
- * on different networks (that are eee capable).
329
- */
330
-static void uio_adjust_link(struct net_device *dev)
331
-{
332
- struct stmmac_priv *priv = netdev_priv(dev);
333
- struct phy_device *phydev = dev->phydev;
334
- bool new_state = false;
335
-
336
- if (!phydev)
337
- return;
338
-
339
- mutex_lock(&priv->lock);
340
-
341
- if (phydev->link) {
342
- u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
343
-
344
- /* Now we make sure that we can be in full duplex mode.
345
- * If not, we operate in half-duplex mode.
346
- */
347
- if (phydev->duplex != priv->oldduplex) {
348
- new_state = true;
349
- if (!phydev->duplex)
350
- ctrl &= ~priv->hw->link.duplex;
351
- else
352
- ctrl |= priv->hw->link.duplex;
353
- priv->oldduplex = phydev->duplex;
354
- }
355
- /* Flow Control operation */
356
- if (phydev->pause)
357
- uio_mac_flow_ctrl(priv, phydev->duplex);
358
-
359
- if (phydev->speed != priv->speed) {
360
- new_state = true;
361
- ctrl &= ~priv->hw->link.speed_mask;
362
- switch (phydev->speed) {
363
- case SPEED_1000:
364
- ctrl |= priv->hw->link.speed1000;
365
- break;
366
- case SPEED_100:
367
- ctrl |= priv->hw->link.speed100;
368
- break;
369
- case SPEED_10:
370
- ctrl |= priv->hw->link.speed10;
371
- break;
372
- default:
373
- netif_warn(priv, link, priv->dev,
374
- "broken speed: %d\n", phydev->speed);
375
- phydev->speed = SPEED_UNKNOWN;
376
- break;
377
- }
378
- if (phydev->speed != SPEED_UNKNOWN)
379
- uio_hw_fix_mac_speed(priv);
380
- priv->speed = phydev->speed;
381
- }
382
-
383
- writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
384
-
385
- if (!priv->oldlink) {
386
- new_state = true;
387
- priv->oldlink = true;
388
- }
389
- } else if (priv->oldlink) {
390
- new_state = true;
391
- priv->oldlink = false;
392
- priv->speed = SPEED_UNKNOWN;
393
- priv->oldduplex = DUPLEX_UNKNOWN;
394
- }
395
-
396
- if (new_state && netif_msg_link(priv))
397
- phy_print_status(phydev);
398
-
399
- mutex_unlock(&priv->lock);
400
-
401
- if (phydev->is_pseudo_fixed_link)
402
- /* Stop PHY layer to call the hook to adjust the link in case
403
- * of a switch is attached to the stmmac driver.
404
- */
405
- phydev->irq = PHY_IGNORE_INTERRUPT;
406
-}
407
-
408
-/**
409296 * rockchip_gmac_uio_init_phy - PHY initialization
410297 * @dev: net device structure
411298 * Description: it initializes the driver's PHY state, and attaches the PHY
....@@ -416,82 +303,38 @@
416303 static int rockchip_gmac_uio_init_phy(struct net_device *dev)
417304 {
418305 struct stmmac_priv *priv = netdev_priv(dev);
419
- u32 tx_cnt = priv->plat->tx_queues_to_use;
420
- struct phy_device *phydev;
421
- char phy_id_fmt[MII_BUS_ID_SIZE + 3];
422
- char bus_id[MII_BUS_ID_SIZE];
423
- int interface = priv->plat->interface;
424
- int max_speed = priv->plat->max_speed;
306
+ struct device_node *node;
307
+ int ret;
425308
426
- priv->oldlink = false;
427
- priv->speed = SPEED_UNKNOWN;
428
- priv->oldduplex = DUPLEX_UNKNOWN;
309
+ node = priv->plat->phylink_node;
429310
430
- if (priv->plat->integrated_phy_power)
431
- priv->plat->integrated_phy_power(priv->plat->bsp_priv, true);
311
+ if (node)
312
+ ret = phylink_of_phy_connect(priv->phylink, node, 0);
432313
433
- if (priv->mii)
434
- stmmac_mdio_reset(priv->mii);
314
+ /* Some DT bindings do not set-up the PHY handle. Let's try to
315
+ * manually parse it
316
+ */
317
+ if (!node || ret) {
318
+ int addr = priv->plat->phy_addr;
319
+ struct phy_device *phydev;
435320
436
- if (priv->plat->phy_node) {
437
- phydev = of_phy_connect(dev, priv->plat->phy_node,
438
- &uio_adjust_link, 0, interface);
439
- } else {
440
- snprintf(bus_id, MII_BUS_ID_SIZE, "stmmac-%x",
441
- priv->plat->bus_id);
442
-
443
- snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
444
- priv->plat->phy_addr);
445
- netdev_dbg(priv->dev, "%s: trying to attach to %s\n", __func__,
446
- phy_id_fmt);
447
-
448
- phydev = phy_connect(dev, phy_id_fmt, &uio_adjust_link,
449
- interface);
450
- }
451
-
452
- if (IS_ERR_OR_NULL(phydev)) {
453
- netdev_err(priv->dev, "Could not attach to PHY\n");
454
- if (!phydev)
321
+ phydev = mdiobus_get_phy(priv->mii, addr);
322
+ if (!phydev) {
323
+ netdev_err(priv->dev, "no phy at addr %d\n", addr);
455324 return -ENODEV;
325
+ }
456326
457
- return PTR_ERR(phydev);
327
+ ret = phylink_connect_phy(priv->phylink, phydev);
458328 }
459329
460
- /* Stop Advertising 1000BASE Capability if interface is not GMII */
461
- if (interface == PHY_INTERFACE_MODE_MII ||
462
- interface == PHY_INTERFACE_MODE_RMII ||
463
- (max_speed < 1000 && max_speed > 0))
464
- phydev->advertising &= ~(SUPPORTED_1000baseT_Half |
465
- SUPPORTED_1000baseT_Full);
330
+ if (!priv->plat->pmt) {
331
+ struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
466332
467
- /* Half-duplex mode not supported with multiqueue
468
- * half-duplex can only works with single queue
469
- */
470
- if (tx_cnt > 1)
471
- phydev->supported &= ~(SUPPORTED_1000baseT_Half |
472
- SUPPORTED_100baseT_Half |
473
- SUPPORTED_10baseT_Half);
474
-
475
- /* Broken HW is sometimes missing the pull-up resistor on the
476
- * MDIO line, which results in reads to non-existent devices returning
477
- * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
478
- * device as well.
479
- * Note: phydev->phy_id is the result of reading the UID PHY registers.
480
- */
481
- if (!priv->plat->phy_node && phydev->phy_id == 0) {
482
- phy_disconnect(phydev);
483
- return -ENODEV;
333
+ phylink_ethtool_get_wol(priv->phylink, &wol);
334
+ device_set_wakeup_capable(priv->device, !!wol.supported);
484335 }
485336
486
- /* uio_adjust_link will change this to PHY_IGNORE_INTERRUPT to avoid
487
- * subsequent PHY polling, make sure we force a link transition if
488
- * we have a UP/DOWN/UP transition
489
- */
490
- if (phydev->is_pseudo_fixed_link)
491
- phydev->irq = PHY_POLL;
492
-
493
- phy_attached_info(phydev);
494
- return 0;
337
+ return ret;
495338 }
496339
497340 /**
....@@ -545,7 +388,8 @@
545388 rx_q->dma_rx_phy, chan);
546389
547390 rx_q->rx_tail_addr = rx_q->dma_rx_phy +
548
- (DMA_RX_SIZE * sizeof(struct dma_desc));
391
+ (priv->dma_rx_size *
392
+ sizeof(struct dma_desc));
549393 stmmac_set_rx_tail_ptr(priv, priv->ioaddr,
550394 rx_q->rx_tail_addr, chan);
551395 }
....@@ -574,12 +418,12 @@
574418 /* set TX ring length */
575419 for (chan = 0; chan < tx_channels_count; chan++)
576420 stmmac_set_tx_ring_len(priv, priv->ioaddr,
577
- (DMA_TX_SIZE - 1), chan);
421
+ (priv->dma_tx_size - 1), chan);
578422
579423 /* set RX ring length */
580424 for (chan = 0; chan < rx_channels_count; chan++)
581425 stmmac_set_rx_ring_len(priv, priv->ioaddr,
582
- (DMA_RX_SIZE - 1), chan);
426
+ (priv->dma_rx_size - 1), chan);
583427 }
584428
585429 /**
....@@ -617,11 +461,11 @@
617461 continue;
618462
619463 stmmac_config_cbs(priv, priv->hw,
620
- priv->plat->tx_queues_cfg[queue].send_slope,
621
- priv->plat->tx_queues_cfg[queue].idle_slope,
622
- priv->plat->tx_queues_cfg[queue].high_credit,
623
- priv->plat->tx_queues_cfg[queue].low_credit,
624
- queue);
464
+ priv->plat->tx_queues_cfg[queue].send_slope,
465
+ priv->plat->tx_queues_cfg[queue].idle_slope,
466
+ priv->plat->tx_queues_cfg[queue].high_credit,
467
+ priv->plat->tx_queues_cfg[queue].low_credit,
468
+ queue);
625469 }
626470 }
627471
....@@ -703,6 +547,22 @@
703547 }
704548 }
705549
550
+static void uio_mac_config_rss(struct stmmac_priv *priv)
551
+{
552
+ if (!priv->dma_cap.rssen || !priv->plat->rss_en) {
553
+ priv->rss.enable = false;
554
+ return;
555
+ }
556
+
557
+ if (priv->dev->features & NETIF_F_RXHASH)
558
+ priv->rss.enable = true;
559
+ else
560
+ priv->rss.enable = false;
561
+
562
+ stmmac_rss_configure(priv, priv->hw, &priv->rss,
563
+ priv->plat->rx_queues_to_use);
564
+}
565
+
706566 /**
707567 * uio_mac_enable_rx_queues - Enable MAC rx queues
708568 * @priv: driver private structure
....@@ -764,14 +624,17 @@
764624 /* Set RX routing */
765625 if (rx_queues_count > 1)
766626 uio_mac_config_rx_queues_routing(priv);
627
+
628
+ /* Receive Side Scaling */
629
+ if (rx_queues_count > 1)
630
+ uio_mac_config_rss(priv);
767631 }
768632
769633 static void uio_safety_feat_configuration(struct stmmac_priv *priv)
770634 {
771635 if (priv->dma_cap.asp) {
772636 netdev_info(priv->dev, "Enabling Safety Features\n");
773
- stmmac_safety_feat_config(priv, priv->ioaddr,
774
- priv->dma_cap.asp);
637
+ stmmac_safety_feat_config(priv, priv->ioaddr, priv->dma_cap.asp);
775638 } else {
776639 netdev_info(priv->dev, "No Safety Features support found\n");
777640 }
....@@ -840,26 +703,6 @@
840703 }
841704
842705 /**
843
- * rockchip_gmac_uio_mmc_setup: setup the Mac Management Counters (MMC)
844
- * @priv: driver private structure
845
- * Description: this masks the MMC irq, in fact, the counters are managed in SW.
846
- */
847
-static void rockchip_gmac_uio_mmc_setup(struct stmmac_priv *priv)
848
-{
849
- unsigned int mode = MMC_CNTRL_RESET_ON_READ | MMC_CNTRL_COUNTER_RESET |
850
- MMC_CNTRL_PRESET | MMC_CNTRL_FULL_HALF_PRESET;
851
-
852
- dwmac_mmc_intr_all_mask(priv->mmcaddr);
853
-
854
- if (priv->dma_cap.rmon) {
855
- dwmac_mmc_ctrl(priv->mmcaddr, mode);
856
- memset(&priv->mmc, 0, sizeof(struct stmmac_counters));
857
- } else {
858
- netdev_info(priv->dev, "No MAC Management Counters available\n");
859
- }
860
-}
861
-
862
-/**
863706 * rockchip_gmac_uio_hw_setup - setup mac in a usable state.
864707 * @dev : pointer to the device structure.
865708 * @init_ptp: initialize PTP if set
....@@ -923,13 +766,29 @@
923766 /* Set the HW DMA mode and the COE */
924767 uio_dma_operation_mode(priv);
925768
926
- rockchip_gmac_uio_mmc_setup(priv);
927
-
928769 if (priv->hw->pcs)
929770 stmmac_pcs_ctrl_ane(priv, priv->hw, 1, priv->hw->ps, 0);
930771
931772 /* set TX and RX rings length */
932773 uio_set_rings_length(priv);
774
+
775
+ return 0;
776
+}
777
+
778
+static int uio_set_bfsize(int mtu, int bufsize)
779
+{
780
+ int ret = bufsize;
781
+
782
+ if (mtu >= BUF_SIZE_8KiB)
783
+ ret = BUF_SIZE_16KiB;
784
+ else if (mtu >= BUF_SIZE_4KiB)
785
+ ret = BUF_SIZE_8KiB;
786
+ else if (mtu >= BUF_SIZE_2KiB)
787
+ ret = BUF_SIZE_4KiB;
788
+ else if (mtu > DEFAULT_BUFSIZE)
789
+ ret = BUF_SIZE_2KiB;
790
+ else
791
+ ret = DEFAULT_BUFSIZE;
933792
934793 return ret;
935794 }
....@@ -946,11 +805,12 @@
946805 static int uio_open(struct net_device *dev)
947806 {
948807 struct stmmac_priv *priv = netdev_priv(dev);
808
+ int bfsize = 0;
949809 int ret;
950810
951
- if (priv->hw->pcs != STMMAC_PCS_RGMII &&
952
- priv->hw->pcs != STMMAC_PCS_TBI &&
953
- priv->hw->pcs != STMMAC_PCS_RTBI) {
811
+ if (priv->hw->pcs != STMMAC_PCS_TBI &&
812
+ priv->hw->pcs != STMMAC_PCS_RTBI &&
813
+ !priv->hw->xpcs) {
954814 ret = rockchip_gmac_uio_init_phy(dev);
955815 if (ret) {
956816 netdev_err(priv->dev,
....@@ -961,11 +821,24 @@
961821 }
962822
963823 /* Extra statistics */
964
- memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
965824 priv->xstats.threshold = tc;
966825
967
- priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
826
+ bfsize = stmmac_set_16kib_bfsize(priv, dev->mtu);
827
+ if (bfsize < 0)
828
+ bfsize = 0;
829
+
830
+ if (bfsize < BUF_SIZE_16KiB)
831
+ bfsize = uio_set_bfsize(dev->mtu, priv->dma_buf_sz);
832
+
833
+ priv->dma_buf_sz = bfsize;
834
+ buf_sz = bfsize;
835
+
968836 priv->rx_copybreak = STMMAC_RX_COPYBREAK;
837
+
838
+ if (!priv->dma_tx_size)
839
+ priv->dma_tx_size = DMA_DEFAULT_TX_SIZE;
840
+ if (!priv->dma_rx_size)
841
+ priv->dma_rx_size = DMA_DEFAULT_RX_SIZE;
969842
970843 ret = uio_alloc_dma_desc_resources(priv);
971844 if (ret < 0) {
....@@ -980,16 +853,16 @@
980853 goto init_error;
981854 }
982855
983
- if (dev->phydev)
984
- phy_start(dev->phydev);
856
+ phylink_start(priv->phylink);
857
+ /* We may have called phylink_speed_down before */
858
+ phylink_speed_up(priv->phylink);
985859
986860 return 0;
987861
988862 init_error:
989863 uio_free_dma_desc_resources(priv);
990864 dma_desc_error:
991
- if (dev->phydev)
992
- phy_disconnect(dev->phydev);
865
+ phylink_disconnect_phy(priv->phylink);
993866 return ret;
994867 }
995868
....@@ -1091,12 +964,12 @@
1091964
1092965 uio->mem[1].name = "eth_rx_bd";
1093966 uio->mem[1].addr = priv->rx_queue[0].dma_rx_phy;
1094
- uio->mem[1].size = DMA_RX_SIZE * sizeof(struct dma_desc);
967
+ uio->mem[1].size = priv->dma_rx_size * sizeof(struct dma_desc);
1095968 uio->mem[1].memtype = UIO_MEM_PHYS;
1096969
1097970 uio->mem[2].name = "eth_tx_bd";
1098971 uio->mem[2].addr = priv->tx_queue[0].dma_tx_phy;
1099
- uio->mem[2].size = DMA_TX_SIZE * sizeof(struct dma_desc);
972
+ uio->mem[2].size = priv->dma_tx_size * sizeof(struct dma_desc);
1100973 uio->mem[2].memtype = UIO_MEM_PHYS;
1101974
1102975 uio->open = rockchip_gmac_uio_open;
....@@ -1148,7 +1021,7 @@
11481021
11491022 if (netdev) {
11501023 rtnl_lock();
1151
- dev_open(netdev);
1024
+ dev_open(netdev, NULL);
11521025 rtnl_unlock();
11531026 }
11541027
....@@ -1175,4 +1048,3 @@
11751048 MODULE_LICENSE("GPL");
11761049 MODULE_AUTHOR("ROCKCHIP");
11771050 MODULE_DESCRIPTION("ROCKCHIP GMAC UIO Driver");
1178
-