add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/net/ethernet/stmicro/stmmac/dwmac5.h
..
..
@@ -1,4 +1,4 @@
1
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
1
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2
2
 // Copyright (c) 2017 Synopsys, Inc. and/or its affiliates.
3
3
 // stmmac Support for 5.xx Ethernet QoS cores
4
4
 
..
..
@@ -10,6 +10,9 @@
10
10
 #define MAC_FSM_CONTROL			0x00000148
11
11
 #define PRTYEN				BIT(1)
12
12
 #define TMOUTEN				BIT(0)
13
+
14
+#define MAC_FPE_CTRL_STS		0x00000234
15
+#define EFPE				BIT(0)
13
16
 
14
17
 #define MAC_PPS_CONTROL			0x00000b70
15
18
 #define PPS_MAXIDX(x)			((((x) + 1) * 8) - 1)
..
..
@@ -29,6 +32,23 @@
29
32
 #define TTSL0				GENMASK(30, 0)
30
33
 #define MAC_PPSx_INTERVAL(x)		(0x00000b88 + ((x) * 0x10))
31
34
 #define MAC_PPSx_WIDTH(x)		(0x00000b8c + ((x) * 0x10))
35
+
36
+#define MTL_EST_CONTROL			0x00000c50
37
+#define PTOV				GENMASK(31, 24)
38
+#define PTOV_SHIFT			24
39
+#define SSWL				BIT(1)
40
+#define EEST				BIT(0)
41
+#define MTL_EST_GCL_CONTROL		0x00000c80
42
+#define BTR_LOW				0x0
43
+#define BTR_HIGH			0x1
44
+#define CTR_LOW				0x2
45
+#define CTR_HIGH			0x3
46
+#define TER				0x4
47
+#define LLR				0x5
48
+#define ADDR_SHIFT			8
49
+#define GCRR				BIT(2)
50
+#define SRWO				BIT(0)
51
+#define MTL_EST_GCL_DATA		0x00000c84
32
52
 
33
53
 #define MTL_RXP_CONTROL_STATUS		0x00000ca0
34
54
 #define RXPI				BIT(31)
..
..
@@ -72,6 +92,12 @@
72
92
 #define TCEIE				BIT(0)
73
93
 #define DMA_ECC_INT_STATUS		0x00001088
74
94
 
95
+/* EQoS version 5.xx VLAN Tag Filter Fail Packets Queuing */
96
+#define GMAC_RXQ_CTRL4			0x00000094
97
+#define GMAC_RXQCTRL_VFFQ_MASK		GENMASK(19, 17)
98
+#define GMAC_RXQCTRL_VFFQ_SHIFT		17
99
+#define GMAC_RXQCTRL_VFFQE		BIT(16)
100
+
75
101
 int dwmac5_safety_feat_config(void __iomem *ioaddr, unsigned int asp);
76
102
 int dwmac5_safety_feat_irq_status(struct net_device *ndev,
77
103
 		void __iomem *ioaddr, unsigned int asp,
..
..
@@ -83,5 +109,9 @@
83
109
 int dwmac5_flex_pps_config(void __iomem *ioaddr, int index,
84
110
 			   struct stmmac_pps_cfg *cfg, bool enable,
85
111
 			   u32 sub_second_inc, u32 systime_flags);
112
+int dwmac5_est_configure(void __iomem *ioaddr, struct stmmac_est *cfg,
113
+			 unsigned int ptp_rate);
114
+void dwmac5_fpe_configure(void __iomem *ioaddr, u32 num_txq, u32 num_rxq,
115
+			  bool enable);
86
116
 
87
117
 #endif /* __DWMAC5_H__ */