~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,18 +1,21 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/****************************************************************************
2	3	* Driver for Solarflare network controllers and boards
3	4	* Copyright 2012-2013 Solarflare Communications Inc.
4		- *
5		- * This program is free software; you can redistribute it and/or modify it
6		- * under the terms of the GNU General Public License version 2 as published
7		- * by the Free Software Foundation, incorporated herein by reference.
8	5	*/
9	6
10	7	#include "net_driver.h"
	8	+#include "rx_common.h"
	9	+#include "tx_common.h"
11	10	#include "ef10_regs.h"
12	11	#include "io.h"
13	12	#include "mcdi.h"
14	13	#include "mcdi_pcol.h"
	14	+#include "mcdi_port.h"
	15	+#include "mcdi_port_common.h"
	16	+#include "mcdi_functions.h"
15	17	#include "nic.h"
	18	+#include "mcdi_filters.h"
16	19	#include "workarounds.h"
17	20	#include "selftest.h"
18	21	#include "ef10_sriov.h"
..	..	@@ -20,6 +23,7 @@
20	23	#include <linux/jhash.h>
21	24	#include <linux/wait.h>
22	25	#include <linux/workqueue.h>
	26	+#include <net/udp_tunnel.h>
23	27
24	28	/* Hardware control for EF10 architecture including 'Huntington'. */
25	29
..	..	@@ -28,28 +32,6 @@
28	32	EFX_EF10_TEST = 1,
29	33	EFX_EF10_REFILL,
30	34	};
31		-/* The maximum size of a shared RSS context */
32		-/* TODO: this should really be from the mcdi protocol export */
33		-#define EFX_EF10_MAX_SHARED_RSS_CONTEXT_SIZE 64UL
34		-
35		-/* The filter table(s) are managed by firmware and we have write-only
36		- * access. When removing filters we must identify them to the
37		- * firmware by a 64-bit handle, but this is too wide for Linux kernel
38		- * interfaces (32-bit for RX NFC, 16-bit for RFS). Also, we need to
39		- * be able to tell in advance whether a requested insertion will
40		- * replace an existing filter. Therefore we maintain a software hash
41		- * table, which should be at least as large as the hardware hash
42		- * table.
43		- *
44		- * Huntington has a single 8K filter table shared between all filter
45		- * types and both ports.
46		- */
47		-#define HUNT_FILTER_TBL_ROWS 8192
48		-
49		-#define EFX_EF10_FILTER_ID_INVALID 0xffff
50		-
51		-#define EFX_EF10_FILTER_DEV_UC_MAX 32
52		-#define EFX_EF10_FILTER_DEV_MC_MAX 256
53	35
54	36	/* VLAN list entry */
55	37	struct efx_ef10_vlan {
..	..	@@ -57,94 +39,8 @@
57	39	u16 vid;
58	40	};
59	41
60		-enum efx_ef10_default_filters {
61		- EFX_EF10_BCAST,
62		- EFX_EF10_UCDEF,
63		- EFX_EF10_MCDEF,
64		- EFX_EF10_VXLAN4_UCDEF,
65		- EFX_EF10_VXLAN4_MCDEF,
66		- EFX_EF10_VXLAN6_UCDEF,
67		- EFX_EF10_VXLAN6_MCDEF,
68		- EFX_EF10_NVGRE4_UCDEF,
69		- EFX_EF10_NVGRE4_MCDEF,
70		- EFX_EF10_NVGRE6_UCDEF,
71		- EFX_EF10_NVGRE6_MCDEF,
72		- EFX_EF10_GENEVE4_UCDEF,
73		- EFX_EF10_GENEVE4_MCDEF,
74		- EFX_EF10_GENEVE6_UCDEF,
75		- EFX_EF10_GENEVE6_MCDEF,
76		-
77		- EFX_EF10_NUM_DEFAULT_FILTERS
78		-};
79		-
80		-/* Per-VLAN filters information */
81		-struct efx_ef10_filter_vlan {
82		- struct list_head list;
83		- u16 vid;
84		- u16 uc[EFX_EF10_FILTER_DEV_UC_MAX];
85		- u16 mc[EFX_EF10_FILTER_DEV_MC_MAX];
86		- u16 default_filters[EFX_EF10_NUM_DEFAULT_FILTERS];
87		-};
88		-
89		-struct efx_ef10_dev_addr {
90		- u8 addr[ETH_ALEN];
91		-};
92		-
93		-struct efx_ef10_filter_table {
94		-/* The MCDI match masks supported by this fw & hw, in order of priority */
95		- u32 rx_match_mcdi_flags[
96		- MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MAXNUM * 2];
97		- unsigned int rx_match_count;
98		-
99		- struct rw_semaphore lock; /* Protects entries */
100		- struct {
101		- unsigned long spec; /* pointer to spec plus flag bits */
102		-/* AUTO_OLD is used to mark and sweep MAC filters for the device address lists. */
103		-/* unused flag 1UL */
104		-#define EFX_EF10_FILTER_FLAG_AUTO_OLD 2UL
105		-#define EFX_EF10_FILTER_FLAGS 3UL
106		- u64 handle; /* firmware handle */
107		- } *entry;
108		-/* Shadow of net_device address lists, guarded by mac_lock */
109		- struct efx_ef10_dev_addr dev_uc_list[EFX_EF10_FILTER_DEV_UC_MAX];
110		- struct efx_ef10_dev_addr dev_mc_list[EFX_EF10_FILTER_DEV_MC_MAX];
111		- int dev_uc_count;
112		- int dev_mc_count;
113		- bool uc_promisc;
114		- bool mc_promisc;
115		-/* Whether in multicast promiscuous mode when last changed */
116		- bool mc_promisc_last;
117		- bool mc_overflow; /* Too many MC addrs; should always imply mc_promisc */
118		- bool vlan_filter;
119		- struct list_head vlan_list;
120		-};
121		-
122		-/* An arbitrary search limit for the software hash table */
123		-#define EFX_EF10_FILTER_SEARCH_LIMIT 200
124		-
125		-static void efx_ef10_rx_free_indir_table(struct efx_nic *efx);
126		-static void efx_ef10_filter_table_remove(struct efx_nic *efx);
127		-static int efx_ef10_filter_add_vlan(struct efx_nic *efx, u16 vid);
128		-static void efx_ef10_filter_del_vlan_internal(struct efx_nic *efx,
129		- struct efx_ef10_filter_vlan *vlan);
130		-static void efx_ef10_filter_del_vlan(struct efx_nic *efx, u16 vid);
131	42	static int efx_ef10_set_udp_tnl_ports(struct efx_nic *efx, bool unloading);
132		-
133		-static u32 efx_ef10_filter_get_unsafe_id(u32 filter_id)
134		-{
135		- WARN_ON_ONCE(filter_id == EFX_EF10_FILTER_ID_INVALID);
136		- return filter_id & (HUNT_FILTER_TBL_ROWS - 1);
137		-}
138		-
139		-static unsigned int efx_ef10_filter_get_unsafe_pri(u32 filter_id)
140		-{
141		- return filter_id / (HUNT_FILTER_TBL_ROWS * 2);
142		-}
143		-
144		-static u32 efx_ef10_make_filter_id(unsigned int pri, u16 idx)
145		-{
146		- return pri * HUNT_FILTER_TBL_ROWS * 2 + idx;
147		-}
	43	+static const struct udp_tunnel_nic_info efx_ef10_udp_tunnels;
148	44
149	45	static int efx_ef10_get_warm_boot_count(struct efx_nic *efx)
150	46	{
..	..	@@ -186,24 +82,6 @@
186	82	static bool efx_ef10_is_vf(struct efx_nic *efx)
187	83	{
188	84	return efx->type->is_vf;
189		-}
190		-
191		-static int efx_ef10_get_pf_index(struct efx_nic *efx)
192		-{
193		- MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_FUNCTION_INFO_OUT_LEN);
194		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
195		- size_t outlen;
196		- int rc;
197		-
198		- rc = efx_mcdi_rpc(efx, MC_CMD_GET_FUNCTION_INFO, NULL, 0, outbuf,
199		- sizeof(outbuf), &outlen);
200		- if (rc)
201		- return rc;
202		- if (outlen < sizeof(outbuf))
203		- return -EIO;
204		-
205		- nic_data->pf_index = MCDI_DWORD(outbuf, GET_FUNCTION_INFO_OUT_PF);
206		- return 0;
207	85	}
208	86
209	87	#ifdef CONFIG_SFC_SRIOV
..	..	@@ -276,24 +154,9 @@
276	154	u8 vi_window_mode = MCDI_BYTE(outbuf,
277	155	GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE);
278	156
279		- switch (vi_window_mode) {
280		- case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_8K:
281		- efx->vi_stride = 8192;
282		- break;
283		- case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_16K:
284		- efx->vi_stride = 16384;
285		- break;
286		- case MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_64K:
287		- efx->vi_stride = 65536;
288		- break;
289		- default:
290		- netif_err(efx, probe, efx->net_dev,
291		- "Unrecognised VI window mode %d\n",
292		- vi_window_mode);
293		- return -EIO;
294		- }
295		- netif_dbg(efx, probe, efx->net_dev, "vi_stride = %u\n",
296		- efx->vi_stride);
	157	+ rc = efx_mcdi_window_mode_to_stride(efx, vi_window_mode);
	158	+ if (rc)
	159	+ return rc;
297	160	} else {
298	161	/* keep default VI stride */
299	162	netif_dbg(efx, probe, efx->net_dev,
..	..	@@ -511,7 +374,7 @@
511	374	struct device_attribute *attr,
512	375	char *buf)
513	376	{
514		- struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
	377	+ struct efx_nic *efx = dev_get_drvdata(dev);
515	378
516	379	return sprintf(buf, "%d\n",
517	380	((efx->mcdi->fn_flags) &
..	..	@@ -523,7 +386,7 @@
523	386	struct device_attribute *attr,
524	387	char *buf)
525	388	{
526		- struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
	389	+ struct efx_nic *efx = dev_get_drvdata(dev);
527	390
528	391	return sprintf(buf, "%d\n",
529	392	((efx->mcdi->fn_flags) &
..	..	@@ -579,7 +442,7 @@
579	442	if (efx->filter_state) {
580	443	mutex_lock(&efx->mac_lock);
581	444	down_write(&efx->filter_sem);
582		- rc = efx_ef10_filter_add_vlan(efx, vlan->vid);
	445	+ rc = efx_mcdi_filter_add_vlan(efx, vlan->vid);
583	446	up_write(&efx->filter_sem);
584	447	mutex_unlock(&efx->mac_lock);
585	448	if (rc)
..	..	@@ -608,7 +471,7 @@
608	471
609	472	if (efx->filter_state) {
610	473	down_write(&efx->filter_sem);
611		- efx_ef10_filter_del_vlan(efx, vlan->vid);
	474	+ efx_mcdi_filter_del_vlan(efx, vlan->vid);
612	475	up_write(&efx->filter_sem);
613	476	}
614	477
..	..	@@ -692,10 +555,6 @@
692	555	}
693	556	nic_data->warm_boot_count = rc;
694	557
695		- efx->rss_context.context_id = EFX_EF10_RSS_CONTEXT_INVALID;
696		-
697		- nic_data->vport_id = EVB_PORT_ID_ASSIGNED;
698		-
699	558	/* In case we're recovering from a crash (kexec), we want to
700	559	* cancel any outstanding request by the previous user of this
701	560	* function. We send a special message using the least
..	..	@@ -708,6 +567,9 @@
708	567	goto fail2;
709	568
710	569	mutex_init(&nic_data->udp_tunnels_lock);
	570	+ for (i = 0; i < ARRAY_SIZE(nic_data->udp_tunnels); ++i)
	571	+ nic_data->udp_tunnels[i].type =
	572	+ TUNNEL_ENCAP_UDP_PORT_ENTRY_INVALID;
711	573
712	574	/* Reset (most) configuration for this function */
713	575	rc = efx_mcdi_reset(efx, RESET_TYPE_ALL);
..	..	@@ -728,7 +590,7 @@
728	590	if (rc)
729	591	goto fail4;
730	592
731		- rc = efx_ef10_get_pf_index(efx);
	593	+ rc = efx_get_pf_index(efx, &nic_data->pf_index);
732	594	if (rc)
733	595	goto fail5;
734	596
..	..	@@ -739,13 +601,22 @@
739	601	efx_ef10_read_licensed_features(efx);
740	602
741	603	/* We can have one VI for each vi_stride-byte region.
742		- * However, until we use TX option descriptors we need two TX queues
743		- * per channel.
	604	+ * However, until we use TX option descriptors we need up to four
	605	+ * TX queues per channel for different checksumming combinations.
744	606	*/
745		- efx->max_channels = min_t(unsigned int,
746		- EFX_MAX_CHANNELS,
747		- efx_ef10_mem_map_size(efx) /
748		- (efx->vi_stride * EFX_TXQ_TYPES));
	607	+ if (nic_data->datapath_caps &
	608	+ (1 << MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN))
	609	+ efx->tx_queues_per_channel = 4;
	610	+ else
	611	+ efx->tx_queues_per_channel = 2;
	612	+ efx->max_vis = efx_ef10_mem_map_size(efx) / efx->vi_stride;
	613	+ if (!efx->max_vis) {
	614	+ netif_err(efx, drv, efx->net_dev, "error determining max VIs\n");
	615	+ rc = -EIO;
	616	+ goto fail5;
	617	+ }
	618	+ efx->max_channels = min_t(unsigned int, EFX_MAX_CHANNELS,
	619	+ efx->max_vis / efx->tx_queues_per_channel);
749	620	efx->max_tx_channels = efx->max_channels;
750	621	if (WARN_ON(efx->max_channels == 0)) {
751	622	rc = -EIO;
..	..	@@ -804,6 +675,12 @@
804	675	if (rc)
805	676	goto fail_add_vid_0;
806	677
	678	+ if (nic_data->datapath_caps &
	679	+ (1 << MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN) &&
	680	+ efx->mcdi->fn_flags &
	681	+ (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED))
	682	+ efx->net_dev->udp_tunnel_nic_info = &efx_ef10_udp_tunnels;
	683	+
807	684	return 0;
808	685
809	686	fail_add_vid_0:
..	..	@@ -831,22 +708,6 @@
831	708	fail1:
832	709	kfree(nic_data);
833	710	efx->nic_data = NULL;
834		- return rc;
835		-}
836		-
837		-static int efx_ef10_free_vis(struct efx_nic *efx)
838		-{
839		- MCDI_DECLARE_BUF_ERR(outbuf);
840		- size_t outlen;
841		- int rc = efx_mcdi_rpc_quiet(efx, MC_CMD_FREE_VIS, NULL, 0,
842		- outbuf, sizeof(outbuf), &outlen);
843		-
844		- /* -EALREADY means nothing to free, so ignore */
845		- if (rc == -EALREADY)
846		- rc = 0;
847		- if (rc)
848		- efx_mcdi_display_error(efx, MC_CMD_FREE_VIS, 0, outbuf, outlen,
849		- rc);
850	711	return rc;
851	712	}
852	713
..	..	@@ -949,8 +810,10 @@
949	810	/* Extra channels, even those with TXQs (PTP), do not require
950	811	* PIO resources.
951	812	*/
952		- if (!channel->type->want_pio)
	813	+ if (!channel->type->want_pio \|\|
	814	+ channel->channel >= efx->xdp_channel_offset)
953	815	continue;
	816	+
954	817	efx_for_each_channel_tx_queue(tx_queue, channel) {
955	818	/* We assign the PIO buffers to queues in
956	819	* reverse order to allow for the following
..	..	@@ -1085,12 +948,12 @@
1085	948
1086	949	efx_mcdi_mon_remove(efx);
1087	950
1088		- efx_ef10_rx_free_indir_table(efx);
	951	+ efx_mcdi_rx_free_indir_table(efx);
1089	952
1090	953	if (nic_data->wc_membase)
1091	954	iounmap(nic_data->wc_membase);
1092	955
1093		- rc = efx_ef10_free_vis(efx);
	956	+ rc = efx_mcdi_free_vis(efx);
1094	957	WARN_ON(rc != 0);
1095	958
1096	959	if (!nic_data->must_restore_piobufs)
..	..	@@ -1261,28 +1124,10 @@
1261	1124	static int efx_ef10_alloc_vis(struct efx_nic *efx,
1262	1125	unsigned int min_vis, unsigned int max_vis)
1263	1126	{
1264		- MCDI_DECLARE_BUF(inbuf, MC_CMD_ALLOC_VIS_IN_LEN);
1265		- MCDI_DECLARE_BUF(outbuf, MC_CMD_ALLOC_VIS_OUT_LEN);
1266	1127	struct efx_ef10_nic_data *nic_data = efx->nic_data;
1267		- size_t outlen;
1268		- int rc;
1269	1128
1270		- MCDI_SET_DWORD(inbuf, ALLOC_VIS_IN_MIN_VI_COUNT, min_vis);
1271		- MCDI_SET_DWORD(inbuf, ALLOC_VIS_IN_MAX_VI_COUNT, max_vis);
1272		- rc = efx_mcdi_rpc(efx, MC_CMD_ALLOC_VIS, inbuf, sizeof(inbuf),
1273		- outbuf, sizeof(outbuf), &outlen);
1274		- if (rc != 0)
1275		- return rc;
1276		-
1277		- if (outlen < MC_CMD_ALLOC_VIS_OUT_LEN)
1278		- return -EIO;
1279		-
1280		- netif_dbg(efx, drv, efx->net_dev, "base VI is A0x%03x\n",
1281		- MCDI_DWORD(outbuf, ALLOC_VIS_OUT_VI_BASE));
1282		-
1283		- nic_data->vi_base = MCDI_DWORD(outbuf, ALLOC_VIS_OUT_VI_BASE);
1284		- nic_data->n_allocated_vis = MCDI_DWORD(outbuf, ALLOC_VIS_OUT_VI_COUNT);
1285		- return 0;
	1129	+ return efx_mcdi_alloc_vis(efx, min_vis, max_vis, &nic_data->vi_base,
	1130	+ &nic_data->n_allocated_vis);
1286	1131	}
1287	1132
1288	1133	/* Note that the failure path of this function does not free
..	..	@@ -1290,17 +1135,24 @@
1290	1135	*/
1291	1136	static int efx_ef10_dimension_resources(struct efx_nic *efx)
1292	1137	{
	1138	+ unsigned int min_vis = max_t(unsigned int, efx->tx_queues_per_channel,
	1139	+ efx_separate_tx_channels ? 2 : 1);
	1140	+ unsigned int channel_vis, pio_write_vi_base, max_vis;
1293	1141	struct efx_ef10_nic_data *nic_data = efx->nic_data;
1294	1142	unsigned int uc_mem_map_size, wc_mem_map_size;
1295		- unsigned int min_vis = max(EFX_TXQ_TYPES,
1296		- efx_separate_tx_channels ? 2 : 1);
1297		- unsigned int channel_vis, pio_write_vi_base, max_vis;
1298	1143	void __iomem *membase;
1299	1144	int rc;
1300	1145
1301	1146	channel_vis = max(efx->n_channels,
1302		- (efx->n_tx_channels + efx->n_extra_tx_channels) *
1303		- EFX_TXQ_TYPES);
	1147	+ ((efx->n_tx_channels + efx->n_extra_tx_channels) *
	1148	+ efx->tx_queues_per_channel) +
	1149	+ efx->n_xdp_channels * efx->xdp_tx_per_channel);
	1150	+ if (efx->max_vis && efx->max_vis < channel_vis) {
	1151	+ netif_dbg(efx, drv, efx->net_dev,
	1152	+ "Reducing channel VIs from %u to %u\n",
	1153	+ channel_vis, efx->max_vis);
	1154	+ channel_vis = efx->max_vis;
	1155	+ }
1304	1156
1305	1157	#ifdef EFX_USE_PIO
1306	1158	/* Try to allocate PIO buffers if wanted and if the full
..	..	@@ -1363,7 +1215,7 @@
1363	1215	}
1364	1216
1365	1217	/* In case the last attached driver failed to free VIs, do it now */
1366		- rc = efx_ef10_free_vis(efx);
	1218	+ rc = efx_mcdi_free_vis(efx);
1367	1219	if (rc != 0)
1368	1220	return rc;
1369	1221
..	..	@@ -1382,9 +1234,9 @@
1382	1234	*/
1383	1235	efx->max_channels = nic_data->n_allocated_vis;
1384	1236	efx->max_tx_channels =
1385		- nic_data->n_allocated_vis / EFX_TXQ_TYPES;
	1237	+ nic_data->n_allocated_vis / efx->tx_queues_per_channel;
1386	1238
1387		- efx_ef10_free_vis(efx);
	1239	+ efx_mcdi_free_vis(efx);
1388	1240	return -EAGAIN;
1389	1241	}
1390	1242
..	..	@@ -1401,7 +1253,7 @@
1401	1253	}
1402	1254
1403	1255	/* Shrink the original UC mapping of the memory BAR */
1404		- membase = ioremap_nocache(efx->membase_phys, uc_mem_map_size);
	1256	+ membase = ioremap(efx->membase_phys, uc_mem_map_size);
1405	1257	if (!membase) {
1406	1258	netif_err(efx, probe, efx->net_dev,
1407	1259	"could not shrink memory BAR to %x\n",
..	..	@@ -1441,9 +1293,21 @@
1441	1293	return 0;
1442	1294	}
1443	1295
	1296	+static void efx_ef10_fini_nic(struct efx_nic *efx)
	1297	+{
	1298	+ struct efx_ef10_nic_data *nic_data = efx->nic_data;
	1299	+
	1300	+ spin_lock_bh(&efx->stats_lock);
	1301	+ kfree(nic_data->mc_stats);
	1302	+ nic_data->mc_stats = NULL;
	1303	+ spin_unlock_bh(&efx->stats_lock);
	1304	+}
	1305	+
1444	1306	static int efx_ef10_init_nic(struct efx_nic *efx)
1445	1307	{
1446	1308	struct efx_ef10_nic_data *nic_data = efx->nic_data;
	1309	+ struct net_device *net_dev = efx->net_dev;
	1310	+ netdev_features_t tun_feats, tso_feats;
1447	1311	int rc;
1448	1312
1449	1313	if (nic_data->must_check_datapath_caps) {
..	..	@@ -1453,14 +1317,19 @@
1453	1317	nic_data->must_check_datapath_caps = false;
1454	1318	}
1455	1319
1456		- if (nic_data->must_realloc_vis) {
	1320	+ if (efx->must_realloc_vis) {
1457	1321	/* We cannot let the number of VIs change now */
1458	1322	rc = efx_ef10_alloc_vis(efx, nic_data->n_allocated_vis,
1459	1323	nic_data->n_allocated_vis);
1460	1324	if (rc)
1461	1325	return rc;
1462		- nic_data->must_realloc_vis = false;
	1326	+ efx->must_realloc_vis = false;
1463	1327	}
	1328	+
	1329	+ nic_data->mc_stats = kmalloc(efx->num_mac_stats * sizeof(__le64),
	1330	+ GFP_KERNEL);
	1331	+ if (!nic_data->mc_stats)
	1332	+ return -ENOMEM;
1464	1333
1465	1334	if (nic_data->must_restore_piobufs && nic_data->n_piobufs) {
1466	1335	rc = efx_ef10_alloc_piobufs(efx, nic_data->n_piobufs);
..	..	@@ -1483,6 +1352,31 @@
1483	1352	nic_data->must_restore_piobufs = false;
1484	1353	}
1485	1354
	1355	+ /* encap features might change during reset if fw variant changed */
	1356	+ if (efx_has_cap(efx, VXLAN_NVGRE) && !efx_ef10_is_vf(efx))
	1357	+ net_dev->hw_enc_features \|= NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM;
	1358	+ else
	1359	+ net_dev->hw_enc_features &= ~(NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM);
	1360	+
	1361	+ tun_feats = NETIF_F_GSO_UDP_TUNNEL \| NETIF_F_GSO_GRE \|
	1362	+ NETIF_F_GSO_UDP_TUNNEL_CSUM \| NETIF_F_GSO_GRE_CSUM;
	1363	+ tso_feats = NETIF_F_TSO \| NETIF_F_TSO6;
	1364	+
	1365	+ if (efx_has_cap(efx, TX_TSO_V2_ENCAP)) {
	1366	+ /* If this is first nic_init, or if it is a reset and a new fw
	1367	+ * variant has added new features, enable them by default.
	1368	+ * If the features are not new, maintain their current value.
	1369	+ */
	1370	+ if (!(net_dev->hw_features & tun_feats))
	1371	+ net_dev->features \|= tun_feats;
	1372	+ net_dev->hw_enc_features \|= tun_feats \| tso_feats;
	1373	+ net_dev->hw_features \|= tun_feats;
	1374	+ } else {
	1375	+ net_dev->hw_enc_features &= ~(tun_feats \| tso_feats);
	1376	+ net_dev->hw_features &= ~tun_feats;
	1377	+ net_dev->features &= ~tun_feats;
	1378	+ }
	1379	+
1486	1380	/* don't fail init if RSS setup doesn't work */
1487	1381	rc = efx->type->rx_push_rss_config(efx, false,
1488	1382	efx->rss_context.rx_indir_table, NULL);
..	..	@@ -1490,7 +1384,7 @@
1490	1384	return 0;
1491	1385	}
1492	1386
1493		-static void efx_ef10_reset_mc_allocations(struct efx_nic *efx)
	1387	+static void efx_ef10_table_reset_mc_allocations(struct efx_nic *efx)
1494	1388	{
1495	1389	struct efx_ef10_nic_data *nic_data = efx->nic_data;
1496	1390	#ifdef CONFIG_SFC_SRIOV
..	..	@@ -1498,16 +1392,15 @@
1498	1392	#endif
1499	1393
1500	1394	/* All our allocations have been reset */
1501		- nic_data->must_realloc_vis = true;
1502		- nic_data->must_restore_rss_contexts = true;
1503		- nic_data->must_restore_filters = true;
	1395	+ efx->must_realloc_vis = true;
	1396	+ efx_mcdi_filter_table_reset_mc_allocations(efx);
1504	1397	nic_data->must_restore_piobufs = true;
1505	1398	efx_ef10_forget_old_piobufs(efx);
1506		- efx->rss_context.context_id = EFX_EF10_RSS_CONTEXT_INVALID;
	1399	+ efx->rss_context.context_id = EFX_MCDI_RSS_CONTEXT_INVALID;
1507	1400
1508	1401	/* Driver-created vswitches and vports must be re-created */
1509	1402	nic_data->must_probe_vswitching = true;
1510		- nic_data->vport_id = EVB_PORT_ID_ASSIGNED;
	1403	+ efx->vport_id = EVB_PORT_ID_ASSIGNED;
1511	1404	#ifdef CONFIG_SFC_SRIOV
1512	1405	if (nic_data->vf)
1513	1406	for (i = 0; i < efx->vf_count; i++)
..	..	@@ -1571,7 +1464,7 @@
1571	1464	*/
1572	1465	if ((reset_type == RESET_TYPE_ALL \|\|
1573	1466	reset_type == RESET_TYPE_MCDI_TIMEOUT) && !rc)
1574		- efx_ef10_reset_mc_allocations(efx);
	1467	+ efx_ef10_table_reset_mc_allocations(efx);
1575	1468	return rc;
1576	1469	}
1577	1470
..	..	@@ -1583,8 +1476,6 @@
1583	1476	{ NULL, 64, 8 * MC_CMD_MAC_ ## mcdi_name }
1584	1477	#define EF10_OTHER_STAT(ext_name) \
1585	1478	[EF10_STAT_ ## ext_name] = { #ext_name, 0, 0 }
1586		-#define GENERIC_SW_STAT(ext_name) \
1587		- [GENERIC_STAT_ ## ext_name] = { #ext_name, 0, 0 }
1588	1479
1589	1480	static const struct efx_hw_stat_desc efx_ef10_stat_desc[EF10_STAT_COUNT] = {
1590	1481	EF10_DMA_STAT(port_tx_bytes, TX_BYTES),
..	..	@@ -1628,8 +1519,8 @@
1628	1519	EF10_DMA_STAT(port_rx_align_error, RX_ALIGN_ERROR_PKTS),
1629	1520	EF10_DMA_STAT(port_rx_length_error, RX_LENGTH_ERROR_PKTS),
1630	1521	EF10_DMA_STAT(port_rx_nodesc_drops, RX_NODESC_DROPS),
1631		- GENERIC_SW_STAT(rx_nodesc_trunc),
1632		- GENERIC_SW_STAT(rx_noskb_drops),
	1522	+ EFX_GENERIC_SW_STAT(rx_nodesc_trunc),
	1523	+ EFX_GENERIC_SW_STAT(rx_noskb_drops),
1633	1524	EF10_DMA_STAT(port_rx_pm_trunc_bb_overflow, PM_TRUNC_BB_OVERFLOW),
1634	1525	EF10_DMA_STAT(port_rx_pm_discard_bb_overflow, PM_DISCARD_BB_OVERFLOW),
1635	1526	EF10_DMA_STAT(port_rx_pm_trunc_vfifo_full, PM_TRUNC_VFIFO_FULL),
..	..	@@ -1938,60 +1829,53 @@
1938	1829	return stats_count;
1939	1830	}
1940	1831
1941		-static int efx_ef10_try_update_nic_stats_pf(struct efx_nic *efx)
	1832	+static size_t efx_ef10_update_stats_pf(struct efx_nic efx, u64 full_stats,
	1833	+ struct rtnl_link_stats64 *core_stats)
1942	1834	{
1943	1835	struct efx_ef10_nic_data *nic_data = efx->nic_data;
1944	1836	DECLARE_BITMAP(mask, EF10_STAT_COUNT);
1945		- __le64 generation_start, generation_end;
1946	1837	u64 *stats = nic_data->stats;
1947		- __le64 *dma_stats;
1948	1838
1949	1839	efx_ef10_get_stat_mask(efx, mask);
1950	1840
1951		- dma_stats = efx->stats_buffer.addr;
1952		-
1953		- generation_end = dma_stats[efx->num_mac_stats - 1];
1954		- if (generation_end == EFX_MC_STATS_GENERATION_INVALID)
1955		- return 0;
1956		- rmb();
1957		- efx_nic_update_stats(efx_ef10_stat_desc, EF10_STAT_COUNT, mask,
1958		- stats, efx->stats_buffer.addr, false);
1959		- rmb();
1960		- generation_start = dma_stats[MC_CMD_MAC_GENERATION_START];
1961		- if (generation_end != generation_start)
1962		- return -EAGAIN;
	1841	+ /* If NIC was fini'd (probably resetting), then we can't read
	1842	+ * updated stats right now.
	1843	+ */
	1844	+ if (nic_data->mc_stats) {
	1845	+ efx_nic_copy_stats(efx, nic_data->mc_stats);
	1846	+ efx_nic_update_stats(efx_ef10_stat_desc, EF10_STAT_COUNT,
	1847	+ mask, stats, nic_data->mc_stats, false);
	1848	+ }
1963	1849
1964	1850	/* Update derived statistics */
1965	1851	efx_nic_fix_nodesc_drop_stat(efx,
1966	1852	&stats[EF10_STAT_port_rx_nodesc_drops]);
	1853	+ /* MC Firmware reads RX_BYTES and RX_GOOD_BYTES from the MAC.
	1854	+ * It then calculates RX_BAD_BYTES and DMAs it to us with RX_BYTES.
	1855	+ * We report these as port_rx_ stats. We are not given RX_GOOD_BYTES.
	1856	+ * Here we calculate port_rx_good_bytes.
	1857	+ */
1967	1858	stats[EF10_STAT_port_rx_good_bytes] =
1968	1859	stats[EF10_STAT_port_rx_bytes] -
1969	1860	stats[EF10_STAT_port_rx_bytes_minus_good_bytes];
	1861	+
	1862	+ /* The asynchronous reads used to calculate RX_BAD_BYTES in
	1863	+ * MC Firmware are done such that we should not see an increase in
	1864	+ * RX_BAD_BYTES when a good packet has arrived. Unfortunately this
	1865	+ * does mean that the stat can decrease at times. Here we do not
	1866	+ * update the stat unless it has increased or has gone to zero
	1867	+ * (In the case of the NIC rebooting).
	1868	+ * Please see Bug 33781 for a discussion of why things work this way.
	1869	+ */
1970	1870	efx_update_diff_stat(&stats[EF10_STAT_port_rx_bad_bytes],
1971	1871	stats[EF10_STAT_port_rx_bytes_minus_good_bytes]);
1972	1872	efx_update_sw_stats(efx, stats);
1973		- return 0;
1974		-}
1975		-
1976		-
1977		-static size_t efx_ef10_update_stats_pf(struct efx_nic efx, u64 full_stats,
1978		- struct rtnl_link_stats64 *core_stats)
1979		-{
1980		- int retry;
1981		-
1982		- /* If we're unlucky enough to read statistics during the DMA, wait
1983		- * up to 10ms for it to finish (typically takes <500us)
1984		- */
1985		- for (retry = 0; retry < 100; ++retry) {
1986		- if (efx_ef10_try_update_nic_stats_pf(efx) == 0)
1987		- break;
1988		- udelay(100);
1989		- }
1990	1873
1991	1874	return efx_ef10_update_stats_common(efx, full_stats, core_stats);
1992	1875	}
1993	1876
1994	1877	static int efx_ef10_try_update_nic_stats_vf(struct efx_nic *efx)
	1878	+ __must_hold(&efx->stats_lock)
1995	1879	{
1996	1880	MCDI_DECLARE_BUF(inbuf, MC_CMD_MAC_STATS_IN_LEN);
1997	1881	struct efx_ef10_nic_data *nic_data = efx->nic_data;
..	..	@@ -2005,18 +1889,9 @@
2005	1889
2006	1890	spin_unlock_bh(&efx->stats_lock);
2007	1891
2008		- if (in_interrupt()) {
2009		- /* If in atomic context, cannot update stats. Just update the
2010		- * software stats and return so the caller can continue.
2011		- */
2012		- spin_lock_bh(&efx->stats_lock);
2013		- efx_update_sw_stats(efx, stats);
2014		- return 0;
2015		- }
2016		-
2017	1892	efx_ef10_get_stat_mask(efx, mask);
2018	1893
2019		- rc = efx_nic_alloc_buffer(efx, &stats_buf, dma_len, GFP_ATOMIC);
	1894	+ rc = efx_nic_alloc_buffer(efx, &stats_buf, dma_len, GFP_KERNEL);
2020	1895	if (rc) {
2021	1896	spin_lock_bh(&efx->stats_lock);
2022	1897	return rc;
..	..	@@ -2059,7 +1934,10 @@
2059	1934
2060	1935	efx_update_sw_stats(efx, stats);
2061	1936	out:
	1937	+ /* releasing a DMA coherent buffer with BH disabled can panic */
	1938	+ spin_unlock_bh(&efx->stats_lock);
2062	1939	efx_nic_free_buffer(efx, &stats_buf);
	1940	+ spin_lock_bh(&efx->stats_lock);
2063	1941	return rc;
2064	1942	}
2065	1943
..	..	@@ -2069,6 +1947,18 @@
2069	1947	if (efx_ef10_try_update_nic_stats_vf(efx))
2070	1948	return 0;
2071	1949
	1950	+ return efx_ef10_update_stats_common(efx, full_stats, core_stats);
	1951	+}
	1952	+
	1953	+static size_t efx_ef10_update_stats_atomic_vf(struct efx_nic efx, u64 full_stats,
	1954	+ struct rtnl_link_stats64 *core_stats)
	1955	+{
	1956	+ struct efx_ef10_nic_data *nic_data = efx->nic_data;
	1957	+
	1958	+ /* In atomic context, cannot update HW stats. Just update the
	1959	+ * software stats and return so the caller can continue.
	1960	+ */
	1961	+ efx_update_sw_stats(efx, nic_data->stats);
2072	1962	return efx_ef10_update_stats_common(efx, full_stats, core_stats);
2073	1963	}
2074	1964
..	..	@@ -2187,7 +2077,7 @@
2187	2077	struct efx_ef10_nic_data *nic_data = efx->nic_data;
2188	2078
2189	2079	/* All our allocations have been reset */
2190		- efx_ef10_reset_mc_allocations(efx);
	2080	+ efx_ef10_table_reset_mc_allocations(efx);
2191	2081
2192	2082	/* The datapath firmware might have been changed */
2193	2083	nic_data->must_check_datapath_caps = true;
..	..	@@ -2300,6 +2190,9 @@
2300	2190
2301	2191	static int efx_ef10_tx_probe(struct efx_tx_queue *tx_queue)
2302	2192	{
	2193	+ /* low two bits of label are what we want for type */
	2194	+ BUILD_BUG_ON((EFX_TXQ_TYPE_OUTER_CSUM \| EFX_TXQ_TYPE_INNER_CSUM) != 3);
	2195	+ tx_queue->type = tx_queue->label & 3;
2303	2196	return efx_nic_alloc_buffer(tx_queue->efx, &tx_queue->txd.buf,
2304	2197	(tx_queue->ptr_mask + 1) *
2305	2198	sizeof(efx_qword_t),
..	..	@@ -2322,15 +2215,15 @@
2322	2215
2323	2216	/* Add Firmware-Assisted TSO v2 option descriptors to a queue.
2324	2217	*/
2325		-static int efx_ef10_tx_tso_desc(struct efx_tx_queue *tx_queue,
2326		- struct sk_buff *skb,
2327		- bool *data_mapped)
	2218	+int efx_ef10_tx_tso_desc(struct efx_tx_queue tx_queue, struct sk_buff skb,
	2219	+ bool *data_mapped)
2328	2220	{
2329	2221	struct efx_tx_buffer *buffer;
	2222	+ u16 inner_ipv4_id = 0;
	2223	+ u16 outer_ipv4_id = 0;
2330	2224	struct tcphdr *tcp;
2331	2225	struct iphdr *ip;
2332		-
2333		- u16 ipv4_id;
	2226	+ u16 ip_tot_len;
2334	2227	u32 seqnum;
2335	2228	u32 mss;
2336	2229
..	..	@@ -2343,21 +2236,43 @@
2343	2236	return -EINVAL;
2344	2237	}
2345	2238
2346		- ip = ip_hdr(skb);
2347		- if (ip->version == 4) {
2348		- /* Modify IPv4 header if needed. */
2349		- ip->tot_len = 0;
2350		- ip->check = 0;
2351		- ipv4_id = ntohs(ip->id);
2352		- } else {
2353		- /* Modify IPv6 header if needed. */
2354		- struct ipv6hdr *ipv6 = ipv6_hdr(skb);
	2239	+ if (skb->encapsulation) {
	2240	+ if (!tx_queue->tso_encap)
	2241	+ return -EINVAL;
	2242	+ ip = ip_hdr(skb);
	2243	+ if (ip->version == 4)
	2244	+ outer_ipv4_id = ntohs(ip->id);
2355	2245
2356		- ipv6->payload_len = 0;
2357		- ipv4_id = 0;
	2246	+ ip = inner_ip_hdr(skb);
	2247	+ tcp = inner_tcp_hdr(skb);
	2248	+ } else {
	2249	+ ip = ip_hdr(skb);
	2250	+ tcp = tcp_hdr(skb);
2358	2251	}
2359	2252
2360		- tcp = tcp_hdr(skb);
	2253	+ /* 8000-series EF10 hardware requires that IP Total Length be
	2254	+ * greater than or equal to the value it will have in each segment
	2255	+ * (which is at most mss + 208 + TCP header length), but also less
	2256	+ * than (0x10000 - inner_network_header). Otherwise the TCP
	2257	+ * checksum calculation will be broken for encapsulated packets.
	2258	+ * We fill in ip->tot_len with 0xff30, which should satisfy the
	2259	+ * first requirement unless the MSS is ridiculously large (which
	2260	+ * should be impossible as the driver max MTU is 9216); it is
	2261	+ * guaranteed to satisfy the second as we only attempt TSO if
	2262	+ * inner_network_header <= 208.
	2263	+ */
	2264	+ ip_tot_len = 0x10000 - EFX_TSO2_MAX_HDRLEN;
	2265	+ EFX_WARN_ON_ONCE_PARANOID(mss + EFX_TSO2_MAX_HDRLEN +
	2266	+ (tcp->doff << 2u) > ip_tot_len);
	2267	+
	2268	+ if (ip->version == 4) {
	2269	+ ip->tot_len = htons(ip_tot_len);
	2270	+ ip->check = 0;
	2271	+ inner_ipv4_id = ntohs(ip->id);
	2272	+ } else {
	2273	+ ((struct ipv6hdr *)ip)->payload_len = htons(ip_tot_len);
	2274	+ }
	2275	+
2361	2276	seqnum = ntohl(tcp->seq);
2362	2277
2363	2278	buffer = efx_tx_queue_get_insert_buffer(tx_queue);
..	..	@@ -2370,7 +2285,7 @@
2370	2285	ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_TSO,
2371	2286	ESF_DZ_TX_TSO_OPTION_TYPE,
2372	2287	ESE_DZ_TX_TSO_OPTION_DESC_FATSO2A,
2373		- ESF_DZ_TX_TSO_IP_ID, ipv4_id,
	2288	+ ESF_DZ_TX_TSO_IP_ID, inner_ipv4_id,
2374	2289	ESF_DZ_TX_TSO_TCP_SEQNO, seqnum
2375	2290	);
2376	2291	++tx_queue->insert_count;
..	..	@@ -2380,11 +2295,12 @@
2380	2295	buffer->flags = EFX_TX_BUF_OPTION;
2381	2296	buffer->len = 0;
2382	2297	buffer->unmap_len = 0;
2383		- EFX_POPULATE_QWORD_4(buffer->option,
	2298	+ EFX_POPULATE_QWORD_5(buffer->option,
2384	2299	ESF_DZ_TX_DESC_IS_OPT, 1,
2385	2300	ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_TSO,
2386	2301	ESF_DZ_TX_TSO_OPTION_TYPE,
2387	2302	ESE_DZ_TX_TSO_OPTION_DESC_FATSO2B,
	2303	+ ESF_DZ_TX_TSO_OUTER_IPID, outer_ipv4_id,
2388	2304	ESF_DZ_TX_TSO_TCP_MSS, mss
2389	2305	);
2390	2306	++tx_queue->insert_count;
..	..	@@ -2408,20 +2324,15 @@
2408	2324
2409	2325	static void efx_ef10_tx_init(struct efx_tx_queue *tx_queue)
2410	2326	{
2411		- MCDI_DECLARE_BUF(inbuf, MC_CMD_INIT_TXQ_IN_LEN(EFX_MAX_DMAQ_SIZE * 8 /
2412		- EFX_BUF_SIZE));
2413		- bool csum_offload = tx_queue->queue & EFX_TXQ_TYPE_OFFLOAD;
2414		- size_t entries = tx_queue->txd.buf.len / EFX_BUF_SIZE;
	2327	+ bool csum_offload = tx_queue->type & EFX_TXQ_TYPE_OUTER_CSUM;
	2328	+ bool inner_csum = tx_queue->type & EFX_TXQ_TYPE_INNER_CSUM;
2415	2329	struct efx_channel *channel = tx_queue->channel;
2416	2330	struct efx_nic *efx = tx_queue->efx;
2417		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
2418		- bool tso_v2 = false;
2419		- size_t inlen;
2420		- dma_addr_t dma_addr;
	2331	+ struct efx_ef10_nic_data *nic_data;
2421	2332	efx_qword_t *txd;
2422	2333	int rc;
2423		- int i;
2424		- BUILD_BUG_ON(MC_CMD_INIT_TXQ_OUT_LEN != 0);
	2334	+
	2335	+ nic_data = efx->nic_data;
2425	2336
2426	2337	/* Only attempt to enable TX timestamping if we have the license for it,
2427	2338	* otherwise TXQ init will fail
..	..	@@ -2437,61 +2348,23 @@
2437	2348	/* TSOv2 is a limited resource that can only be configured on a limited
2438	2349	* number of queues. TSO without checksum offload is not really a thing,
2439	2350	* so we only enable it for those queues.
2440		- * TSOv2 cannot be used with Hardware timestamping.
	2351	+ * TSOv2 cannot be used with Hardware timestamping, and is never needed
	2352	+ * for XDP tx.
2441	2353	*/
2442		- if (csum_offload && (nic_data->datapath_caps2 &
2443		- (1 << MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_LBN)) &&
2444		- !tx_queue->timestamping) {
2445		- tso_v2 = true;
2446		- netif_dbg(efx, hw, efx->net_dev, "Using TSOv2 for channel %u\n",
2447		- channel->channel);
2448		- }
2449		-
2450		- MCDI_SET_DWORD(inbuf, INIT_TXQ_IN_SIZE, tx_queue->ptr_mask + 1);
2451		- MCDI_SET_DWORD(inbuf, INIT_TXQ_IN_TARGET_EVQ, channel->channel);
2452		- MCDI_SET_DWORD(inbuf, INIT_TXQ_IN_LABEL, tx_queue->queue);
2453		- MCDI_SET_DWORD(inbuf, INIT_TXQ_IN_INSTANCE, tx_queue->queue);
2454		- MCDI_SET_DWORD(inbuf, INIT_TXQ_IN_OWNER_ID, 0);
2455		- MCDI_SET_DWORD(inbuf, INIT_TXQ_IN_PORT_ID, nic_data->vport_id);
2456		-
2457		- dma_addr = tx_queue->txd.buf.dma_addr;
2458		-
2459		- netif_dbg(efx, hw, efx->net_dev, "pushing TXQ %d. %zu entries (%llx)\n",
2460		- tx_queue->queue, entries, (u64)dma_addr);
2461		-
2462		- for (i = 0; i < entries; ++i) {
2463		- MCDI_SET_ARRAY_QWORD(inbuf, INIT_TXQ_IN_DMA_ADDR, i, dma_addr);
2464		- dma_addr += EFX_BUF_SIZE;
2465		- }
2466		-
2467		- inlen = MC_CMD_INIT_TXQ_IN_LEN(entries);
2468		-
2469		- do {
2470		- MCDI_POPULATE_DWORD_4(inbuf, INIT_TXQ_IN_FLAGS,
2471		- /* This flag was removed from mcdi_pcol.h for
2472		- * the non-_EXT version of INIT_TXQ. However,
2473		- * firmware still honours it.
2474		- */
2475		- INIT_TXQ_EXT_IN_FLAG_TSOV2_EN, tso_v2,
2476		- INIT_TXQ_IN_FLAG_IP_CSUM_DIS, !csum_offload,
2477		- INIT_TXQ_IN_FLAG_TCP_CSUM_DIS, !csum_offload,
2478		- INIT_TXQ_EXT_IN_FLAG_TIMESTAMP,
2479		- tx_queue->timestamping);
2480		-
2481		- rc = efx_mcdi_rpc_quiet(efx, MC_CMD_INIT_TXQ, inbuf, inlen,
2482		- NULL, 0, NULL);
2483		- if (rc == -ENOSPC && tso_v2) {
2484		- /* Retry without TSOv2 if we're short on contexts. */
2485		- tso_v2 = false;
2486		- netif_warn(efx, probe, efx->net_dev,
2487		- "TSOv2 context not available to segment in hardware. TCP performance may be reduced.\n");
2488		- } else if (rc) {
2489		- efx_mcdi_display_error(efx, MC_CMD_INIT_TXQ,
2490		- MC_CMD_INIT_TXQ_EXT_IN_LEN,
2491		- NULL, 0, rc);
2492		- goto fail;
	2354	+ if (efx_has_cap(efx, TX_TSO_V2)) {
	2355	+ if ((csum_offload \|\| inner_csum) &&
	2356	+ !tx_queue->timestamping && !tx_queue->xdp_tx) {
	2357	+ tx_queue->tso_version = 2;
	2358	+ netif_dbg(efx, hw, efx->net_dev, "Using TSOv2 for channel %u\n",
	2359	+ channel->channel);
2493	2360	}
2494		- } while (rc);
	2361	+ } else if (efx_has_cap(efx, TX_TSO)) {
	2362	+ tx_queue->tso_version = 1;
	2363	+ }
	2364	+
	2365	+ rc = efx_mcdi_tx_init(tx_queue);
	2366	+ if (rc)
	2367	+ goto fail;
2495	2368
2496	2369	/* A previous user of this TX queue might have set us up the
2497	2370	* bomb by writing a descriptor to the TX push collector but
..	..	@@ -2502,22 +2375,19 @@
2502	2375	tx_queue->buffer[0].flags = EFX_TX_BUF_OPTION;
2503	2376	tx_queue->insert_count = 1;
2504	2377	txd = efx_tx_desc(tx_queue, 0);
2505		- EFX_POPULATE_QWORD_5(*txd,
	2378	+ EFX_POPULATE_QWORD_7(*txd,
2506	2379	ESF_DZ_TX_DESC_IS_OPT, true,
2507	2380	ESF_DZ_TX_OPTION_TYPE,
2508	2381	ESE_DZ_TX_OPTION_DESC_CRC_CSUM,
2509	2382	ESF_DZ_TX_OPTION_UDP_TCP_CSUM, csum_offload,
2510		- ESF_DZ_TX_OPTION_IP_CSUM, csum_offload,
	2383	+ ESF_DZ_TX_OPTION_IP_CSUM, csum_offload && tx_queue->tso_version != 2,
	2384	+ ESF_DZ_TX_OPTION_INNER_UDP_TCP_CSUM, inner_csum,
	2385	+ ESF_DZ_TX_OPTION_INNER_IP_CSUM, inner_csum && tx_queue->tso_version != 2,
2511	2386	ESF_DZ_TX_TIMESTAMP, tx_queue->timestamping);
2512	2387	tx_queue->write_count = 1;
2513	2388
2514		- if (tso_v2) {
2515		- tx_queue->handle_tso = efx_ef10_tx_tso_desc;
2516		- tx_queue->tso_version = 2;
2517		- } else if (nic_data->datapath_caps &
2518		- (1 << MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_LBN)) {
2519		- tx_queue->tso_version = 1;
2520		- }
	2389	+ if (tx_queue->tso_version == 2 && efx_has_cap(efx, TX_TSO_V2_ENCAP))
	2390	+ tx_queue->tso_encap = true;
2521	2391
2522	2392	wmb();
2523	2393	efx_ef10_push_tx_desc(tx_queue, txd);
..	..	@@ -2527,35 +2397,6 @@
2527	2397	fail:
2528	2398	netdev_WARN(efx->net_dev, "failed to initialise TXQ %d\n",
2529	2399	tx_queue->queue);
2530		-}
2531		-
2532		-static void efx_ef10_tx_fini(struct efx_tx_queue *tx_queue)
2533		-{
2534		- MCDI_DECLARE_BUF(inbuf, MC_CMD_FINI_TXQ_IN_LEN);
2535		- MCDI_DECLARE_BUF_ERR(outbuf);
2536		- struct efx_nic *efx = tx_queue->efx;
2537		- size_t outlen;
2538		- int rc;
2539		-
2540		- MCDI_SET_DWORD(inbuf, FINI_TXQ_IN_INSTANCE,
2541		- tx_queue->queue);
2542		-
2543		- rc = efx_mcdi_rpc_quiet(efx, MC_CMD_FINI_TXQ, inbuf, sizeof(inbuf),
2544		- outbuf, sizeof(outbuf), &outlen);
2545		-
2546		- if (rc && rc != -EALREADY)
2547		- goto fail;
2548		-
2549		- return;
2550		-
2551		-fail:
2552		- efx_mcdi_display_error(efx, MC_CMD_FINI_TXQ, MC_CMD_FINI_TXQ_IN_LEN,
2553		- outbuf, outlen, rc);
2554		-}
2555		-
2556		-static void efx_ef10_tx_remove(struct efx_tx_queue *tx_queue)
2557		-{
2558		- efx_nic_free_buffer(tx_queue->efx, &tx_queue->txd.buf);
2559	2400	}
2560	2401
2561	2402	/* This writes to the TX_DESC_WPTR; write pointer for TX descriptor ring */
..	..	@@ -2596,7 +2437,7 @@
2596	2437	unsigned int write_ptr;
2597	2438	efx_qword_t *txd;
2598	2439
2599		- tx_queue->xmit_more_available = false;
	2440	+ tx_queue->xmit_pending = false;
2600	2441	if (unlikely(tx_queue->write_count == tx_queue->insert_count))
2601	2442	return;
2602	2443
..	..	@@ -2636,525 +2477,84 @@
2636	2477	}
2637	2478	}
2638	2479
2639		-#define RSS_MODE_HASH_ADDRS (1 << RSS_MODE_HASH_SRC_ADDR_LBN \|\
2640		- 1 << RSS_MODE_HASH_DST_ADDR_LBN)
2641		-#define RSS_MODE_HASH_PORTS (1 << RSS_MODE_HASH_SRC_PORT_LBN \|\
2642		- 1 << RSS_MODE_HASH_DST_PORT_LBN)
2643		-#define RSS_CONTEXT_FLAGS_DEFAULT (1 << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_LBN \|\
2644		- 1 << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_LBN \|\
2645		- 1 << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_LBN \|\
2646		- 1 << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_LBN \|\
2647		- (RSS_MODE_HASH_ADDRS \| RSS_MODE_HASH_PORTS) << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_LBN \|\
2648		- RSS_MODE_HASH_ADDRS << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_LBN \|\
2649		- RSS_MODE_HASH_ADDRS << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_LBN \|\
2650		- (RSS_MODE_HASH_ADDRS \| RSS_MODE_HASH_PORTS) << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_LBN \|\
2651		- RSS_MODE_HASH_ADDRS << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_LBN \|\
2652		- RSS_MODE_HASH_ADDRS << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_LBN)
2653		-
2654		-static int efx_ef10_get_rss_flags(struct efx_nic efx, u32 context, u32 flags)
	2480	+static int efx_ef10_probe_multicast_chaining(struct efx_nic *efx)
2655	2481	{
2656		- /* Firmware had a bug (sfc bug 61952) where it would not actually
2657		- * fill in the flags field in the response to MC_CMD_RSS_CONTEXT_GET_FLAGS.
2658		- * This meant that it would always contain whatever was previously
2659		- * in the MCDI buffer. Fortunately, all firmware versions with
2660		- * this bug have the same default flags value for a newly-allocated
2661		- * RSS context, and the only time we want to get the flags is just
2662		- * after allocating. Moreover, the response has a 32-bit hole
2663		- * where the context ID would be in the request, so we can use an
2664		- * overlength buffer in the request and pre-fill the flags field
2665		- * with what we believe the default to be. Thus if the firmware
2666		- * has the bug, it will leave our pre-filled value in the flags
2667		- * field of the response, and we will get the right answer.
2668		- *
2669		- * However, this does mean that this function should NOT be used if
2670		- * the RSS context flags might not be their defaults - it is ONLY
2671		- * reliably correct for a newly-allocated RSS context.
2672		- */
2673		- MCDI_DECLARE_BUF(inbuf, MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_LEN);
2674		- MCDI_DECLARE_BUF(outbuf, MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_LEN);
2675		- size_t outlen;
2676		- int rc;
2677		-
2678		- /* Check we have a hole for the context ID */
2679		- BUILD_BUG_ON(MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_LEN != MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_FLAGS_OFST);
2680		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_GET_FLAGS_IN_RSS_CONTEXT_ID, context);
2681		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_GET_FLAGS_OUT_FLAGS,
2682		- RSS_CONTEXT_FLAGS_DEFAULT);
2683		- rc = efx_mcdi_rpc(efx, MC_CMD_RSS_CONTEXT_GET_FLAGS, inbuf,
2684		- sizeof(inbuf), outbuf, sizeof(outbuf), &outlen);
2685		- if (rc == 0) {
2686		- if (outlen < MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_LEN)
2687		- rc = -EIO;
2688		- else
2689		- *flags = MCDI_DWORD(outbuf, RSS_CONTEXT_GET_FLAGS_OUT_FLAGS);
2690		- }
2691		- return rc;
2692		-}
2693		-
2694		-/* Attempt to enable 4-tuple UDP hashing on the specified RSS context.
2695		- * If we fail, we just leave the RSS context at its default hash settings,
2696		- * which is safe but may slightly reduce performance.
2697		- * Defaults are 4-tuple for TCP and 2-tuple for UDP and other-IP, so we
2698		- * just need to set the UDP ports flags (for both IP versions).
2699		- */
2700		-static void efx_ef10_set_rss_flags(struct efx_nic *efx,
2701		- struct efx_rss_context *ctx)
2702		-{
2703		- MCDI_DECLARE_BUF(inbuf, MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN);
2704		- u32 flags;
2705		-
2706		- BUILD_BUG_ON(MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN != 0);
2707		-
2708		- if (efx_ef10_get_rss_flags(efx, ctx->context_id, &flags) != 0)
2709		- return;
2710		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
2711		- ctx->context_id);
2712		- flags \|= RSS_MODE_HASH_PORTS << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_LBN;
2713		- flags \|= RSS_MODE_HASH_PORTS << MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_LBN;
2714		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_SET_FLAGS_IN_FLAGS, flags);
2715		- if (!efx_mcdi_rpc(efx, MC_CMD_RSS_CONTEXT_SET_FLAGS, inbuf, sizeof(inbuf),
2716		- NULL, 0, NULL))
2717		- /* Succeeded, so UDP 4-tuple is now enabled */
2718		- ctx->rx_hash_udp_4tuple = true;
2719		-}
2720		-
2721		-static int efx_ef10_alloc_rss_context(struct efx_nic *efx, bool exclusive,
2722		- struct efx_rss_context *ctx,
2723		- unsigned *context_size)
2724		-{
2725		- MCDI_DECLARE_BUF(inbuf, MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN);
2726		- MCDI_DECLARE_BUF(outbuf, MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN);
2727	2482	struct efx_ef10_nic_data *nic_data = efx->nic_data;
2728		- size_t outlen;
	2483	+ unsigned int enabled, implemented;
	2484	+ bool want_workaround_26807;
2729	2485	int rc;
2730		- u32 alloc_type = exclusive ?
2731		- MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE :
2732		- MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED;
2733		- unsigned rss_spread = exclusive ?
2734		- efx->rss_spread :
2735		- min(rounddown_pow_of_two(efx->rss_spread),
2736		- EFX_EF10_MAX_SHARED_RSS_CONTEXT_SIZE);
2737	2486
2738		- if (!exclusive && rss_spread == 1) {
2739		- ctx->context_id = EFX_EF10_RSS_CONTEXT_INVALID;
2740		- if (context_size)
2741		- *context_size = 1;
	2487	+ rc = efx_mcdi_get_workarounds(efx, &implemented, &enabled);
	2488	+ if (rc == -ENOSYS) {
	2489	+ /* GET_WORKAROUNDS was implemented before this workaround,
	2490	+ * thus it must be unavailable in this firmware.
	2491	+ */
	2492	+ nic_data->workaround_26807 = false;
2742	2493	return 0;
2743	2494	}
2744		-
2745		- if (nic_data->datapath_caps &
2746		- 1 << MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_LBN)
2747		- return -EOPNOTSUPP;
2748		-
2749		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
2750		- nic_data->vport_id);
2751		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_ALLOC_IN_TYPE, alloc_type);
2752		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, rss_spread);
2753		-
2754		- rc = efx_mcdi_rpc(efx, MC_CMD_RSS_CONTEXT_ALLOC, inbuf, sizeof(inbuf),
2755		- outbuf, sizeof(outbuf), &outlen);
2756		- if (rc != 0)
2757		- return rc;
2758		-
2759		- if (outlen < MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN)
2760		- return -EIO;
2761		-
2762		- ctx->context_id = MCDI_DWORD(outbuf, RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID);
2763		-
2764		- if (context_size)
2765		- *context_size = rss_spread;
2766		-
2767		- if (nic_data->datapath_caps &
2768		- 1 << MC_CMD_GET_CAPABILITIES_OUT_ADDITIONAL_RSS_MODES_LBN)
2769		- efx_ef10_set_rss_flags(efx, ctx);
2770		-
2771		- return 0;
2772		-}
2773		-
2774		-static int efx_ef10_free_rss_context(struct efx_nic *efx, u32 context)
2775		-{
2776		- MCDI_DECLARE_BUF(inbuf, MC_CMD_RSS_CONTEXT_FREE_IN_LEN);
2777		-
2778		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID,
2779		- context);
2780		- return efx_mcdi_rpc(efx, MC_CMD_RSS_CONTEXT_FREE, inbuf, sizeof(inbuf),
2781		- NULL, 0, NULL);
2782		-}
2783		-
2784		-static int efx_ef10_populate_rss_table(struct efx_nic *efx, u32 context,
2785		- const u32 rx_indir_table, const u8 key)
2786		-{
2787		- MCDI_DECLARE_BUF(tablebuf, MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN);
2788		- MCDI_DECLARE_BUF(keybuf, MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN);
2789		- int i, rc;
2790		-
2791		- MCDI_SET_DWORD(tablebuf, RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID,
2792		- context);
2793		- BUILD_BUG_ON(ARRAY_SIZE(efx->rss_context.rx_indir_table) !=
2794		- MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN);
2795		-
2796		- /* This iterates over the length of efx->rss_context.rx_indir_table, but
2797		- * copies bytes from rx_indir_table. That's because the latter is a
2798		- * pointer rather than an array, but should have the same length.
2799		- * The efx->rss_context.rx_hash_key loop below is similar.
2800		- */
2801		- for (i = 0; i < ARRAY_SIZE(efx->rss_context.rx_indir_table); ++i)
2802		- MCDI_PTR(tablebuf,
2803		- RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE)[i] =
2804		- (u8) rx_indir_table[i];
2805		-
2806		- rc = efx_mcdi_rpc(efx, MC_CMD_RSS_CONTEXT_SET_TABLE, tablebuf,
2807		- sizeof(tablebuf), NULL, 0, NULL);
2808		- if (rc != 0)
2809		- return rc;
2810		-
2811		- MCDI_SET_DWORD(keybuf, RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID,
2812		- context);
2813		- BUILD_BUG_ON(ARRAY_SIZE(efx->rss_context.rx_hash_key) !=
2814		- MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
2815		- for (i = 0; i < ARRAY_SIZE(efx->rss_context.rx_hash_key); ++i)
2816		- MCDI_PTR(keybuf, RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY)[i] = key[i];
2817		-
2818		- return efx_mcdi_rpc(efx, MC_CMD_RSS_CONTEXT_SET_KEY, keybuf,
2819		- sizeof(keybuf), NULL, 0, NULL);
2820		-}
2821		-
2822		-static void efx_ef10_rx_free_indir_table(struct efx_nic *efx)
2823		-{
2824		- int rc;
2825		-
2826		- if (efx->rss_context.context_id != EFX_EF10_RSS_CONTEXT_INVALID) {
2827		- rc = efx_ef10_free_rss_context(efx, efx->rss_context.context_id);
2828		- WARN_ON(rc != 0);
2829		- }
2830		- efx->rss_context.context_id = EFX_EF10_RSS_CONTEXT_INVALID;
2831		-}
2832		-
2833		-static int efx_ef10_rx_push_shared_rss_config(struct efx_nic *efx,
2834		- unsigned *context_size)
2835		-{
2836		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
2837		- int rc = efx_ef10_alloc_rss_context(efx, false, &efx->rss_context,
2838		- context_size);
2839		-
2840		- if (rc != 0)
2841		- return rc;
2842		-
2843		- nic_data->rx_rss_context_exclusive = false;
2844		- efx_set_default_rx_indir_table(efx, &efx->rss_context);
2845		- return 0;
2846		-}
2847		-
2848		-static int efx_ef10_rx_push_exclusive_rss_config(struct efx_nic *efx,
2849		- const u32 *rx_indir_table,
2850		- const u8 *key)
2851		-{
2852		- u32 old_rx_rss_context = efx->rss_context.context_id;
2853		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
2854		- int rc;
2855		-
2856		- if (efx->rss_context.context_id == EFX_EF10_RSS_CONTEXT_INVALID \|\|
2857		- !nic_data->rx_rss_context_exclusive) {
2858		- rc = efx_ef10_alloc_rss_context(efx, true, &efx->rss_context,
2859		- NULL);
2860		- if (rc == -EOPNOTSUPP)
2861		- return rc;
2862		- else if (rc != 0)
2863		- goto fail1;
2864		- }
2865		-
2866		- rc = efx_ef10_populate_rss_table(efx, efx->rss_context.context_id,
2867		- rx_indir_table, key);
2868		- if (rc != 0)
2869		- goto fail2;
2870		-
2871		- if (efx->rss_context.context_id != old_rx_rss_context &&
2872		- old_rx_rss_context != EFX_EF10_RSS_CONTEXT_INVALID)
2873		- WARN_ON(efx_ef10_free_rss_context(efx, old_rx_rss_context) != 0);
2874		- nic_data->rx_rss_context_exclusive = true;
2875		- if (rx_indir_table != efx->rss_context.rx_indir_table)
2876		- memcpy(efx->rss_context.rx_indir_table, rx_indir_table,
2877		- sizeof(efx->rss_context.rx_indir_table));
2878		- if (key != efx->rss_context.rx_hash_key)
2879		- memcpy(efx->rss_context.rx_hash_key, key,
2880		- efx->type->rx_hash_key_size);
2881		-
2882		- return 0;
2883		-
2884		-fail2:
2885		- if (old_rx_rss_context != efx->rss_context.context_id) {
2886		- WARN_ON(efx_ef10_free_rss_context(efx, efx->rss_context.context_id) != 0);
2887		- efx->rss_context.context_id = old_rx_rss_context;
2888		- }
2889		-fail1:
2890		- netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
2891		- return rc;
2892		-}
2893		-
2894		-static int efx_ef10_rx_push_rss_context_config(struct efx_nic *efx,
2895		- struct efx_rss_context *ctx,
2896		- const u32 *rx_indir_table,
2897		- const u8 *key)
2898		-{
2899		- int rc;
2900		-
2901		- WARN_ON(!mutex_is_locked(&efx->rss_lock));
2902		-
2903		- if (ctx->context_id == EFX_EF10_RSS_CONTEXT_INVALID) {
2904		- rc = efx_ef10_alloc_rss_context(efx, true, ctx, NULL);
2905		- if (rc)
2906		- return rc;
2907		- }
2908		-
2909		- if (!rx_indir_table) /* Delete this context */
2910		- return efx_ef10_free_rss_context(efx, ctx->context_id);
2911		-
2912		- rc = efx_ef10_populate_rss_table(efx, ctx->context_id,
2913		- rx_indir_table, key);
2914	2495	if (rc)
2915	2496	return rc;
	2497	+ want_workaround_26807 =
	2498	+ implemented & MC_CMD_GET_WORKAROUNDS_OUT_BUG26807;
	2499	+ nic_data->workaround_26807 =
	2500	+ !!(enabled & MC_CMD_GET_WORKAROUNDS_OUT_BUG26807);
2916	2501
2917		- memcpy(ctx->rx_indir_table, rx_indir_table,
2918		- sizeof(efx->rss_context.rx_indir_table));
2919		- memcpy(ctx->rx_hash_key, key, efx->type->rx_hash_key_size);
	2502	+ if (want_workaround_26807 && !nic_data->workaround_26807) {
	2503	+ unsigned int flags;
2920	2504
2921		- return 0;
2922		-}
	2505	+ rc = efx_mcdi_set_workaround(efx,
	2506	+ MC_CMD_WORKAROUND_BUG26807,
	2507	+ true, &flags);
	2508	+ if (!rc) {
	2509	+ if (flags &
	2510	+ 1 << MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN) {
	2511	+ netif_info(efx, drv, efx->net_dev,
	2512	+ "other functions on NIC have been reset\n");
2923	2513
2924		-static int efx_ef10_rx_pull_rss_context_config(struct efx_nic *efx,
2925		- struct efx_rss_context *ctx)
2926		-{
2927		- MCDI_DECLARE_BUF(inbuf, MC_CMD_RSS_CONTEXT_GET_TABLE_IN_LEN);
2928		- MCDI_DECLARE_BUF(tablebuf, MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_LEN);
2929		- MCDI_DECLARE_BUF(keybuf, MC_CMD_RSS_CONTEXT_GET_KEY_OUT_LEN);
2930		- size_t outlen;
2931		- int rc, i;
2932		-
2933		- WARN_ON(!mutex_is_locked(&efx->rss_lock));
2934		-
2935		- BUILD_BUG_ON(MC_CMD_RSS_CONTEXT_GET_TABLE_IN_LEN !=
2936		- MC_CMD_RSS_CONTEXT_GET_KEY_IN_LEN);
2937		-
2938		- if (ctx->context_id == EFX_EF10_RSS_CONTEXT_INVALID)
2939		- return -ENOENT;
2940		-
2941		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_GET_TABLE_IN_RSS_CONTEXT_ID,
2942		- ctx->context_id);
2943		- BUILD_BUG_ON(ARRAY_SIZE(ctx->rx_indir_table) !=
2944		- MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_LEN);
2945		- rc = efx_mcdi_rpc(efx, MC_CMD_RSS_CONTEXT_GET_TABLE, inbuf, sizeof(inbuf),
2946		- tablebuf, sizeof(tablebuf), &outlen);
2947		- if (rc != 0)
2948		- return rc;
2949		-
2950		- if (WARN_ON(outlen != MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_LEN))
2951		- return -EIO;
2952		-
2953		- for (i = 0; i < ARRAY_SIZE(ctx->rx_indir_table); i++)
2954		- ctx->rx_indir_table[i] = MCDI_PTR(tablebuf,
2955		- RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE)[i];
2956		-
2957		- MCDI_SET_DWORD(inbuf, RSS_CONTEXT_GET_KEY_IN_RSS_CONTEXT_ID,
2958		- ctx->context_id);
2959		- BUILD_BUG_ON(ARRAY_SIZE(ctx->rx_hash_key) !=
2960		- MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
2961		- rc = efx_mcdi_rpc(efx, MC_CMD_RSS_CONTEXT_GET_KEY, inbuf, sizeof(inbuf),
2962		- keybuf, sizeof(keybuf), &outlen);
2963		- if (rc != 0)
2964		- return rc;
2965		-
2966		- if (WARN_ON(outlen != MC_CMD_RSS_CONTEXT_GET_KEY_OUT_LEN))
2967		- return -EIO;
2968		-
2969		- for (i = 0; i < ARRAY_SIZE(ctx->rx_hash_key); ++i)
2970		- ctx->rx_hash_key[i] = MCDI_PTR(
2971		- keybuf, RSS_CONTEXT_GET_KEY_OUT_TOEPLITZ_KEY)[i];
2972		-
2973		- return 0;
2974		-}
2975		-
2976		-static int efx_ef10_rx_pull_rss_config(struct efx_nic *efx)
2977		-{
2978		- int rc;
2979		-
2980		- mutex_lock(&efx->rss_lock);
2981		- rc = efx_ef10_rx_pull_rss_context_config(efx, &efx->rss_context);
2982		- mutex_unlock(&efx->rss_lock);
2983		- return rc;
2984		-}
2985		-
2986		-static void efx_ef10_rx_restore_rss_contexts(struct efx_nic *efx)
2987		-{
2988		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
2989		- struct efx_rss_context *ctx;
2990		- int rc;
2991		-
2992		- WARN_ON(!mutex_is_locked(&efx->rss_lock));
2993		-
2994		- if (!nic_data->must_restore_rss_contexts)
2995		- return;
2996		-
2997		- list_for_each_entry(ctx, &efx->rss_context.list, list) {
2998		- /* previous NIC RSS context is gone */
2999		- ctx->context_id = EFX_EF10_RSS_CONTEXT_INVALID;
3000		- /* so try to allocate a new one */
3001		- rc = efx_ef10_rx_push_rss_context_config(efx, ctx,
3002		- ctx->rx_indir_table,
3003		- ctx->rx_hash_key);
3004		- if (rc)
3005		- netif_warn(efx, probe, efx->net_dev,
3006		- "failed to restore RSS context %u, rc=%d"
3007		- "; RSS filters may fail to be applied\n",
3008		- ctx->user_id, rc);
3009		- }
3010		- nic_data->must_restore_rss_contexts = false;
3011		-}
3012		-
3013		-static int efx_ef10_pf_rx_push_rss_config(struct efx_nic *efx, bool user,
3014		- const u32 *rx_indir_table,
3015		- const u8 *key)
3016		-{
3017		- int rc;
3018		-
3019		- if (efx->rss_spread == 1)
3020		- return 0;
3021		-
3022		- if (!key)
3023		- key = efx->rss_context.rx_hash_key;
3024		-
3025		- rc = efx_ef10_rx_push_exclusive_rss_config(efx, rx_indir_table, key);
3026		-
3027		- if (rc == -ENOBUFS && !user) {
3028		- unsigned context_size;
3029		- bool mismatch = false;
3030		- size_t i;
3031		-
3032		- for (i = 0;
3033		- i < ARRAY_SIZE(efx->rss_context.rx_indir_table) && !mismatch;
3034		- i++)
3035		- mismatch = rx_indir_table[i] !=
3036		- ethtool_rxfh_indir_default(i, efx->rss_spread);
3037		-
3038		- rc = efx_ef10_rx_push_shared_rss_config(efx, &context_size);
3039		- if (rc == 0) {
3040		- if (context_size != efx->rss_spread)
3041		- netif_warn(efx, probe, efx->net_dev,
3042		- "Could not allocate an exclusive RSS"
3043		- " context; allocated a shared one of"
3044		- " different size."
3045		- " Wanted %u, got %u.\n",
3046		- efx->rss_spread, context_size);
3047		- else if (mismatch)
3048		- netif_warn(efx, probe, efx->net_dev,
3049		- "Could not allocate an exclusive RSS"
3050		- " context; allocated a shared one but"
3051		- " could not apply custom"
3052		- " indirection.\n");
3053		- else
3054		- netif_info(efx, probe, efx->net_dev,
3055		- "Could not allocate an exclusive RSS"
3056		- " context; allocated a shared one.\n");
	2514	+ /* With MCFW v4.6.x and earlier, the
	2515	+ * boot count will have incremented,
	2516	+ * so re-read the warm_boot_count
	2517	+ * value now to ensure this function
	2518	+ * doesn't think it has changed next
	2519	+ * time it checks.
	2520	+ */
	2521	+ rc = efx_ef10_get_warm_boot_count(efx);
	2522	+ if (rc >= 0) {
	2523	+ nic_data->warm_boot_count = rc;
	2524	+ rc = 0;
	2525	+ }
	2526	+ }
	2527	+ nic_data->workaround_26807 = true;
	2528	+ } else if (rc == -EPERM) {
	2529	+ rc = 0;
3057	2530	}
3058	2531	}
3059	2532	return rc;
3060	2533	}
3061	2534
3062		-static int efx_ef10_vf_rx_push_rss_config(struct efx_nic *efx, bool user,
3063		- const u32 *rx_indir_table
3064		- __attribute__ ((unused)),
3065		- const u8 *key
3066		- __attribute__ ((unused)))
	2535	+static int efx_ef10_filter_table_probe(struct efx_nic *efx)
3067	2536	{
3068		- if (user)
3069		- return -EOPNOTSUPP;
3070		- if (efx->rss_context.context_id != EFX_EF10_RSS_CONTEXT_INVALID)
3071		- return 0;
3072		- return efx_ef10_rx_push_shared_rss_config(efx, NULL);
3073		-}
3074		-
3075		-static int efx_ef10_rx_probe(struct efx_rx_queue *rx_queue)
3076		-{
3077		- return efx_nic_alloc_buffer(rx_queue->efx, &rx_queue->rxd.buf,
3078		- (rx_queue->ptr_mask + 1) *
3079		- sizeof(efx_qword_t),
3080		- GFP_KERNEL);
3081		-}
3082		-
3083		-static void efx_ef10_rx_init(struct efx_rx_queue *rx_queue)
3084		-{
3085		- MCDI_DECLARE_BUF(inbuf,
3086		- MC_CMD_INIT_RXQ_IN_LEN(EFX_MAX_DMAQ_SIZE * 8 /
3087		- EFX_BUF_SIZE));
3088		- struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
3089		- size_t entries = rx_queue->rxd.buf.len / EFX_BUF_SIZE;
3090		- struct efx_nic *efx = rx_queue->efx;
3091	2537	struct efx_ef10_nic_data *nic_data = efx->nic_data;
3092		- size_t inlen;
3093		- dma_addr_t dma_addr;
3094		- int rc;
3095		- int i;
3096		- BUILD_BUG_ON(MC_CMD_INIT_RXQ_OUT_LEN != 0);
	2538	+ int rc = efx_ef10_probe_multicast_chaining(efx);
	2539	+ struct efx_mcdi_filter_vlan *vlan;
3097	2540
3098		- rx_queue->scatter_n = 0;
3099		- rx_queue->scatter_len = 0;
3100		-
3101		- MCDI_SET_DWORD(inbuf, INIT_RXQ_IN_SIZE, rx_queue->ptr_mask + 1);
3102		- MCDI_SET_DWORD(inbuf, INIT_RXQ_IN_TARGET_EVQ, channel->channel);
3103		- MCDI_SET_DWORD(inbuf, INIT_RXQ_IN_LABEL, efx_rx_queue_index(rx_queue));
3104		- MCDI_SET_DWORD(inbuf, INIT_RXQ_IN_INSTANCE,
3105		- efx_rx_queue_index(rx_queue));
3106		- MCDI_POPULATE_DWORD_2(inbuf, INIT_RXQ_IN_FLAGS,
3107		- INIT_RXQ_IN_FLAG_PREFIX, 1,
3108		- INIT_RXQ_IN_FLAG_TIMESTAMP, 1);
3109		- MCDI_SET_DWORD(inbuf, INIT_RXQ_IN_OWNER_ID, 0);
3110		- MCDI_SET_DWORD(inbuf, INIT_RXQ_IN_PORT_ID, nic_data->vport_id);
3111		-
3112		- dma_addr = rx_queue->rxd.buf.dma_addr;
3113		-
3114		- netif_dbg(efx, hw, efx->net_dev, "pushing RXQ %d. %zu entries (%llx)\n",
3115		- efx_rx_queue_index(rx_queue), entries, (u64)dma_addr);
3116		-
3117		- for (i = 0; i < entries; ++i) {
3118		- MCDI_SET_ARRAY_QWORD(inbuf, INIT_RXQ_IN_DMA_ADDR, i, dma_addr);
3119		- dma_addr += EFX_BUF_SIZE;
3120		- }
3121		-
3122		- inlen = MC_CMD_INIT_RXQ_IN_LEN(entries);
3123		-
3124		- rc = efx_mcdi_rpc(efx, MC_CMD_INIT_RXQ, inbuf, inlen,
3125		- NULL, 0, NULL);
3126	2541	if (rc)
3127		- netdev_WARN(efx->net_dev, "failed to initialise RXQ %d\n",
3128		- efx_rx_queue_index(rx_queue));
3129		-}
	2542	+ return rc;
	2543	+ rc = efx_mcdi_filter_table_probe(efx, nic_data->workaround_26807);
3130	2544
3131		-static void efx_ef10_rx_fini(struct efx_rx_queue *rx_queue)
3132		-{
3133		- MCDI_DECLARE_BUF(inbuf, MC_CMD_FINI_RXQ_IN_LEN);
3134		- MCDI_DECLARE_BUF_ERR(outbuf);
3135		- struct efx_nic *efx = rx_queue->efx;
3136		- size_t outlen;
3137		- int rc;
	2545	+ if (rc)
	2546	+ return rc;
3138	2547
3139		- MCDI_SET_DWORD(inbuf, FINI_RXQ_IN_INSTANCE,
3140		- efx_rx_queue_index(rx_queue));
	2548	+ list_for_each_entry(vlan, &nic_data->vlan_list, list) {
	2549	+ rc = efx_mcdi_filter_add_vlan(efx, vlan->vid);
	2550	+ if (rc)
	2551	+ goto fail_add_vlan;
	2552	+ }
	2553	+ return 0;
3141	2554
3142		- rc = efx_mcdi_rpc_quiet(efx, MC_CMD_FINI_RXQ, inbuf, sizeof(inbuf),
3143		- outbuf, sizeof(outbuf), &outlen);
3144		-
3145		- if (rc && rc != -EALREADY)
3146		- goto fail;
3147		-
3148		- return;
3149		-
3150		-fail:
3151		- efx_mcdi_display_error(efx, MC_CMD_FINI_RXQ, MC_CMD_FINI_RXQ_IN_LEN,
3152		- outbuf, outlen, rc);
3153		-}
3154		-
3155		-static void efx_ef10_rx_remove(struct efx_rx_queue *rx_queue)
3156		-{
3157		- efx_nic_free_buffer(rx_queue->efx, &rx_queue->rxd.buf);
	2555	+fail_add_vlan:
	2556	+ efx_mcdi_filter_table_remove(efx);
	2557	+ return rc;
3158	2558	}
3159	2559
3160	2560	/* This creates an entry in the RX descriptor queue */
..	..	@@ -3228,170 +2628,18 @@
3228	2628	/* nothing to do */
3229	2629	}
3230	2630
3231		-static int efx_ef10_ev_probe(struct efx_channel *channel)
3232		-{
3233		- return efx_nic_alloc_buffer(channel->efx, &channel->eventq.buf,
3234		- (channel->eventq_mask + 1) *
3235		- sizeof(efx_qword_t),
3236		- GFP_KERNEL);
3237		-}
3238		-
3239		-static void efx_ef10_ev_fini(struct efx_channel *channel)
3240		-{
3241		- MCDI_DECLARE_BUF(inbuf, MC_CMD_FINI_EVQ_IN_LEN);
3242		- MCDI_DECLARE_BUF_ERR(outbuf);
3243		- struct efx_nic *efx = channel->efx;
3244		- size_t outlen;
3245		- int rc;
3246		-
3247		- MCDI_SET_DWORD(inbuf, FINI_EVQ_IN_INSTANCE, channel->channel);
3248		-
3249		- rc = efx_mcdi_rpc_quiet(efx, MC_CMD_FINI_EVQ, inbuf, sizeof(inbuf),
3250		- outbuf, sizeof(outbuf), &outlen);
3251		-
3252		- if (rc && rc != -EALREADY)
3253		- goto fail;
3254		-
3255		- return;
3256		-
3257		-fail:
3258		- efx_mcdi_display_error(efx, MC_CMD_FINI_EVQ, MC_CMD_FINI_EVQ_IN_LEN,
3259		- outbuf, outlen, rc);
3260		-}
3261		-
3262	2631	static int efx_ef10_ev_init(struct efx_channel *channel)
3263	2632	{
3264		- MCDI_DECLARE_BUF(inbuf,
3265		- MC_CMD_INIT_EVQ_V2_IN_LEN(EFX_MAX_EVQ_SIZE * 8 /
3266		- EFX_BUF_SIZE));
3267		- MCDI_DECLARE_BUF(outbuf, MC_CMD_INIT_EVQ_V2_OUT_LEN);
3268		- size_t entries = channel->eventq.buf.len / EFX_BUF_SIZE;
3269	2633	struct efx_nic *efx = channel->efx;
3270	2634	struct efx_ef10_nic_data *nic_data;
3271		- size_t inlen, outlen;
3272		- unsigned int enabled, implemented;
3273		- dma_addr_t dma_addr;
3274		- int rc;
3275		- int i;
	2635	+ bool use_v2, cut_thru;
3276	2636
3277	2637	nic_data = efx->nic_data;
3278		-
3279		- /* Fill event queue with all ones (i.e. empty events) */
3280		- memset(channel->eventq.buf.addr, 0xff, channel->eventq.buf.len);
3281		-
3282		- MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_SIZE, channel->eventq_mask + 1);
3283		- MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_INSTANCE, channel->channel);
3284		- /* INIT_EVQ expects index in vector table, not absolute */
3285		- MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_IRQ_NUM, channel->channel);
3286		- MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_TMR_MODE,
3287		- MC_CMD_INIT_EVQ_IN_TMR_MODE_DIS);
3288		- MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_TMR_LOAD, 0);
3289		- MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_TMR_RELOAD, 0);
3290		- MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_COUNT_MODE,
3291		- MC_CMD_INIT_EVQ_IN_COUNT_MODE_DIS);
3292		- MCDI_SET_DWORD(inbuf, INIT_EVQ_IN_COUNT_THRSHLD, 0);
3293		-
3294		- if (nic_data->datapath_caps2 &
3295		- 1 << MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_V2_LBN) {
3296		- /* Use the new generic approach to specifying event queue
3297		- * configuration, requesting lower latency or higher throughput.
3298		- * The options that actually get used appear in the output.
3299		- */
3300		- MCDI_POPULATE_DWORD_2(inbuf, INIT_EVQ_V2_IN_FLAGS,
3301		- INIT_EVQ_V2_IN_FLAG_INTERRUPTING, 1,
3302		- INIT_EVQ_V2_IN_FLAG_TYPE,
3303		- MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_AUTO);
3304		- } else {
3305		- bool cut_thru = !(nic_data->datapath_caps &
3306		- 1 << MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_LBN);
3307		-
3308		- MCDI_POPULATE_DWORD_4(inbuf, INIT_EVQ_IN_FLAGS,
3309		- INIT_EVQ_IN_FLAG_INTERRUPTING, 1,
3310		- INIT_EVQ_IN_FLAG_RX_MERGE, 1,
3311		- INIT_EVQ_IN_FLAG_TX_MERGE, 1,
3312		- INIT_EVQ_IN_FLAG_CUT_THRU, cut_thru);
3313		- }
3314		-
3315		- dma_addr = channel->eventq.buf.dma_addr;
3316		- for (i = 0; i < entries; ++i) {
3317		- MCDI_SET_ARRAY_QWORD(inbuf, INIT_EVQ_IN_DMA_ADDR, i, dma_addr);
3318		- dma_addr += EFX_BUF_SIZE;
3319		- }
3320		-
3321		- inlen = MC_CMD_INIT_EVQ_IN_LEN(entries);
3322		-
3323		- rc = efx_mcdi_rpc(efx, MC_CMD_INIT_EVQ, inbuf, inlen,
3324		- outbuf, sizeof(outbuf), &outlen);
3325		-
3326		- if (outlen >= MC_CMD_INIT_EVQ_V2_OUT_LEN)
3327		- netif_dbg(efx, drv, efx->net_dev,
3328		- "Channel %d using event queue flags %08x\n",
3329		- channel->channel,
3330		- MCDI_DWORD(outbuf, INIT_EVQ_V2_OUT_FLAGS));
3331		-
3332		- /* IRQ return is ignored */
3333		- if (channel->channel \|\| rc)
3334		- return rc;
3335		-
3336		- /* Successfully created event queue on channel 0 */
3337		- rc = efx_mcdi_get_workarounds(efx, &implemented, &enabled);
3338		- if (rc == -ENOSYS) {
3339		- /* GET_WORKAROUNDS was implemented before this workaround,
3340		- * thus it must be unavailable in this firmware.
3341		- */
3342		- nic_data->workaround_26807 = false;
3343		- rc = 0;
3344		- } else if (rc) {
3345		- goto fail;
3346		- } else {
3347		- nic_data->workaround_26807 =
3348		- !!(enabled & MC_CMD_GET_WORKAROUNDS_OUT_BUG26807);
3349		-
3350		- if (implemented & MC_CMD_GET_WORKAROUNDS_OUT_BUG26807 &&
3351		- !nic_data->workaround_26807) {
3352		- unsigned int flags;
3353		-
3354		- rc = efx_mcdi_set_workaround(efx,
3355		- MC_CMD_WORKAROUND_BUG26807,
3356		- true, &flags);
3357		-
3358		- if (!rc) {
3359		- if (flags &
3360		- 1 << MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN) {
3361		- netif_info(efx, drv, efx->net_dev,
3362		- "other functions on NIC have been reset\n");
3363		-
3364		- /* With MCFW v4.6.x and earlier, the
3365		- * boot count will have incremented,
3366		- * so re-read the warm_boot_count
3367		- * value now to ensure this function
3368		- * doesn't think it has changed next
3369		- * time it checks.
3370		- */
3371		- rc = efx_ef10_get_warm_boot_count(efx);
3372		- if (rc >= 0) {
3373		- nic_data->warm_boot_count = rc;
3374		- rc = 0;
3375		- }
3376		- }
3377		- nic_data->workaround_26807 = true;
3378		- } else if (rc == -EPERM) {
3379		- rc = 0;
3380		- }
3381		- }
3382		- }
3383		-
3384		- if (!rc)
3385		- return 0;
3386		-
3387		-fail:
3388		- efx_ef10_ev_fini(channel);
3389		- return rc;
3390		-}
3391		-
3392		-static void efx_ef10_ev_remove(struct efx_channel *channel)
3393		-{
3394		- efx_nic_free_buffer(channel->efx, &channel->eventq.buf);
	2638	+ use_v2 = nic_data->datapath_caps2 &
	2639	+ 1 << MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_V2_LBN;
	2640	+ cut_thru = !(nic_data->datapath_caps &
	2641	+ 1 << MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_LBN);
	2642	+ return efx_mcdi_ev_init(channel, cut_thru, use_v2);
3395	2643	}
3396	2644
3397	2645	static void efx_ef10_handle_rx_wrong_queue(struct efx_rx_queue *rx_queue,
..	..	@@ -3701,8 +2949,7 @@
3701	2949
3702	2950	/* Get the transmit queue */
3703	2951	tx_ev_q_label = EFX_QWORD_FIELD(*event, ESF_DZ_TX_QLABEL);
3704		- tx_queue = efx_channel_get_tx_queue(channel,
3705		- tx_ev_q_label % EFX_TXQ_TYPES);
	2952	+ tx_queue = channel->tx_queue + (tx_ev_q_label % EFX_MAX_TXQ_PER_CHANNEL);
3706	2953
3707	2954	if (!tx_queue->timestamping) {
3708	2955	/* Transmit completion */
..	..	@@ -3712,10 +2959,23 @@
3712	2959	}
3713	2960
3714	2961	/* Transmit timestamps are only available for 8XXX series. They result
3715		- * in three events per packet. These occur in order, and are:
3716		- * - the normal completion event
	2962	+ * in up to three events per packet. These occur in order, and are:
	2963	+ * - the normal completion event (may be omitted)
3717	2964	* - the low part of the timestamp
3718	2965	* - the high part of the timestamp
	2966	+ *
	2967	+ * It's possible for multiple completion events to appear before the
	2968	+ * corresponding timestamps. So we can for example get:
	2969	+ * COMP N
	2970	+ * COMP N+1
	2971	+ * TS_LO N
	2972	+ * TS_HI N
	2973	+ * TS_LO N+1
	2974	+ * TS_HI N+1
	2975	+ *
	2976	+ * In addition it's also possible for the adjacent completions to be
	2977	+ * merged, so we may not see COMP N above. As such, the completion
	2978	+ * events are not very useful here.
3719	2979	*
3720	2980	* Each part of the timestamp is itself split across two 16 bit
3721	2981	* fields in the event.
..	..	@@ -3724,17 +2984,7 @@
3724	2984
3725	2985	switch (tx_ev_type) {
3726	2986	case TX_TIMESTAMP_EVENT_TX_EV_COMPLETION:
3727		- /* In case of Queue flush or FLR, we might have received
3728		- * the previous TX completion event but not the Timestamp
3729		- * events.
3730		- */
3731		- if (tx_queue->completed_desc_ptr != tx_queue->ptr_mask)
3732		- efx_xmit_done(tx_queue, tx_queue->completed_desc_ptr);
3733		-
3734		- tx_ev_desc_ptr = EFX_QWORD_FIELD(*event,
3735		- ESF_DZ_TX_DESCR_INDX);
3736		- tx_queue->completed_desc_ptr =
3737		- tx_ev_desc_ptr & tx_queue->ptr_mask;
	2987	+ /* Ignore this event - see above. */
3738	2988	break;
3739	2989
3740	2990	case TX_TIMESTAMP_EVENT_TX_EV_TSTAMP_LO:
..	..	@@ -3746,8 +2996,7 @@
3746	2996	ts_part = efx_ef10_extract_event_ts(event);
3747	2997	tx_queue->completed_timestamp_major = ts_part;
3748	2998
3749		- efx_xmit_done(tx_queue, tx_queue->completed_desc_ptr);
3750		- tx_queue->completed_desc_ptr = tx_queue->ptr_mask;
	2999	+ efx_xmit_done_single(tx_queue);
3751	3000	break;
3752	3001
3753	3002	default:
..	..	@@ -3947,1584 +3196,9 @@
3947	3196	netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
3948	3197	}
3949	3198
3950		-void efx_ef10_handle_drain_event(struct efx_nic *efx)
3951		-{
3952		- if (atomic_dec_and_test(&efx->active_queues))
3953		- wake_up(&efx->flush_wq);
3954		-
3955		- WARN_ON(atomic_read(&efx->active_queues) < 0);
3956		-}
3957		-
3958		-static int efx_ef10_fini_dmaq(struct efx_nic *efx)
3959		-{
3960		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
3961		- struct efx_channel *channel;
3962		- struct efx_tx_queue *tx_queue;
3963		- struct efx_rx_queue *rx_queue;
3964		- int pending;
3965		-
3966		- /* If the MC has just rebooted, the TX/RX queues will have already been
3967		- * torn down, but efx->active_queues needs to be set to zero.
3968		- */
3969		- if (nic_data->must_realloc_vis) {
3970		- atomic_set(&efx->active_queues, 0);
3971		- return 0;
3972		- }
3973		-
3974		- /* Do not attempt to write to the NIC during EEH recovery */
3975		- if (efx->state != STATE_RECOVERY) {
3976		- efx_for_each_channel(channel, efx) {
3977		- efx_for_each_channel_rx_queue(rx_queue, channel)
3978		- efx_ef10_rx_fini(rx_queue);
3979		- efx_for_each_channel_tx_queue(tx_queue, channel)
3980		- efx_ef10_tx_fini(tx_queue);
3981		- }
3982		-
3983		- wait_event_timeout(efx->flush_wq,
3984		- atomic_read(&efx->active_queues) == 0,
3985		- msecs_to_jiffies(EFX_MAX_FLUSH_TIME));
3986		- pending = atomic_read(&efx->active_queues);
3987		- if (pending) {
3988		- netif_err(efx, hw, efx->net_dev, "failed to flush %d queues\n",
3989		- pending);
3990		- return -ETIMEDOUT;
3991		- }
3992		- }
3993		-
3994		- return 0;
3995		-}
3996		-
3997	3199	static void efx_ef10_prepare_flr(struct efx_nic *efx)
3998	3200	{
3999	3201	atomic_set(&efx->active_queues, 0);
4000		-}
4001		-
4002		-/* Decide whether a filter should be exclusive or else should allow
4003		- * delivery to additional recipients. Currently we decide that
4004		- * filters for specific local unicast MAC and IP addresses are
4005		- * exclusive.
4006		- */
4007		-static bool efx_ef10_filter_is_exclusive(const struct efx_filter_spec *spec)
4008		-{
4009		- if (spec->match_flags & EFX_FILTER_MATCH_LOC_MAC &&
4010		- !is_multicast_ether_addr(spec->loc_mac))
4011		- return true;
4012		-
4013		- if ((spec->match_flags &
4014		- (EFX_FILTER_MATCH_ETHER_TYPE \| EFX_FILTER_MATCH_LOC_HOST)) ==
4015		- (EFX_FILTER_MATCH_ETHER_TYPE \| EFX_FILTER_MATCH_LOC_HOST)) {
4016		- if (spec->ether_type == htons(ETH_P_IP) &&
4017		- !ipv4_is_multicast(spec->loc_host[0]))
4018		- return true;
4019		- if (spec->ether_type == htons(ETH_P_IPV6) &&
4020		- ((const u8 *)spec->loc_host)[0] != 0xff)
4021		- return true;
4022		- }
4023		-
4024		- return false;
4025		-}
4026		-
4027		-static struct efx_filter_spec *
4028		-efx_ef10_filter_entry_spec(const struct efx_ef10_filter_table *table,
4029		- unsigned int filter_idx)
4030		-{
4031		- return (struct efx_filter_spec *)(table->entry[filter_idx].spec &
4032		- ~EFX_EF10_FILTER_FLAGS);
4033		-}
4034		-
4035		-static unsigned int
4036		-efx_ef10_filter_entry_flags(const struct efx_ef10_filter_table *table,
4037		- unsigned int filter_idx)
4038		-{
4039		- return table->entry[filter_idx].spec & EFX_EF10_FILTER_FLAGS;
4040		-}
4041		-
4042		-static void
4043		-efx_ef10_filter_set_entry(struct efx_ef10_filter_table *table,
4044		- unsigned int filter_idx,
4045		- const struct efx_filter_spec *spec,
4046		- unsigned int flags)
4047		-{
4048		- table->entry[filter_idx].spec = (unsigned long)spec \| flags;
4049		-}
4050		-
4051		-static void
4052		-efx_ef10_filter_push_prep_set_match_fields(struct efx_nic *efx,
4053		- const struct efx_filter_spec *spec,
4054		- efx_dword_t *inbuf)
4055		-{
4056		- enum efx_encap_type encap_type = efx_filter_get_encap_type(spec);
4057		- u32 match_fields = 0, uc_match, mc_match;
4058		-
4059		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_OP,
4060		- efx_ef10_filter_is_exclusive(spec) ?
4061		- MC_CMD_FILTER_OP_IN_OP_INSERT :
4062		- MC_CMD_FILTER_OP_IN_OP_SUBSCRIBE);
4063		-
4064		- /* Convert match flags and values. Unlike almost
4065		- * everything else in MCDI, these fields are in
4066		- * network byte order.
4067		- */
4068		-#define COPY_VALUE(value, mcdi_field) \
4069		- do { \
4070		- match_fields \|= \
4071		- 1 << MC_CMD_FILTER_OP_IN_MATCH_ ## \
4072		- mcdi_field ## _LBN; \
4073		- BUILD_BUG_ON( \
4074		- MC_CMD_FILTER_OP_IN_ ## mcdi_field ## _LEN < \
4075		- sizeof(value)); \
4076		- memcpy(MCDI_PTR(inbuf, FILTER_OP_IN_ ## mcdi_field), \
4077		- &value, sizeof(value)); \
4078		- } while (0)
4079		-#define COPY_FIELD(gen_flag, gen_field, mcdi_field) \
4080		- if (spec->match_flags & EFX_FILTER_MATCH_ ## gen_flag) { \
4081		- COPY_VALUE(spec->gen_field, mcdi_field); \
4082		- }
4083		- /* Handle encap filters first. They will always be mismatch
4084		- * (unknown UC or MC) filters
4085		- */
4086		- if (encap_type) {
4087		- /* ether_type and outer_ip_proto need to be variables
4088		- * because COPY_VALUE wants to memcpy them
4089		- */
4090		- __be16 ether_type =
4091		- htons(encap_type & EFX_ENCAP_FLAG_IPV6 ?
4092		- ETH_P_IPV6 : ETH_P_IP);
4093		- u8 vni_type = MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_GENEVE;
4094		- u8 outer_ip_proto;
4095		-
4096		- switch (encap_type & EFX_ENCAP_TYPES_MASK) {
4097		- case EFX_ENCAP_TYPE_VXLAN:
4098		- vni_type = MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_VXLAN;
4099		- /* fallthrough */
4100		- case EFX_ENCAP_TYPE_GENEVE:
4101		- COPY_VALUE(ether_type, ETHER_TYPE);
4102		- outer_ip_proto = IPPROTO_UDP;
4103		- COPY_VALUE(outer_ip_proto, IP_PROTO);
4104		- /* We always need to set the type field, even
4105		- * though we're not matching on the TNI.
4106		- */
4107		- MCDI_POPULATE_DWORD_1(inbuf,
4108		- FILTER_OP_EXT_IN_VNI_OR_VSID,
4109		- FILTER_OP_EXT_IN_VNI_TYPE,
4110		- vni_type);
4111		- break;
4112		- case EFX_ENCAP_TYPE_NVGRE:
4113		- COPY_VALUE(ether_type, ETHER_TYPE);
4114		- outer_ip_proto = IPPROTO_GRE;
4115		- COPY_VALUE(outer_ip_proto, IP_PROTO);
4116		- break;
4117		- default:
4118		- WARN_ON(1);
4119		- }
4120		-
4121		- uc_match = MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN;
4122		- mc_match = MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_LBN;
4123		- } else {
4124		- uc_match = MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_LBN;
4125		- mc_match = MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_LBN;
4126		- }
4127		-
4128		- if (spec->match_flags & EFX_FILTER_MATCH_LOC_MAC_IG)
4129		- match_fields \|=
4130		- is_multicast_ether_addr(spec->loc_mac) ?
4131		- 1 << mc_match :
4132		- 1 << uc_match;
4133		- COPY_FIELD(REM_HOST, rem_host, SRC_IP);
4134		- COPY_FIELD(LOC_HOST, loc_host, DST_IP);
4135		- COPY_FIELD(REM_MAC, rem_mac, SRC_MAC);
4136		- COPY_FIELD(REM_PORT, rem_port, SRC_PORT);
4137		- COPY_FIELD(LOC_MAC, loc_mac, DST_MAC);
4138		- COPY_FIELD(LOC_PORT, loc_port, DST_PORT);
4139		- COPY_FIELD(ETHER_TYPE, ether_type, ETHER_TYPE);
4140		- COPY_FIELD(INNER_VID, inner_vid, INNER_VLAN);
4141		- COPY_FIELD(OUTER_VID, outer_vid, OUTER_VLAN);
4142		- COPY_FIELD(IP_PROTO, ip_proto, IP_PROTO);
4143		-#undef COPY_FIELD
4144		-#undef COPY_VALUE
4145		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_MATCH_FIELDS,
4146		- match_fields);
4147		-}
4148		-
4149		-static void efx_ef10_filter_push_prep(struct efx_nic *efx,
4150		- const struct efx_filter_spec *spec,
4151		- efx_dword_t *inbuf, u64 handle,
4152		- struct efx_rss_context *ctx,
4153		- bool replacing)
4154		-{
4155		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
4156		- u32 flags = spec->flags;
4157		-
4158		- memset(inbuf, 0, MC_CMD_FILTER_OP_EXT_IN_LEN);
4159		-
4160		- /* If RSS filter, caller better have given us an RSS context */
4161		- if (flags & EFX_FILTER_FLAG_RX_RSS) {
4162		- /* We don't have the ability to return an error, so we'll just
4163		- * log a warning and disable RSS for the filter.
4164		- */
4165		- if (WARN_ON_ONCE(!ctx))
4166		- flags &= ~EFX_FILTER_FLAG_RX_RSS;
4167		- else if (WARN_ON_ONCE(ctx->context_id == EFX_EF10_RSS_CONTEXT_INVALID))
4168		- flags &= ~EFX_FILTER_FLAG_RX_RSS;
4169		- }
4170		-
4171		- if (replacing) {
4172		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_OP,
4173		- MC_CMD_FILTER_OP_IN_OP_REPLACE);
4174		- MCDI_SET_QWORD(inbuf, FILTER_OP_IN_HANDLE, handle);
4175		- } else {
4176		- efx_ef10_filter_push_prep_set_match_fields(efx, spec, inbuf);
4177		- }
4178		-
4179		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_PORT_ID, nic_data->vport_id);
4180		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_RX_DEST,
4181		- spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP ?
4182		- MC_CMD_FILTER_OP_IN_RX_DEST_DROP :
4183		- MC_CMD_FILTER_OP_IN_RX_DEST_HOST);
4184		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_TX_DOMAIN, 0);
4185		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_TX_DEST,
4186		- MC_CMD_FILTER_OP_IN_TX_DEST_DEFAULT);
4187		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_RX_QUEUE,
4188		- spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP ?
4189		- 0 : spec->dmaq_id);
4190		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_RX_MODE,
4191		- (flags & EFX_FILTER_FLAG_RX_RSS) ?
4192		- MC_CMD_FILTER_OP_IN_RX_MODE_RSS :
4193		- MC_CMD_FILTER_OP_IN_RX_MODE_SIMPLE);
4194		- if (flags & EFX_FILTER_FLAG_RX_RSS)
4195		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_RX_CONTEXT, ctx->context_id);
4196		-}
4197		-
4198		-static int efx_ef10_filter_push(struct efx_nic *efx,
4199		- const struct efx_filter_spec spec, u64 handle,
4200		- struct efx_rss_context *ctx, bool replacing)
4201		-{
4202		- MCDI_DECLARE_BUF(inbuf, MC_CMD_FILTER_OP_EXT_IN_LEN);
4203		- MCDI_DECLARE_BUF(outbuf, MC_CMD_FILTER_OP_EXT_OUT_LEN);
4204		- int rc;
4205		-
4206		- efx_ef10_filter_push_prep(efx, spec, inbuf, *handle, ctx, replacing);
4207		- rc = efx_mcdi_rpc(efx, MC_CMD_FILTER_OP, inbuf, sizeof(inbuf),
4208		- outbuf, sizeof(outbuf), NULL);
4209		- if (rc == 0)
4210		- *handle = MCDI_QWORD(outbuf, FILTER_OP_OUT_HANDLE);
4211		- if (rc == -ENOSPC)
4212		- rc = -EBUSY; /* to match efx_farch_filter_insert() */
4213		- return rc;
4214		-}
4215		-
4216		-static u32 efx_ef10_filter_mcdi_flags_from_spec(const struct efx_filter_spec *spec)
4217		-{
4218		- enum efx_encap_type encap_type = efx_filter_get_encap_type(spec);
4219		- unsigned int match_flags = spec->match_flags;
4220		- unsigned int uc_match, mc_match;
4221		- u32 mcdi_flags = 0;
4222		-
4223		-#define MAP_FILTER_TO_MCDI_FLAG(gen_flag, mcdi_field, encap) { \
4224		- unsigned int old_match_flags = match_flags; \
4225		- match_flags &= ~EFX_FILTER_MATCH_ ## gen_flag; \
4226		- if (match_flags != old_match_flags) \
4227		- mcdi_flags \|= \
4228		- (1 << ((encap) ? \
4229		- MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ ## \
4230		- mcdi_field ## _LBN : \
4231		- MC_CMD_FILTER_OP_EXT_IN_MATCH_ ##\
4232		- mcdi_field ## _LBN)); \
4233		- }
4234		- /* inner or outer based on encap type */
4235		- MAP_FILTER_TO_MCDI_FLAG(REM_HOST, SRC_IP, encap_type);
4236		- MAP_FILTER_TO_MCDI_FLAG(LOC_HOST, DST_IP, encap_type);
4237		- MAP_FILTER_TO_MCDI_FLAG(REM_MAC, SRC_MAC, encap_type);
4238		- MAP_FILTER_TO_MCDI_FLAG(REM_PORT, SRC_PORT, encap_type);
4239		- MAP_FILTER_TO_MCDI_FLAG(LOC_MAC, DST_MAC, encap_type);
4240		- MAP_FILTER_TO_MCDI_FLAG(LOC_PORT, DST_PORT, encap_type);
4241		- MAP_FILTER_TO_MCDI_FLAG(ETHER_TYPE, ETHER_TYPE, encap_type);
4242		- MAP_FILTER_TO_MCDI_FLAG(IP_PROTO, IP_PROTO, encap_type);
4243		- /* always outer */
4244		- MAP_FILTER_TO_MCDI_FLAG(INNER_VID, INNER_VLAN, false);
4245		- MAP_FILTER_TO_MCDI_FLAG(OUTER_VID, OUTER_VLAN, false);
4246		-#undef MAP_FILTER_TO_MCDI_FLAG
4247		-
4248		- /* special handling for encap type, and mismatch */
4249		- if (encap_type) {
4250		- match_flags &= ~EFX_FILTER_MATCH_ENCAP_TYPE;
4251		- mcdi_flags \|=
4252		- (1 << MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_LBN);
4253		- mcdi_flags \|= (1 << MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_LBN);
4254		-
4255		- uc_match = MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN;
4256		- mc_match = MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_LBN;
4257		- } else {
4258		- uc_match = MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_LBN;
4259		- mc_match = MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_LBN;
4260		- }
4261		-
4262		- if (match_flags & EFX_FILTER_MATCH_LOC_MAC_IG) {
4263		- match_flags &= ~EFX_FILTER_MATCH_LOC_MAC_IG;
4264		- mcdi_flags \|=
4265		- is_multicast_ether_addr(spec->loc_mac) ?
4266		- 1 << mc_match :
4267		- 1 << uc_match;
4268		- }
4269		-
4270		- /* Did we map them all? */
4271		- WARN_ON_ONCE(match_flags);
4272		-
4273		- return mcdi_flags;
4274		-}
4275		-
4276		-static int efx_ef10_filter_pri(struct efx_ef10_filter_table *table,
4277		- const struct efx_filter_spec *spec)
4278		-{
4279		- u32 mcdi_flags = efx_ef10_filter_mcdi_flags_from_spec(spec);
4280		- unsigned int match_pri;
4281		-
4282		- for (match_pri = 0;
4283		- match_pri < table->rx_match_count;
4284		- match_pri++)
4285		- if (table->rx_match_mcdi_flags[match_pri] == mcdi_flags)
4286		- return match_pri;
4287		-
4288		- return -EPROTONOSUPPORT;
4289		-}
4290		-
4291		-static s32 efx_ef10_filter_insert_locked(struct efx_nic *efx,
4292		- struct efx_filter_spec *spec,
4293		- bool replace_equal)
4294		-{
4295		- DECLARE_BITMAP(mc_rem_map, EFX_EF10_FILTER_SEARCH_LIMIT);
4296		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
4297		- struct efx_ef10_filter_table *table;
4298		- struct efx_filter_spec *saved_spec;
4299		- struct efx_rss_context *ctx = NULL;
4300		- unsigned int match_pri, hash;
4301		- unsigned int priv_flags;
4302		- bool rss_locked = false;
4303		- bool replacing = false;
4304		- unsigned int depth, i;
4305		- int ins_index = -1;
4306		- DEFINE_WAIT(wait);
4307		- bool is_mc_recip;
4308		- s32 rc;
4309		-
4310		- WARN_ON(!rwsem_is_locked(&efx->filter_sem));
4311		- table = efx->filter_state;
4312		- down_write(&table->lock);
4313		-
4314		- /* For now, only support RX filters */
4315		- if ((spec->flags & (EFX_FILTER_FLAG_RX \| EFX_FILTER_FLAG_TX)) !=
4316		- EFX_FILTER_FLAG_RX) {
4317		- rc = -EINVAL;
4318		- goto out_unlock;
4319		- }
4320		-
4321		- rc = efx_ef10_filter_pri(table, spec);
4322		- if (rc < 0)
4323		- goto out_unlock;
4324		- match_pri = rc;
4325		-
4326		- hash = efx_filter_spec_hash(spec);
4327		- is_mc_recip = efx_filter_is_mc_recipient(spec);
4328		- if (is_mc_recip)
4329		- bitmap_zero(mc_rem_map, EFX_EF10_FILTER_SEARCH_LIMIT);
4330		-
4331		- if (spec->flags & EFX_FILTER_FLAG_RX_RSS) {
4332		- mutex_lock(&efx->rss_lock);
4333		- rss_locked = true;
4334		- if (spec->rss_context)
4335		- ctx = efx_find_rss_context_entry(efx, spec->rss_context);
4336		- else
4337		- ctx = &efx->rss_context;
4338		- if (!ctx) {
4339		- rc = -ENOENT;
4340		- goto out_unlock;
4341		- }
4342		- if (ctx->context_id == EFX_EF10_RSS_CONTEXT_INVALID) {
4343		- rc = -EOPNOTSUPP;
4344		- goto out_unlock;
4345		- }
4346		- }
4347		-
4348		- /* Find any existing filters with the same match tuple or
4349		- * else a free slot to insert at.
4350		- */
4351		- for (depth = 1; depth < EFX_EF10_FILTER_SEARCH_LIMIT; depth++) {
4352		- i = (hash + depth) & (HUNT_FILTER_TBL_ROWS - 1);
4353		- saved_spec = efx_ef10_filter_entry_spec(table, i);
4354		-
4355		- if (!saved_spec) {
4356		- if (ins_index < 0)
4357		- ins_index = i;
4358		- } else if (efx_filter_spec_equal(spec, saved_spec)) {
4359		- if (spec->priority < saved_spec->priority &&
4360		- spec->priority != EFX_FILTER_PRI_AUTO) {
4361		- rc = -EPERM;
4362		- goto out_unlock;
4363		- }
4364		- if (!is_mc_recip) {
4365		- /* This is the only one */
4366		- if (spec->priority ==
4367		- saved_spec->priority &&
4368		- !replace_equal) {
4369		- rc = -EEXIST;
4370		- goto out_unlock;
4371		- }
4372		- ins_index = i;
4373		- break;
4374		- } else if (spec->priority >
4375		- saved_spec->priority \|\|
4376		- (spec->priority ==
4377		- saved_spec->priority &&
4378		- replace_equal)) {
4379		- if (ins_index < 0)
4380		- ins_index = i;
4381		- else
4382		- __set_bit(depth, mc_rem_map);
4383		- }
4384		- }
4385		- }
4386		-
4387		- /* Once we reach the maximum search depth, use the first suitable
4388		- * slot, or return -EBUSY if there was none
4389		- */
4390		- if (ins_index < 0) {
4391		- rc = -EBUSY;
4392		- goto out_unlock;
4393		- }
4394		-
4395		- /* Create a software table entry if necessary. */
4396		- saved_spec = efx_ef10_filter_entry_spec(table, ins_index);
4397		- if (saved_spec) {
4398		- if (spec->priority == EFX_FILTER_PRI_AUTO &&
4399		- saved_spec->priority >= EFX_FILTER_PRI_AUTO) {
4400		- /* Just make sure it won't be removed */
4401		- if (saved_spec->priority > EFX_FILTER_PRI_AUTO)
4402		- saved_spec->flags \|= EFX_FILTER_FLAG_RX_OVER_AUTO;
4403		- table->entry[ins_index].spec &=
4404		- ~EFX_EF10_FILTER_FLAG_AUTO_OLD;
4405		- rc = ins_index;
4406		- goto out_unlock;
4407		- }
4408		- replacing = true;
4409		- priv_flags = efx_ef10_filter_entry_flags(table, ins_index);
4410		- } else {
4411		- saved_spec = kmalloc(sizeof(*spec), GFP_ATOMIC);
4412		- if (!saved_spec) {
4413		- rc = -ENOMEM;
4414		- goto out_unlock;
4415		- }
4416		- saved_spec = spec;
4417		- priv_flags = 0;
4418		- }
4419		- efx_ef10_filter_set_entry(table, ins_index, saved_spec, priv_flags);
4420		-
4421		- /* Actually insert the filter on the HW */
4422		- rc = efx_ef10_filter_push(efx, spec, &table->entry[ins_index].handle,
4423		- ctx, replacing);
4424		-
4425		- if (rc == -EINVAL && nic_data->must_realloc_vis)
4426		- /* The MC rebooted under us, causing it to reject our filter
4427		- * insertion as pointing to an invalid VI (spec->dmaq_id).
4428		- */
4429		- rc = -EAGAIN;
4430		-
4431		- /* Finalise the software table entry */
4432		- if (rc == 0) {
4433		- if (replacing) {
4434		- /* Update the fields that may differ */
4435		- if (saved_spec->priority == EFX_FILTER_PRI_AUTO)
4436		- saved_spec->flags \|=
4437		- EFX_FILTER_FLAG_RX_OVER_AUTO;
4438		- saved_spec->priority = spec->priority;
4439		- saved_spec->flags &= EFX_FILTER_FLAG_RX_OVER_AUTO;
4440		- saved_spec->flags \|= spec->flags;
4441		- saved_spec->rss_context = spec->rss_context;
4442		- saved_spec->dmaq_id = spec->dmaq_id;
4443		- }
4444		- } else if (!replacing) {
4445		- kfree(saved_spec);
4446		- saved_spec = NULL;
4447		- } else {
4448		- /* We failed to replace, so the old filter is still present.
4449		- * Roll back the software table to reflect this. In fact the
4450		- * efx_ef10_filter_set_entry() call below will do the right
4451		- * thing, so nothing extra is needed here.
4452		- */
4453		- }
4454		- efx_ef10_filter_set_entry(table, ins_index, saved_spec, priv_flags);
4455		-
4456		- /* Remove and finalise entries for lower-priority multicast
4457		- * recipients
4458		- */
4459		- if (is_mc_recip) {
4460		- MCDI_DECLARE_BUF(inbuf, MC_CMD_FILTER_OP_EXT_IN_LEN);
4461		- unsigned int depth, i;
4462		-
4463		- memset(inbuf, 0, sizeof(inbuf));
4464		-
4465		- for (depth = 0; depth < EFX_EF10_FILTER_SEARCH_LIMIT; depth++) {
4466		- if (!test_bit(depth, mc_rem_map))
4467		- continue;
4468		-
4469		- i = (hash + depth) & (HUNT_FILTER_TBL_ROWS - 1);
4470		- saved_spec = efx_ef10_filter_entry_spec(table, i);
4471		- priv_flags = efx_ef10_filter_entry_flags(table, i);
4472		-
4473		- if (rc == 0) {
4474		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_OP,
4475		- MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE);
4476		- MCDI_SET_QWORD(inbuf, FILTER_OP_IN_HANDLE,
4477		- table->entry[i].handle);
4478		- rc = efx_mcdi_rpc(efx, MC_CMD_FILTER_OP,
4479		- inbuf, sizeof(inbuf),
4480		- NULL, 0, NULL);
4481		- }
4482		-
4483		- if (rc == 0) {
4484		- kfree(saved_spec);
4485		- saved_spec = NULL;
4486		- priv_flags = 0;
4487		- }
4488		- efx_ef10_filter_set_entry(table, i, saved_spec,
4489		- priv_flags);
4490		- }
4491		- }
4492		-
4493		- /* If successful, return the inserted filter ID */
4494		- if (rc == 0)
4495		- rc = efx_ef10_make_filter_id(match_pri, ins_index);
4496		-
4497		-out_unlock:
4498		- if (rss_locked)
4499		- mutex_unlock(&efx->rss_lock);
4500		- up_write(&table->lock);
4501		- return rc;
4502		-}
4503		-
4504		-static s32 efx_ef10_filter_insert(struct efx_nic *efx,
4505		- struct efx_filter_spec *spec,
4506		- bool replace_equal)
4507		-{
4508		- s32 ret;
4509		-
4510		- down_read(&efx->filter_sem);
4511		- ret = efx_ef10_filter_insert_locked(efx, spec, replace_equal);
4512		- up_read(&efx->filter_sem);
4513		-
4514		- return ret;
4515		-}
4516		-
4517		-static void efx_ef10_filter_update_rx_scatter(struct efx_nic *efx)
4518		-{
4519		- /* no need to do anything here on EF10 */
4520		-}
4521		-
4522		-/* Remove a filter.
4523		- * If !by_index, remove by ID
4524		- * If by_index, remove by index
4525		- * Filter ID may come from userland and must be range-checked.
4526		- * Caller must hold efx->filter_sem for read, and efx->filter_state->lock
4527		- * for write.
4528		- */
4529		-static int efx_ef10_filter_remove_internal(struct efx_nic *efx,
4530		- unsigned int priority_mask,
4531		- u32 filter_id, bool by_index)
4532		-{
4533		- unsigned int filter_idx = efx_ef10_filter_get_unsafe_id(filter_id);
4534		- struct efx_ef10_filter_table *table = efx->filter_state;
4535		- MCDI_DECLARE_BUF(inbuf,
4536		- MC_CMD_FILTER_OP_IN_HANDLE_OFST +
4537		- MC_CMD_FILTER_OP_IN_HANDLE_LEN);
4538		- struct efx_filter_spec *spec;
4539		- DEFINE_WAIT(wait);
4540		- int rc;
4541		-
4542		- spec = efx_ef10_filter_entry_spec(table, filter_idx);
4543		- if (!spec \|\|
4544		- (!by_index &&
4545		- efx_ef10_filter_pri(table, spec) !=
4546		- efx_ef10_filter_get_unsafe_pri(filter_id)))
4547		- return -ENOENT;
4548		-
4549		- if (spec->flags & EFX_FILTER_FLAG_RX_OVER_AUTO &&
4550		- priority_mask == (1U << EFX_FILTER_PRI_AUTO)) {
4551		- /* Just remove flags */
4552		- spec->flags &= ~EFX_FILTER_FLAG_RX_OVER_AUTO;
4553		- table->entry[filter_idx].spec &= ~EFX_EF10_FILTER_FLAG_AUTO_OLD;
4554		- return 0;
4555		- }
4556		-
4557		- if (!(priority_mask & (1U << spec->priority)))
4558		- return -ENOENT;
4559		-
4560		- if (spec->flags & EFX_FILTER_FLAG_RX_OVER_AUTO) {
4561		- /* Reset to an automatic filter */
4562		-
4563		- struct efx_filter_spec new_spec = *spec;
4564		-
4565		- new_spec.priority = EFX_FILTER_PRI_AUTO;
4566		- new_spec.flags = (EFX_FILTER_FLAG_RX \|
4567		- (efx_rss_active(&efx->rss_context) ?
4568		- EFX_FILTER_FLAG_RX_RSS : 0));
4569		- new_spec.dmaq_id = 0;
4570		- new_spec.rss_context = 0;
4571		- rc = efx_ef10_filter_push(efx, &new_spec,
4572		- &table->entry[filter_idx].handle,
4573		- &efx->rss_context,
4574		- true);
4575		-
4576		- if (rc == 0)
4577		- *spec = new_spec;
4578		- } else {
4579		- /* Really remove the filter */
4580		-
4581		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_OP,
4582		- efx_ef10_filter_is_exclusive(spec) ?
4583		- MC_CMD_FILTER_OP_IN_OP_REMOVE :
4584		- MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE);
4585		- MCDI_SET_QWORD(inbuf, FILTER_OP_IN_HANDLE,
4586		- table->entry[filter_idx].handle);
4587		- rc = efx_mcdi_rpc_quiet(efx, MC_CMD_FILTER_OP,
4588		- inbuf, sizeof(inbuf), NULL, 0, NULL);
4589		-
4590		- if ((rc == 0) \|\| (rc == -ENOENT)) {
4591		- /* Filter removed OK or didn't actually exist */
4592		- kfree(spec);
4593		- efx_ef10_filter_set_entry(table, filter_idx, NULL, 0);
4594		- } else {
4595		- efx_mcdi_display_error(efx, MC_CMD_FILTER_OP,
4596		- MC_CMD_FILTER_OP_EXT_IN_LEN,
4597		- NULL, 0, rc);
4598		- }
4599		- }
4600		-
4601		- return rc;
4602		-}
4603		-
4604		-static int efx_ef10_filter_remove_safe(struct efx_nic *efx,
4605		- enum efx_filter_priority priority,
4606		- u32 filter_id)
4607		-{
4608		- struct efx_ef10_filter_table *table;
4609		- int rc;
4610		-
4611		- down_read(&efx->filter_sem);
4612		- table = efx->filter_state;
4613		- down_write(&table->lock);
4614		- rc = efx_ef10_filter_remove_internal(efx, 1U << priority, filter_id,
4615		- false);
4616		- up_write(&table->lock);
4617		- up_read(&efx->filter_sem);
4618		- return rc;
4619		-}
4620		-
4621		-/* Caller must hold efx->filter_sem for read */
4622		-static void efx_ef10_filter_remove_unsafe(struct efx_nic *efx,
4623		- enum efx_filter_priority priority,
4624		- u32 filter_id)
4625		-{
4626		- struct efx_ef10_filter_table *table = efx->filter_state;
4627		-
4628		- if (filter_id == EFX_EF10_FILTER_ID_INVALID)
4629		- return;
4630		-
4631		- down_write(&table->lock);
4632		- efx_ef10_filter_remove_internal(efx, 1U << priority, filter_id,
4633		- true);
4634		- up_write(&table->lock);
4635		-}
4636		-
4637		-static int efx_ef10_filter_get_safe(struct efx_nic *efx,
4638		- enum efx_filter_priority priority,
4639		- u32 filter_id, struct efx_filter_spec *spec)
4640		-{
4641		- unsigned int filter_idx = efx_ef10_filter_get_unsafe_id(filter_id);
4642		- const struct efx_filter_spec *saved_spec;
4643		- struct efx_ef10_filter_table *table;
4644		- int rc;
4645		-
4646		- down_read(&efx->filter_sem);
4647		- table = efx->filter_state;
4648		- down_read(&table->lock);
4649		- saved_spec = efx_ef10_filter_entry_spec(table, filter_idx);
4650		- if (saved_spec && saved_spec->priority == priority &&
4651		- efx_ef10_filter_pri(table, saved_spec) ==
4652		- efx_ef10_filter_get_unsafe_pri(filter_id)) {
4653		- spec = saved_spec;
4654		- rc = 0;
4655		- } else {
4656		- rc = -ENOENT;
4657		- }
4658		- up_read(&table->lock);
4659		- up_read(&efx->filter_sem);
4660		- return rc;
4661		-}
4662		-
4663		-static int efx_ef10_filter_clear_rx(struct efx_nic *efx,
4664		- enum efx_filter_priority priority)
4665		-{
4666		- struct efx_ef10_filter_table *table;
4667		- unsigned int priority_mask;
4668		- unsigned int i;
4669		- int rc;
4670		-
4671		- priority_mask = (((1U << (priority + 1)) - 1) &
4672		- ~(1U << EFX_FILTER_PRI_AUTO));
4673		-
4674		- down_read(&efx->filter_sem);
4675		- table = efx->filter_state;
4676		- down_write(&table->lock);
4677		- for (i = 0; i < HUNT_FILTER_TBL_ROWS; i++) {
4678		- rc = efx_ef10_filter_remove_internal(efx, priority_mask,
4679		- i, true);
4680		- if (rc && rc != -ENOENT)
4681		- break;
4682		- rc = 0;
4683		- }
4684		-
4685		- up_write(&table->lock);
4686		- up_read(&efx->filter_sem);
4687		- return rc;
4688		-}
4689		-
4690		-static u32 efx_ef10_filter_count_rx_used(struct efx_nic *efx,
4691		- enum efx_filter_priority priority)
4692		-{
4693		- struct efx_ef10_filter_table *table;
4694		- unsigned int filter_idx;
4695		- s32 count = 0;
4696		-
4697		- down_read(&efx->filter_sem);
4698		- table = efx->filter_state;
4699		- down_read(&table->lock);
4700		- for (filter_idx = 0; filter_idx < HUNT_FILTER_TBL_ROWS; filter_idx++) {
4701		- if (table->entry[filter_idx].spec &&
4702		- efx_ef10_filter_entry_spec(table, filter_idx)->priority ==
4703		- priority)
4704		- ++count;
4705		- }
4706		- up_read(&table->lock);
4707		- up_read(&efx->filter_sem);
4708		- return count;
4709		-}
4710		-
4711		-static u32 efx_ef10_filter_get_rx_id_limit(struct efx_nic *efx)
4712		-{
4713		- struct efx_ef10_filter_table *table = efx->filter_state;
4714		-
4715		- return table->rx_match_count * HUNT_FILTER_TBL_ROWS * 2;
4716		-}
4717		-
4718		-static s32 efx_ef10_filter_get_rx_ids(struct efx_nic *efx,
4719		- enum efx_filter_priority priority,
4720		- u32 *buf, u32 size)
4721		-{
4722		- struct efx_ef10_filter_table *table;
4723		- struct efx_filter_spec *spec;
4724		- unsigned int filter_idx;
4725		- s32 count = 0;
4726		-
4727		- down_read(&efx->filter_sem);
4728		- table = efx->filter_state;
4729		- down_read(&table->lock);
4730		-
4731		- for (filter_idx = 0; filter_idx < HUNT_FILTER_TBL_ROWS; filter_idx++) {
4732		- spec = efx_ef10_filter_entry_spec(table, filter_idx);
4733		- if (spec && spec->priority == priority) {
4734		- if (count == size) {
4735		- count = -EMSGSIZE;
4736		- break;
4737		- }
4738		- buf[count++] =
4739		- efx_ef10_make_filter_id(
4740		- efx_ef10_filter_pri(table, spec),
4741		- filter_idx);
4742		- }
4743		- }
4744		- up_read(&table->lock);
4745		- up_read(&efx->filter_sem);
4746		- return count;
4747		-}
4748		-
4749		-#ifdef CONFIG_RFS_ACCEL
4750		-
4751		-static bool efx_ef10_filter_rfs_expire_one(struct efx_nic *efx, u32 flow_id,
4752		- unsigned int filter_idx)
4753		-{
4754		- struct efx_filter_spec *spec, saved_spec;
4755		- struct efx_ef10_filter_table *table;
4756		- struct efx_arfs_rule *rule = NULL;
4757		- bool ret = true, force = false;
4758		- u16 arfs_id;
4759		-
4760		- down_read(&efx->filter_sem);
4761		- table = efx->filter_state;
4762		- down_write(&table->lock);
4763		- spec = efx_ef10_filter_entry_spec(table, filter_idx);
4764		-
4765		- if (!spec \|\| spec->priority != EFX_FILTER_PRI_HINT)
4766		- goto out_unlock;
4767		-
4768		- spin_lock_bh(&efx->rps_hash_lock);
4769		- if (!efx->rps_hash_table) {
4770		- /* In the absence of the table, we always return 0 to ARFS. */
4771		- arfs_id = 0;
4772		- } else {
4773		- rule = efx_rps_hash_find(efx, spec);
4774		- if (!rule)
4775		- /* ARFS table doesn't know of this filter, so remove it */
4776		- goto expire;
4777		- arfs_id = rule->arfs_id;
4778		- ret = efx_rps_check_rule(rule, filter_idx, &force);
4779		- if (force)
4780		- goto expire;
4781		- if (!ret) {
4782		- spin_unlock_bh(&efx->rps_hash_lock);
4783		- goto out_unlock;
4784		- }
4785		- }
4786		- if (!rps_may_expire_flow(efx->net_dev, spec->dmaq_id, flow_id, arfs_id))
4787		- ret = false;
4788		- else if (rule)
4789		- rule->filter_id = EFX_ARFS_FILTER_ID_REMOVING;
4790		-expire:
4791		- saved_spec = spec; / remove operation will kfree spec */
4792		- spin_unlock_bh(&efx->rps_hash_lock);
4793		- /* At this point (since we dropped the lock), another thread might queue
4794		- * up a fresh insertion request (but the actual insertion will be held
4795		- * up by our possession of the filter table lock). In that case, it
4796		- * will set rule->filter_id to EFX_ARFS_FILTER_ID_PENDING, meaning that
4797		- * the rule is not removed by efx_rps_hash_del() below.
4798		- */
4799		- if (ret)
4800		- ret = efx_ef10_filter_remove_internal(efx, 1U << spec->priority,
4801		- filter_idx, true) == 0;
4802		- /* While we can't safely dereference rule (we dropped the lock), we can
4803		- * still test it for NULL.
4804		- */
4805		- if (ret && rule) {
4806		- /* Expiring, so remove entry from ARFS table */
4807		- spin_lock_bh(&efx->rps_hash_lock);
4808		- efx_rps_hash_del(efx, &saved_spec);
4809		- spin_unlock_bh(&efx->rps_hash_lock);
4810		- }
4811		-out_unlock:
4812		- up_write(&table->lock);
4813		- up_read(&efx->filter_sem);
4814		- return ret;
4815		-}
4816		-
4817		-#endif /* CONFIG_RFS_ACCEL */
4818		-
4819		-static int efx_ef10_filter_match_flags_from_mcdi(bool encap, u32 mcdi_flags)
4820		-{
4821		- int match_flags = 0;
4822		-
4823		-#define MAP_FLAG(gen_flag, mcdi_field) do { \
4824		- u32 old_mcdi_flags = mcdi_flags; \
4825		- mcdi_flags &= ~(1 << MC_CMD_FILTER_OP_EXT_IN_MATCH_ ## \
4826		- mcdi_field ## _LBN); \
4827		- if (mcdi_flags != old_mcdi_flags) \
4828		- match_flags \|= EFX_FILTER_MATCH_ ## gen_flag; \
4829		- } while (0)
4830		-
4831		- if (encap) {
4832		- /* encap filters must specify encap type */
4833		- match_flags \|= EFX_FILTER_MATCH_ENCAP_TYPE;
4834		- /* and imply ethertype and ip proto */
4835		- mcdi_flags &=
4836		- ~(1 << MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_LBN);
4837		- mcdi_flags &=
4838		- ~(1 << MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_LBN);
4839		- /* VLAN tags refer to the outer packet */
4840		- MAP_FLAG(INNER_VID, INNER_VLAN);
4841		- MAP_FLAG(OUTER_VID, OUTER_VLAN);
4842		- /* everything else refers to the inner packet */
4843		- MAP_FLAG(LOC_MAC_IG, IFRM_UNKNOWN_UCAST_DST);
4844		- MAP_FLAG(LOC_MAC_IG, IFRM_UNKNOWN_MCAST_DST);
4845		- MAP_FLAG(REM_HOST, IFRM_SRC_IP);
4846		- MAP_FLAG(LOC_HOST, IFRM_DST_IP);
4847		- MAP_FLAG(REM_MAC, IFRM_SRC_MAC);
4848		- MAP_FLAG(REM_PORT, IFRM_SRC_PORT);
4849		- MAP_FLAG(LOC_MAC, IFRM_DST_MAC);
4850		- MAP_FLAG(LOC_PORT, IFRM_DST_PORT);
4851		- MAP_FLAG(ETHER_TYPE, IFRM_ETHER_TYPE);
4852		- MAP_FLAG(IP_PROTO, IFRM_IP_PROTO);
4853		- } else {
4854		- MAP_FLAG(LOC_MAC_IG, UNKNOWN_UCAST_DST);
4855		- MAP_FLAG(LOC_MAC_IG, UNKNOWN_MCAST_DST);
4856		- MAP_FLAG(REM_HOST, SRC_IP);
4857		- MAP_FLAG(LOC_HOST, DST_IP);
4858		- MAP_FLAG(REM_MAC, SRC_MAC);
4859		- MAP_FLAG(REM_PORT, SRC_PORT);
4860		- MAP_FLAG(LOC_MAC, DST_MAC);
4861		- MAP_FLAG(LOC_PORT, DST_PORT);
4862		- MAP_FLAG(ETHER_TYPE, ETHER_TYPE);
4863		- MAP_FLAG(INNER_VID, INNER_VLAN);
4864		- MAP_FLAG(OUTER_VID, OUTER_VLAN);
4865		- MAP_FLAG(IP_PROTO, IP_PROTO);
4866		- }
4867		-#undef MAP_FLAG
4868		-
4869		- /* Did we map them all? */
4870		- if (mcdi_flags)
4871		- return -EINVAL;
4872		-
4873		- return match_flags;
4874		-}
4875		-
4876		-static void efx_ef10_filter_cleanup_vlans(struct efx_nic *efx)
4877		-{
4878		- struct efx_ef10_filter_table *table = efx->filter_state;
4879		- struct efx_ef10_filter_vlan vlan, next_vlan;
4880		-
4881		- /* See comment in efx_ef10_filter_table_remove() */
4882		- if (!efx_rwsem_assert_write_locked(&efx->filter_sem))
4883		- return;
4884		-
4885		- if (!table)
4886		- return;
4887		-
4888		- list_for_each_entry_safe(vlan, next_vlan, &table->vlan_list, list)
4889		- efx_ef10_filter_del_vlan_internal(efx, vlan);
4890		-}
4891		-
4892		-static bool efx_ef10_filter_match_supported(struct efx_ef10_filter_table *table,
4893		- bool encap,
4894		- enum efx_filter_match_flags match_flags)
4895		-{
4896		- unsigned int match_pri;
4897		- int mf;
4898		-
4899		- for (match_pri = 0;
4900		- match_pri < table->rx_match_count;
4901		- match_pri++) {
4902		- mf = efx_ef10_filter_match_flags_from_mcdi(encap,
4903		- table->rx_match_mcdi_flags[match_pri]);
4904		- if (mf == match_flags)
4905		- return true;
4906		- }
4907		-
4908		- return false;
4909		-}
4910		-
4911		-static int
4912		-efx_ef10_filter_table_probe_matches(struct efx_nic *efx,
4913		- struct efx_ef10_filter_table *table,
4914		- bool encap)
4915		-{
4916		- MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_PARSER_DISP_INFO_IN_LEN);
4917		- MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX);
4918		- unsigned int pd_match_pri, pd_match_count;
4919		- size_t outlen;
4920		- int rc;
4921		-
4922		- /* Find out which RX filter types are supported, and their priorities */
4923		- MCDI_SET_DWORD(inbuf, GET_PARSER_DISP_INFO_IN_OP,
4924		- encap ?
4925		- MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_ENCAP_RX_MATCHES :
4926		- MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_RX_MATCHES);
4927		- rc = efx_mcdi_rpc(efx, MC_CMD_GET_PARSER_DISP_INFO,
4928		- inbuf, sizeof(inbuf), outbuf, sizeof(outbuf),
4929		- &outlen);
4930		- if (rc)
4931		- return rc;
4932		-
4933		- pd_match_count = MCDI_VAR_ARRAY_LEN(
4934		- outlen, GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES);
4935		-
4936		- for (pd_match_pri = 0; pd_match_pri < pd_match_count; pd_match_pri++) {
4937		- u32 mcdi_flags =
4938		- MCDI_ARRAY_DWORD(
4939		- outbuf,
4940		- GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES,
4941		- pd_match_pri);
4942		- rc = efx_ef10_filter_match_flags_from_mcdi(encap, mcdi_flags);
4943		- if (rc < 0) {
4944		- netif_dbg(efx, probe, efx->net_dev,
4945		- "%s: fw flags %#x pri %u not supported in driver\n",
4946		- __func__, mcdi_flags, pd_match_pri);
4947		- } else {
4948		- netif_dbg(efx, probe, efx->net_dev,
4949		- "%s: fw flags %#x pri %u supported as driver flags %#x pri %u\n",
4950		- __func__, mcdi_flags, pd_match_pri,
4951		- rc, table->rx_match_count);
4952		- table->rx_match_mcdi_flags[table->rx_match_count] = mcdi_flags;
4953		- table->rx_match_count++;
4954		- }
4955		- }
4956		-
4957		- return 0;
4958		-}
4959		-
4960		-static int efx_ef10_filter_table_probe(struct efx_nic *efx)
4961		-{
4962		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
4963		- struct net_device *net_dev = efx->net_dev;
4964		- struct efx_ef10_filter_table *table;
4965		- struct efx_ef10_vlan *vlan;
4966		- int rc;
4967		-
4968		- if (!efx_rwsem_assert_write_locked(&efx->filter_sem))
4969		- return -EINVAL;
4970		-
4971		- if (efx->filter_state) /* already probed */
4972		- return 0;
4973		-
4974		- table = kzalloc(sizeof(*table), GFP_KERNEL);
4975		- if (!table)
4976		- return -ENOMEM;
4977		-
4978		- table->rx_match_count = 0;
4979		- rc = efx_ef10_filter_table_probe_matches(efx, table, false);
4980		- if (rc)
4981		- goto fail;
4982		- if (nic_data->datapath_caps &
4983		- (1 << MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN))
4984		- rc = efx_ef10_filter_table_probe_matches(efx, table, true);
4985		- if (rc)
4986		- goto fail;
4987		- if ((efx_supported_features(efx) & NETIF_F_HW_VLAN_CTAG_FILTER) &&
4988		- !(efx_ef10_filter_match_supported(table, false,
4989		- (EFX_FILTER_MATCH_OUTER_VID \| EFX_FILTER_MATCH_LOC_MAC)) &&
4990		- efx_ef10_filter_match_supported(table, false,
4991		- (EFX_FILTER_MATCH_OUTER_VID \| EFX_FILTER_MATCH_LOC_MAC_IG)))) {
4992		- netif_info(efx, probe, net_dev,
4993		- "VLAN filters are not supported in this firmware variant\n");
4994		- net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4995		- efx->fixed_features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4996		- net_dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4997		- }
4998		-
4999		- table->entry = vzalloc(array_size(HUNT_FILTER_TBL_ROWS,
5000		- sizeof(*table->entry)));
5001		- if (!table->entry) {
5002		- rc = -ENOMEM;
5003		- goto fail;
5004		- }
5005		-
5006		- table->mc_promisc_last = false;
5007		- table->vlan_filter =
5008		- !!(efx->net_dev->features & NETIF_F_HW_VLAN_CTAG_FILTER);
5009		- INIT_LIST_HEAD(&table->vlan_list);
5010		- init_rwsem(&table->lock);
5011		-
5012		- efx->filter_state = table;
5013		-
5014		- list_for_each_entry(vlan, &nic_data->vlan_list, list) {
5015		- rc = efx_ef10_filter_add_vlan(efx, vlan->vid);
5016		- if (rc)
5017		- goto fail_add_vlan;
5018		- }
5019		-
5020		- return 0;
5021		-
5022		-fail_add_vlan:
5023		- efx_ef10_filter_cleanup_vlans(efx);
5024		- efx->filter_state = NULL;
5025		-fail:
5026		- kfree(table);
5027		- return rc;
5028		-}
5029		-
5030		-/* Caller must hold efx->filter_sem for read if race against
5031		- * efx_ef10_filter_table_remove() is possible
5032		- */
5033		-static void efx_ef10_filter_table_restore(struct efx_nic *efx)
5034		-{
5035		- struct efx_ef10_filter_table *table = efx->filter_state;
5036		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
5037		- unsigned int invalid_filters = 0, failed = 0;
5038		- struct efx_ef10_filter_vlan *vlan;
5039		- struct efx_filter_spec *spec;
5040		- struct efx_rss_context *ctx;
5041		- unsigned int filter_idx;
5042		- u32 mcdi_flags;
5043		- int match_pri;
5044		- int rc, i;
5045		-
5046		- WARN_ON(!rwsem_is_locked(&efx->filter_sem));
5047		-
5048		- if (!nic_data->must_restore_filters)
5049		- return;
5050		-
5051		- if (!table)
5052		- return;
5053		-
5054		- down_write(&table->lock);
5055		- mutex_lock(&efx->rss_lock);
5056		-
5057		- for (filter_idx = 0; filter_idx < HUNT_FILTER_TBL_ROWS; filter_idx++) {
5058		- spec = efx_ef10_filter_entry_spec(table, filter_idx);
5059		- if (!spec)
5060		- continue;
5061		-
5062		- mcdi_flags = efx_ef10_filter_mcdi_flags_from_spec(spec);
5063		- match_pri = 0;
5064		- while (match_pri < table->rx_match_count &&
5065		- table->rx_match_mcdi_flags[match_pri] != mcdi_flags)
5066		- ++match_pri;
5067		- if (match_pri >= table->rx_match_count) {
5068		- invalid_filters++;
5069		- goto not_restored;
5070		- }
5071		- if (spec->rss_context)
5072		- ctx = efx_find_rss_context_entry(efx, spec->rss_context);
5073		- else
5074		- ctx = &efx->rss_context;
5075		- if (spec->flags & EFX_FILTER_FLAG_RX_RSS) {
5076		- if (!ctx) {
5077		- netif_warn(efx, drv, efx->net_dev,
5078		- "Warning: unable to restore a filter with nonexistent RSS context %u.\n",
5079		- spec->rss_context);
5080		- invalid_filters++;
5081		- goto not_restored;
5082		- }
5083		- if (ctx->context_id == EFX_EF10_RSS_CONTEXT_INVALID) {
5084		- netif_warn(efx, drv, efx->net_dev,
5085		- "Warning: unable to restore a filter with RSS context %u as it was not created.\n",
5086		- spec->rss_context);
5087		- invalid_filters++;
5088		- goto not_restored;
5089		- }
5090		- }
5091		-
5092		- rc = efx_ef10_filter_push(efx, spec,
5093		- &table->entry[filter_idx].handle,
5094		- ctx, false);
5095		- if (rc)
5096		- failed++;
5097		-
5098		- if (rc) {
5099		-not_restored:
5100		- list_for_each_entry(vlan, &table->vlan_list, list)
5101		- for (i = 0; i < EFX_EF10_NUM_DEFAULT_FILTERS; ++i)
5102		- if (vlan->default_filters[i] == filter_idx)
5103		- vlan->default_filters[i] =
5104		- EFX_EF10_FILTER_ID_INVALID;
5105		-
5106		- kfree(spec);
5107		- efx_ef10_filter_set_entry(table, filter_idx, NULL, 0);
5108		- }
5109		- }
5110		-
5111		- mutex_unlock(&efx->rss_lock);
5112		- up_write(&table->lock);
5113		-
5114		- /* This can happen validly if the MC's capabilities have changed, so
5115		- * is not an error.
5116		- */
5117		- if (invalid_filters)
5118		- netif_dbg(efx, drv, efx->net_dev,
5119		- "Did not restore %u filters that are now unsupported.\n",
5120		- invalid_filters);
5121		-
5122		- if (failed)
5123		- netif_err(efx, hw, efx->net_dev,
5124		- "unable to restore %u filters\n", failed);
5125		- else
5126		- nic_data->must_restore_filters = false;
5127		-}
5128		-
5129		-static void efx_ef10_filter_table_remove(struct efx_nic *efx)
5130		-{
5131		- struct efx_ef10_filter_table *table = efx->filter_state;
5132		- MCDI_DECLARE_BUF(inbuf, MC_CMD_FILTER_OP_EXT_IN_LEN);
5133		- struct efx_filter_spec *spec;
5134		- unsigned int filter_idx;
5135		- int rc;
5136		-
5137		- efx_ef10_filter_cleanup_vlans(efx);
5138		- efx->filter_state = NULL;
5139		- /* If we were called without locking, then it's not safe to free
5140		- * the table as others might be using it. So we just WARN, leak
5141		- * the memory, and potentially get an inconsistent filter table
5142		- * state.
5143		- * This should never actually happen.
5144		- */
5145		- if (!efx_rwsem_assert_write_locked(&efx->filter_sem))
5146		- return;
5147		-
5148		- if (!table)
5149		- return;
5150		-
5151		- for (filter_idx = 0; filter_idx < HUNT_FILTER_TBL_ROWS; filter_idx++) {
5152		- spec = efx_ef10_filter_entry_spec(table, filter_idx);
5153		- if (!spec)
5154		- continue;
5155		-
5156		- MCDI_SET_DWORD(inbuf, FILTER_OP_IN_OP,
5157		- efx_ef10_filter_is_exclusive(spec) ?
5158		- MC_CMD_FILTER_OP_IN_OP_REMOVE :
5159		- MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE);
5160		- MCDI_SET_QWORD(inbuf, FILTER_OP_IN_HANDLE,
5161		- table->entry[filter_idx].handle);
5162		- rc = efx_mcdi_rpc_quiet(efx, MC_CMD_FILTER_OP, inbuf,
5163		- sizeof(inbuf), NULL, 0, NULL);
5164		- if (rc)
5165		- netif_info(efx, drv, efx->net_dev,
5166		- "%s: filter %04x remove failed\n",
5167		- __func__, filter_idx);
5168		- kfree(spec);
5169		- }
5170		-
5171		- vfree(table->entry);
5172		- kfree(table);
5173		-}
5174		-
5175		-static void efx_ef10_filter_mark_one_old(struct efx_nic efx, uint16_t id)
5176		-{
5177		- struct efx_ef10_filter_table *table = efx->filter_state;
5178		- unsigned int filter_idx;
5179		-
5180		- efx_rwsem_assert_write_locked(&table->lock);
5181		-
5182		- if (*id != EFX_EF10_FILTER_ID_INVALID) {
5183		- filter_idx = efx_ef10_filter_get_unsafe_id(*id);
5184		- if (!table->entry[filter_idx].spec)
5185		- netif_dbg(efx, drv, efx->net_dev,
5186		- "marked null spec old %04x:%04x\n", *id,
5187		- filter_idx);
5188		- table->entry[filter_idx].spec \|= EFX_EF10_FILTER_FLAG_AUTO_OLD;
5189		- *id = EFX_EF10_FILTER_ID_INVALID;
5190		- }
5191		-}
5192		-
5193		-/* Mark old per-VLAN filters that may need to be removed */
5194		-static void _efx_ef10_filter_vlan_mark_old(struct efx_nic *efx,
5195		- struct efx_ef10_filter_vlan *vlan)
5196		-{
5197		- struct efx_ef10_filter_table *table = efx->filter_state;
5198		- unsigned int i;
5199		-
5200		- for (i = 0; i < table->dev_uc_count; i++)
5201		- efx_ef10_filter_mark_one_old(efx, &vlan->uc[i]);
5202		- for (i = 0; i < table->dev_mc_count; i++)
5203		- efx_ef10_filter_mark_one_old(efx, &vlan->mc[i]);
5204		- for (i = 0; i < EFX_EF10_NUM_DEFAULT_FILTERS; i++)
5205		- efx_ef10_filter_mark_one_old(efx, &vlan->default_filters[i]);
5206		-}
5207		-
5208		-/* Mark old filters that may need to be removed.
5209		- * Caller must hold efx->filter_sem for read if race against
5210		- * efx_ef10_filter_table_remove() is possible
5211		- */
5212		-static void efx_ef10_filter_mark_old(struct efx_nic *efx)
5213		-{
5214		- struct efx_ef10_filter_table *table = efx->filter_state;
5215		- struct efx_ef10_filter_vlan *vlan;
5216		-
5217		- down_write(&table->lock);
5218		- list_for_each_entry(vlan, &table->vlan_list, list)
5219		- _efx_ef10_filter_vlan_mark_old(efx, vlan);
5220		- up_write(&table->lock);
5221		-}
5222		-
5223		-static void efx_ef10_filter_uc_addr_list(struct efx_nic *efx)
5224		-{
5225		- struct efx_ef10_filter_table *table = efx->filter_state;
5226		- struct net_device *net_dev = efx->net_dev;
5227		- struct netdev_hw_addr *uc;
5228		- unsigned int i;
5229		-
5230		- table->uc_promisc = !!(net_dev->flags & IFF_PROMISC);
5231		- ether_addr_copy(table->dev_uc_list[0].addr, net_dev->dev_addr);
5232		- i = 1;
5233		- netdev_for_each_uc_addr(uc, net_dev) {
5234		- if (i >= EFX_EF10_FILTER_DEV_UC_MAX) {
5235		- table->uc_promisc = true;
5236		- break;
5237		- }
5238		- ether_addr_copy(table->dev_uc_list[i].addr, uc->addr);
5239		- i++;
5240		- }
5241		-
5242		- table->dev_uc_count = i;
5243		-}
5244		-
5245		-static void efx_ef10_filter_mc_addr_list(struct efx_nic *efx)
5246		-{
5247		- struct efx_ef10_filter_table *table = efx->filter_state;
5248		- struct net_device *net_dev = efx->net_dev;
5249		- struct netdev_hw_addr *mc;
5250		- unsigned int i;
5251		-
5252		- table->mc_overflow = false;
5253		- table->mc_promisc = !!(net_dev->flags & (IFF_PROMISC \| IFF_ALLMULTI));
5254		-
5255		- i = 0;
5256		- netdev_for_each_mc_addr(mc, net_dev) {
5257		- if (i >= EFX_EF10_FILTER_DEV_MC_MAX) {
5258		- table->mc_promisc = true;
5259		- table->mc_overflow = true;
5260		- break;
5261		- }
5262		- ether_addr_copy(table->dev_mc_list[i].addr, mc->addr);
5263		- i++;
5264		- }
5265		-
5266		- table->dev_mc_count = i;
5267		-}
5268		-
5269		-static int efx_ef10_filter_insert_addr_list(struct efx_nic *efx,
5270		- struct efx_ef10_filter_vlan *vlan,
5271		- bool multicast, bool rollback)
5272		-{
5273		- struct efx_ef10_filter_table *table = efx->filter_state;
5274		- struct efx_ef10_dev_addr *addr_list;
5275		- enum efx_filter_flags filter_flags;
5276		- struct efx_filter_spec spec;
5277		- u8 baddr[ETH_ALEN];
5278		- unsigned int i, j;
5279		- int addr_count;
5280		- u16 *ids;
5281		- int rc;
5282		-
5283		- if (multicast) {
5284		- addr_list = table->dev_mc_list;
5285		- addr_count = table->dev_mc_count;
5286		- ids = vlan->mc;
5287		- } else {
5288		- addr_list = table->dev_uc_list;
5289		- addr_count = table->dev_uc_count;
5290		- ids = vlan->uc;
5291		- }
5292		-
5293		- filter_flags = efx_rss_active(&efx->rss_context) ? EFX_FILTER_FLAG_RX_RSS : 0;
5294		-
5295		- /* Insert/renew filters */
5296		- for (i = 0; i < addr_count; i++) {
5297		- EFX_WARN_ON_PARANOID(ids[i] != EFX_EF10_FILTER_ID_INVALID);
5298		- efx_filter_init_rx(&spec, EFX_FILTER_PRI_AUTO, filter_flags, 0);
5299		- efx_filter_set_eth_local(&spec, vlan->vid, addr_list[i].addr);
5300		- rc = efx_ef10_filter_insert_locked(efx, &spec, true);
5301		- if (rc < 0) {
5302		- if (rollback) {
5303		- netif_info(efx, drv, efx->net_dev,
5304		- "efx_ef10_filter_insert failed rc=%d\n",
5305		- rc);
5306		- /* Fall back to promiscuous */
5307		- for (j = 0; j < i; j++) {
5308		- efx_ef10_filter_remove_unsafe(
5309		- efx, EFX_FILTER_PRI_AUTO,
5310		- ids[j]);
5311		- ids[j] = EFX_EF10_FILTER_ID_INVALID;
5312		- }
5313		- return rc;
5314		- } else {
5315		- /* keep invalid ID, and carry on */
5316		- }
5317		- } else {
5318		- ids[i] = efx_ef10_filter_get_unsafe_id(rc);
5319		- }
5320		- }
5321		-
5322		- if (multicast && rollback) {
5323		- /* Also need an Ethernet broadcast filter */
5324		- EFX_WARN_ON_PARANOID(vlan->default_filters[EFX_EF10_BCAST] !=
5325		- EFX_EF10_FILTER_ID_INVALID);
5326		- efx_filter_init_rx(&spec, EFX_FILTER_PRI_AUTO, filter_flags, 0);
5327		- eth_broadcast_addr(baddr);
5328		- efx_filter_set_eth_local(&spec, vlan->vid, baddr);
5329		- rc = efx_ef10_filter_insert_locked(efx, &spec, true);
5330		- if (rc < 0) {
5331		- netif_warn(efx, drv, efx->net_dev,
5332		- "Broadcast filter insert failed rc=%d\n", rc);
5333		- /* Fall back to promiscuous */
5334		- for (j = 0; j < i; j++) {
5335		- efx_ef10_filter_remove_unsafe(
5336		- efx, EFX_FILTER_PRI_AUTO,
5337		- ids[j]);
5338		- ids[j] = EFX_EF10_FILTER_ID_INVALID;
5339		- }
5340		- return rc;
5341		- } else {
5342		- vlan->default_filters[EFX_EF10_BCAST] =
5343		- efx_ef10_filter_get_unsafe_id(rc);
5344		- }
5345		- }
5346		-
5347		- return 0;
5348		-}
5349		-
5350		-static int efx_ef10_filter_insert_def(struct efx_nic *efx,
5351		- struct efx_ef10_filter_vlan *vlan,
5352		- enum efx_encap_type encap_type,
5353		- bool multicast, bool rollback)
5354		-{
5355		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
5356		- enum efx_filter_flags filter_flags;
5357		- struct efx_filter_spec spec;
5358		- u8 baddr[ETH_ALEN];
5359		- int rc;
5360		- u16 *id;
5361		-
5362		- filter_flags = efx_rss_active(&efx->rss_context) ? EFX_FILTER_FLAG_RX_RSS : 0;
5363		-
5364		- efx_filter_init_rx(&spec, EFX_FILTER_PRI_AUTO, filter_flags, 0);
5365		-
5366		- if (multicast)
5367		- efx_filter_set_mc_def(&spec);
5368		- else
5369		- efx_filter_set_uc_def(&spec);
5370		-
5371		- if (encap_type) {
5372		- if (nic_data->datapath_caps &
5373		- (1 << MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN))
5374		- efx_filter_set_encap_type(&spec, encap_type);
5375		- else
5376		- /* don't insert encap filters on non-supporting
5377		- * platforms. ID will be left as INVALID.
5378		- */
5379		- return 0;
5380		- }
5381		-
5382		- if (vlan->vid != EFX_FILTER_VID_UNSPEC)
5383		- efx_filter_set_eth_local(&spec, vlan->vid, NULL);
5384		-
5385		- rc = efx_ef10_filter_insert_locked(efx, &spec, true);
5386		- if (rc < 0) {
5387		- const char *um = multicast ? "Multicast" : "Unicast";
5388		- const char *encap_name = "";
5389		- const char *encap_ipv = "";
5390		-
5391		- if ((encap_type & EFX_ENCAP_TYPES_MASK) ==
5392		- EFX_ENCAP_TYPE_VXLAN)
5393		- encap_name = "VXLAN ";
5394		- else if ((encap_type & EFX_ENCAP_TYPES_MASK) ==
5395		- EFX_ENCAP_TYPE_NVGRE)
5396		- encap_name = "NVGRE ";
5397		- else if ((encap_type & EFX_ENCAP_TYPES_MASK) ==
5398		- EFX_ENCAP_TYPE_GENEVE)
5399		- encap_name = "GENEVE ";
5400		- if (encap_type & EFX_ENCAP_FLAG_IPV6)
5401		- encap_ipv = "IPv6 ";
5402		- else if (encap_type)
5403		- encap_ipv = "IPv4 ";
5404		-
5405		- /* unprivileged functions can't insert mismatch filters
5406		- * for encapsulated or unicast traffic, so downgrade
5407		- * those warnings to debug.
5408		- */
5409		- netif_cond_dbg(efx, drv, efx->net_dev,
5410		- rc == -EPERM && (encap_type \|\| !multicast), warn,
5411		- "%s%s%s mismatch filter insert failed rc=%d\n",
5412		- encap_name, encap_ipv, um, rc);
5413		- } else if (multicast) {
5414		- /* mapping from encap types to default filter IDs (multicast) */
5415		- static enum efx_ef10_default_filters map[] = {
5416		- [EFX_ENCAP_TYPE_NONE] = EFX_EF10_MCDEF,
5417		- [EFX_ENCAP_TYPE_VXLAN] = EFX_EF10_VXLAN4_MCDEF,
5418		- [EFX_ENCAP_TYPE_NVGRE] = EFX_EF10_NVGRE4_MCDEF,
5419		- [EFX_ENCAP_TYPE_GENEVE] = EFX_EF10_GENEVE4_MCDEF,
5420		- [EFX_ENCAP_TYPE_VXLAN \| EFX_ENCAP_FLAG_IPV6] =
5421		- EFX_EF10_VXLAN6_MCDEF,
5422		- [EFX_ENCAP_TYPE_NVGRE \| EFX_ENCAP_FLAG_IPV6] =
5423		- EFX_EF10_NVGRE6_MCDEF,
5424		- [EFX_ENCAP_TYPE_GENEVE \| EFX_ENCAP_FLAG_IPV6] =
5425		- EFX_EF10_GENEVE6_MCDEF,
5426		- };
5427		-
5428		- /* quick bounds check (BCAST result impossible) */
5429		- BUILD_BUG_ON(EFX_EF10_BCAST != 0);
5430		- if (encap_type >= ARRAY_SIZE(map) \|\| map[encap_type] == 0) {
5431		- WARN_ON(1);
5432		- return -EINVAL;
5433		- }
5434		- /* then follow map */
5435		- id = &vlan->default_filters[map[encap_type]];
5436		-
5437		- EFX_WARN_ON_PARANOID(*id != EFX_EF10_FILTER_ID_INVALID);
5438		- *id = efx_ef10_filter_get_unsafe_id(rc);
5439		- if (!nic_data->workaround_26807 && !encap_type) {
5440		- /* Also need an Ethernet broadcast filter */
5441		- efx_filter_init_rx(&spec, EFX_FILTER_PRI_AUTO,
5442		- filter_flags, 0);
5443		- eth_broadcast_addr(baddr);
5444		- efx_filter_set_eth_local(&spec, vlan->vid, baddr);
5445		- rc = efx_ef10_filter_insert_locked(efx, &spec, true);
5446		- if (rc < 0) {
5447		- netif_warn(efx, drv, efx->net_dev,
5448		- "Broadcast filter insert failed rc=%d\n",
5449		- rc);
5450		- if (rollback) {
5451		- /* Roll back the mc_def filter */
5452		- efx_ef10_filter_remove_unsafe(
5453		- efx, EFX_FILTER_PRI_AUTO,
5454		- *id);
5455		- *id = EFX_EF10_FILTER_ID_INVALID;
5456		- return rc;
5457		- }
5458		- } else {
5459		- EFX_WARN_ON_PARANOID(
5460		- vlan->default_filters[EFX_EF10_BCAST] !=
5461		- EFX_EF10_FILTER_ID_INVALID);
5462		- vlan->default_filters[EFX_EF10_BCAST] =
5463		- efx_ef10_filter_get_unsafe_id(rc);
5464		- }
5465		- }
5466		- rc = 0;
5467		- } else {
5468		- /* mapping from encap types to default filter IDs (unicast) */
5469		- static enum efx_ef10_default_filters map[] = {
5470		- [EFX_ENCAP_TYPE_NONE] = EFX_EF10_UCDEF,
5471		- [EFX_ENCAP_TYPE_VXLAN] = EFX_EF10_VXLAN4_UCDEF,
5472		- [EFX_ENCAP_TYPE_NVGRE] = EFX_EF10_NVGRE4_UCDEF,
5473		- [EFX_ENCAP_TYPE_GENEVE] = EFX_EF10_GENEVE4_UCDEF,
5474		- [EFX_ENCAP_TYPE_VXLAN \| EFX_ENCAP_FLAG_IPV6] =
5475		- EFX_EF10_VXLAN6_UCDEF,
5476		- [EFX_ENCAP_TYPE_NVGRE \| EFX_ENCAP_FLAG_IPV6] =
5477		- EFX_EF10_NVGRE6_UCDEF,
5478		- [EFX_ENCAP_TYPE_GENEVE \| EFX_ENCAP_FLAG_IPV6] =
5479		- EFX_EF10_GENEVE6_UCDEF,
5480		- };
5481		-
5482		- /* quick bounds check (BCAST result impossible) */
5483		- BUILD_BUG_ON(EFX_EF10_BCAST != 0);
5484		- if (encap_type >= ARRAY_SIZE(map) \|\| map[encap_type] == 0) {
5485		- WARN_ON(1);
5486		- return -EINVAL;
5487		- }
5488		- /* then follow map */
5489		- id = &vlan->default_filters[map[encap_type]];
5490		- EFX_WARN_ON_PARANOID(*id != EFX_EF10_FILTER_ID_INVALID);
5491		- *id = rc;
5492		- rc = 0;
5493		- }
5494		- return rc;
5495		-}
5496		-
5497		-/* Remove filters that weren't renewed. */
5498		-static void efx_ef10_filter_remove_old(struct efx_nic *efx)
5499		-{
5500		- struct efx_ef10_filter_table *table = efx->filter_state;
5501		- int remove_failed = 0;
5502		- int remove_noent = 0;
5503		- int rc;
5504		- int i;
5505		-
5506		- down_write(&table->lock);
5507		- for (i = 0; i < HUNT_FILTER_TBL_ROWS; i++) {
5508		- if (READ_ONCE(table->entry[i].spec) &
5509		- EFX_EF10_FILTER_FLAG_AUTO_OLD) {
5510		- rc = efx_ef10_filter_remove_internal(efx,
5511		- 1U << EFX_FILTER_PRI_AUTO, i, true);
5512		- if (rc == -ENOENT)
5513		- remove_noent++;
5514		- else if (rc)
5515		- remove_failed++;
5516		- }
5517		- }
5518		- up_write(&table->lock);
5519		-
5520		- if (remove_failed)
5521		- netif_info(efx, drv, efx->net_dev,
5522		- "%s: failed to remove %d filters\n",
5523		- __func__, remove_failed);
5524		- if (remove_noent)
5525		- netif_info(efx, drv, efx->net_dev,
5526		- "%s: failed to remove %d non-existent filters\n",
5527		- __func__, remove_noent);
5528	3202	}
5529	3203
5530	3204	static int efx_ef10_vport_set_mac_address(struct efx_nic *efx)
..	..	@@ -5540,25 +3214,25 @@
5540	3214	efx_device_detach_sync(efx);
5541	3215	efx_net_stop(efx->net_dev);
5542	3216	down_write(&efx->filter_sem);
5543		- efx_ef10_filter_table_remove(efx);
	3217	+ efx_mcdi_filter_table_remove(efx);
5544	3218	up_write(&efx->filter_sem);
5545	3219
5546		- rc = efx_ef10_vadaptor_free(efx, nic_data->vport_id);
	3220	+ rc = efx_ef10_vadaptor_free(efx, efx->vport_id);
5547	3221	if (rc)
5548	3222	goto restore_filters;
5549	3223
5550	3224	ether_addr_copy(mac_old, nic_data->vport_mac);
5551		- rc = efx_ef10_vport_del_mac(efx, nic_data->vport_id,
	3225	+ rc = efx_ef10_vport_del_mac(efx, efx->vport_id,
5552	3226	nic_data->vport_mac);
5553	3227	if (rc)
5554	3228	goto restore_vadaptor;
5555	3229
5556		- rc = efx_ef10_vport_add_mac(efx, nic_data->vport_id,
	3230	+ rc = efx_ef10_vport_add_mac(efx, efx->vport_id,
5557	3231	efx->net_dev->dev_addr);
5558	3232	if (!rc) {
5559	3233	ether_addr_copy(nic_data->vport_mac, efx->net_dev->dev_addr);
5560	3234	} else {
5561		- rc2 = efx_ef10_vport_add_mac(efx, nic_data->vport_id, mac_old);
	3235	+ rc2 = efx_ef10_vport_add_mac(efx, efx->vport_id, mac_old);
5562	3236	if (rc2) {
5563	3237	/* Failed to add original MAC, so clear vport_mac */
5564	3238	eth_zero_addr(nic_data->vport_mac);
..	..	@@ -5567,7 +3241,7 @@
5567	3241	}
5568	3242
5569	3243	restore_vadaptor:
5570		- rc2 = efx_ef10_vadaptor_alloc(efx, nic_data->vport_id);
	3244	+ rc2 = efx_ef10_vadaptor_alloc(efx, efx->vport_id);
5571	3245	if (rc2)
5572	3246	goto reset_nic;
5573	3247	restore_filters:
..	..	@@ -5593,274 +3267,47 @@
5593	3267	return rc ? rc : rc2;
5594	3268	}
5595	3269
5596		-/* Caller must hold efx->filter_sem for read if race against
5597		- * efx_ef10_filter_table_remove() is possible
5598		- */
5599		-static void efx_ef10_filter_vlan_sync_rx_mode(struct efx_nic *efx,
5600		- struct efx_ef10_filter_vlan *vlan)
5601		-{
5602		- struct efx_ef10_filter_table *table = efx->filter_state;
5603		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
5604		-
5605		- /* Do not install unspecified VID if VLAN filtering is enabled.
5606		- * Do not install all specified VIDs if VLAN filtering is disabled.
5607		- */
5608		- if ((vlan->vid == EFX_FILTER_VID_UNSPEC) == table->vlan_filter)
5609		- return;
5610		-
5611		- /* Insert/renew unicast filters */
5612		- if (table->uc_promisc) {
5613		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_NONE,
5614		- false, false);
5615		- efx_ef10_filter_insert_addr_list(efx, vlan, false, false);
5616		- } else {
5617		- /* If any of the filters failed to insert, fall back to
5618		- * promiscuous mode - add in the uc_def filter. But keep
5619		- * our individual unicast filters.
5620		- */
5621		- if (efx_ef10_filter_insert_addr_list(efx, vlan, false, false))
5622		- efx_ef10_filter_insert_def(efx, vlan,
5623		- EFX_ENCAP_TYPE_NONE,
5624		- false, false);
5625		- }
5626		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_VXLAN,
5627		- false, false);
5628		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_VXLAN \|
5629		- EFX_ENCAP_FLAG_IPV6,
5630		- false, false);
5631		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_NVGRE,
5632		- false, false);
5633		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_NVGRE \|
5634		- EFX_ENCAP_FLAG_IPV6,
5635		- false, false);
5636		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_GENEVE,
5637		- false, false);
5638		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_GENEVE \|
5639		- EFX_ENCAP_FLAG_IPV6,
5640		- false, false);
5641		-
5642		- /* Insert/renew multicast filters */
5643		- /* If changing promiscuous state with cascaded multicast filters, remove
5644		- * old filters first, so that packets are dropped rather than duplicated
5645		- */
5646		- if (nic_data->workaround_26807 &&
5647		- table->mc_promisc_last != table->mc_promisc)
5648		- efx_ef10_filter_remove_old(efx);
5649		- if (table->mc_promisc) {
5650		- if (nic_data->workaround_26807) {
5651		- /* If we failed to insert promiscuous filters, rollback
5652		- * and fall back to individual multicast filters
5653		- */
5654		- if (efx_ef10_filter_insert_def(efx, vlan,
5655		- EFX_ENCAP_TYPE_NONE,
5656		- true, true)) {
5657		- /* Changing promisc state, so remove old filters */
5658		- efx_ef10_filter_remove_old(efx);
5659		- efx_ef10_filter_insert_addr_list(efx, vlan,
5660		- true, false);
5661		- }
5662		- } else {
5663		- /* If we failed to insert promiscuous filters, don't
5664		- * rollback. Regardless, also insert the mc_list,
5665		- * unless it's incomplete due to overflow
5666		- */
5667		- efx_ef10_filter_insert_def(efx, vlan,
5668		- EFX_ENCAP_TYPE_NONE,
5669		- true, false);
5670		- if (!table->mc_overflow)
5671		- efx_ef10_filter_insert_addr_list(efx, vlan,
5672		- true, false);
5673		- }
5674		- } else {
5675		- /* If any filters failed to insert, rollback and fall back to
5676		- * promiscuous mode - mc_def filter and maybe broadcast. If
5677		- * that fails, roll back again and insert as many of our
5678		- * individual multicast filters as we can.
5679		- */
5680		- if (efx_ef10_filter_insert_addr_list(efx, vlan, true, true)) {
5681		- /* Changing promisc state, so remove old filters */
5682		- if (nic_data->workaround_26807)
5683		- efx_ef10_filter_remove_old(efx);
5684		- if (efx_ef10_filter_insert_def(efx, vlan,
5685		- EFX_ENCAP_TYPE_NONE,
5686		- true, true))
5687		- efx_ef10_filter_insert_addr_list(efx, vlan,
5688		- true, false);
5689		- }
5690		- }
5691		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_VXLAN,
5692		- true, false);
5693		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_VXLAN \|
5694		- EFX_ENCAP_FLAG_IPV6,
5695		- true, false);
5696		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_NVGRE,
5697		- true, false);
5698		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_NVGRE \|
5699		- EFX_ENCAP_FLAG_IPV6,
5700		- true, false);
5701		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_GENEVE,
5702		- true, false);
5703		- efx_ef10_filter_insert_def(efx, vlan, EFX_ENCAP_TYPE_GENEVE \|
5704		- EFX_ENCAP_FLAG_IPV6,
5705		- true, false);
5706		-}
5707		-
5708		-/* Caller must hold efx->filter_sem for read if race against
5709		- * efx_ef10_filter_table_remove() is possible
5710		- */
5711		-static void efx_ef10_filter_sync_rx_mode(struct efx_nic *efx)
5712		-{
5713		- struct efx_ef10_filter_table *table = efx->filter_state;
5714		- struct net_device *net_dev = efx->net_dev;
5715		- struct efx_ef10_filter_vlan *vlan;
5716		- bool vlan_filter;
5717		-
5718		- if (!efx_dev_registered(efx))
5719		- return;
5720		-
5721		- if (!table)
5722		- return;
5723		-
5724		- efx_ef10_filter_mark_old(efx);
5725		-
5726		- /* Copy/convert the address lists; add the primary station
5727		- * address and broadcast address
5728		- */
5729		- netif_addr_lock_bh(net_dev);
5730		- efx_ef10_filter_uc_addr_list(efx);
5731		- efx_ef10_filter_mc_addr_list(efx);
5732		- netif_addr_unlock_bh(net_dev);
5733		-
5734		- /* If VLAN filtering changes, all old filters are finally removed.
5735		- * Do it in advance to avoid conflicts for unicast untagged and
5736		- * VLAN 0 tagged filters.
5737		- */
5738		- vlan_filter = !!(net_dev->features & NETIF_F_HW_VLAN_CTAG_FILTER);
5739		- if (table->vlan_filter != vlan_filter) {
5740		- table->vlan_filter = vlan_filter;
5741		- efx_ef10_filter_remove_old(efx);
5742		- }
5743		-
5744		- list_for_each_entry(vlan, &table->vlan_list, list)
5745		- efx_ef10_filter_vlan_sync_rx_mode(efx, vlan);
5746		-
5747		- efx_ef10_filter_remove_old(efx);
5748		- table->mc_promisc_last = table->mc_promisc;
5749		-}
5750		-
5751		-static struct efx_ef10_filter_vlan efx_ef10_filter_find_vlan(struct efx_nic efx, u16 vid)
5752		-{
5753		- struct efx_ef10_filter_table *table = efx->filter_state;
5754		- struct efx_ef10_filter_vlan *vlan;
5755		-
5756		- WARN_ON(!rwsem_is_locked(&efx->filter_sem));
5757		-
5758		- list_for_each_entry(vlan, &table->vlan_list, list) {
5759		- if (vlan->vid == vid)
5760		- return vlan;
5761		- }
5762		-
5763		- return NULL;
5764		-}
5765		-
5766		-static int efx_ef10_filter_add_vlan(struct efx_nic *efx, u16 vid)
5767		-{
5768		- struct efx_ef10_filter_table *table = efx->filter_state;
5769		- struct efx_ef10_filter_vlan *vlan;
5770		- unsigned int i;
5771		-
5772		- if (!efx_rwsem_assert_write_locked(&efx->filter_sem))
5773		- return -EINVAL;
5774		-
5775		- vlan = efx_ef10_filter_find_vlan(efx, vid);
5776		- if (WARN_ON(vlan)) {
5777		- netif_err(efx, drv, efx->net_dev,
5778		- "VLAN %u already added\n", vid);
5779		- return -EALREADY;
5780		- }
5781		-
5782		- vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
5783		- if (!vlan)
5784		- return -ENOMEM;
5785		-
5786		- vlan->vid = vid;
5787		-
5788		- for (i = 0; i < ARRAY_SIZE(vlan->uc); i++)
5789		- vlan->uc[i] = EFX_EF10_FILTER_ID_INVALID;
5790		- for (i = 0; i < ARRAY_SIZE(vlan->mc); i++)
5791		- vlan->mc[i] = EFX_EF10_FILTER_ID_INVALID;
5792		- for (i = 0; i < EFX_EF10_NUM_DEFAULT_FILTERS; i++)
5793		- vlan->default_filters[i] = EFX_EF10_FILTER_ID_INVALID;
5794		-
5795		- list_add_tail(&vlan->list, &table->vlan_list);
5796		-
5797		- if (efx_dev_registered(efx))
5798		- efx_ef10_filter_vlan_sync_rx_mode(efx, vlan);
5799		-
5800		- return 0;
5801		-}
5802		-
5803		-static void efx_ef10_filter_del_vlan_internal(struct efx_nic *efx,
5804		- struct efx_ef10_filter_vlan *vlan)
5805		-{
5806		- unsigned int i;
5807		-
5808		- /* See comment in efx_ef10_filter_table_remove() */
5809		- if (!efx_rwsem_assert_write_locked(&efx->filter_sem))
5810		- return;
5811		-
5812		- list_del(&vlan->list);
5813		-
5814		- for (i = 0; i < ARRAY_SIZE(vlan->uc); i++)
5815		- efx_ef10_filter_remove_unsafe(efx, EFX_FILTER_PRI_AUTO,
5816		- vlan->uc[i]);
5817		- for (i = 0; i < ARRAY_SIZE(vlan->mc); i++)
5818		- efx_ef10_filter_remove_unsafe(efx, EFX_FILTER_PRI_AUTO,
5819		- vlan->mc[i]);
5820		- for (i = 0; i < EFX_EF10_NUM_DEFAULT_FILTERS; i++)
5821		- if (vlan->default_filters[i] != EFX_EF10_FILTER_ID_INVALID)
5822		- efx_ef10_filter_remove_unsafe(efx, EFX_FILTER_PRI_AUTO,
5823		- vlan->default_filters[i]);
5824		-
5825		- kfree(vlan);
5826		-}
5827		-
5828		-static void efx_ef10_filter_del_vlan(struct efx_nic *efx, u16 vid)
5829		-{
5830		- struct efx_ef10_filter_vlan *vlan;
5831		-
5832		- /* See comment in efx_ef10_filter_table_remove() */
5833		- if (!efx_rwsem_assert_write_locked(&efx->filter_sem))
5834		- return;
5835		-
5836		- vlan = efx_ef10_filter_find_vlan(efx, vid);
5837		- if (!vlan) {
5838		- netif_err(efx, drv, efx->net_dev,
5839		- "VLAN %u not found in filter state\n", vid);
5840		- return;
5841		- }
5842		-
5843		- efx_ef10_filter_del_vlan_internal(efx, vlan);
5844		-}
5845		-
5846	3270	static int efx_ef10_set_mac_address(struct efx_nic *efx)
5847	3271	{
5848	3272	MCDI_DECLARE_BUF(inbuf, MC_CMD_VADAPTOR_SET_MAC_IN_LEN);
5849		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
5850	3273	bool was_enabled = efx->port_enabled;
5851	3274	int rc;
	3275	+
	3276	+#ifdef CONFIG_SFC_SRIOV
	3277	+ /* If this function is a VF and we have access to the parent PF,
	3278	+ * then use the PF control path to attempt to change the VF MAC address.
	3279	+ */
	3280	+ if (efx->pci_dev->is_virtfn && efx->pci_dev->physfn) {
	3281	+ struct efx_nic *efx_pf = pci_get_drvdata(efx->pci_dev->physfn);
	3282	+ struct efx_ef10_nic_data *nic_data = efx->nic_data;
	3283	+ u8 mac[ETH_ALEN];
	3284	+
	3285	+ /* net_dev->dev_addr can be zeroed by efx_net_stop in
	3286	+ * efx_ef10_sriov_set_vf_mac, so pass in a copy.
	3287	+ */
	3288	+ ether_addr_copy(mac, efx->net_dev->dev_addr);
	3289	+
	3290	+ rc = efx_ef10_sriov_set_vf_mac(efx_pf, nic_data->vf_index, mac);
	3291	+ if (!rc)
	3292	+ return 0;
	3293	+
	3294	+ netif_dbg(efx, drv, efx->net_dev,
	3295	+ "Updating VF mac via PF failed (%d), setting directly\n",
	3296	+ rc);
	3297	+ }
	3298	+#endif
5852	3299
5853	3300	efx_device_detach_sync(efx);
5854	3301	efx_net_stop(efx->net_dev);
5855	3302
5856	3303	mutex_lock(&efx->mac_lock);
5857	3304	down_write(&efx->filter_sem);
5858		- efx_ef10_filter_table_remove(efx);
	3305	+ efx_mcdi_filter_table_remove(efx);
5859	3306
5860	3307	ether_addr_copy(MCDI_PTR(inbuf, VADAPTOR_SET_MAC_IN_MACADDR),
5861	3308	efx->net_dev->dev_addr);
5862	3309	MCDI_SET_DWORD(inbuf, VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID,
5863		- nic_data->vport_id);
	3310	+ efx->vport_id);
5864	3311	rc = efx_mcdi_rpc_quiet(efx, MC_CMD_VADAPTOR_SET_MAC, inbuf,
5865	3312	sizeof(inbuf), NULL, 0, NULL);
5866	3313
..	..	@@ -5872,39 +3319,6 @@
5872	3319	efx_net_open(efx->net_dev);
5873	3320	efx_device_attach_if_not_resetting(efx);
5874	3321
5875		-#ifdef CONFIG_SFC_SRIOV
5876		- if (efx->pci_dev->is_virtfn && efx->pci_dev->physfn) {
5877		- struct pci_dev *pci_dev_pf = efx->pci_dev->physfn;
5878		-
5879		- if (rc == -EPERM) {
5880		- struct efx_nic *efx_pf;
5881		-
5882		- /* Switch to PF and change MAC address on vport */
5883		- efx_pf = pci_get_drvdata(pci_dev_pf);
5884		-
5885		- rc = efx_ef10_sriov_set_vf_mac(efx_pf,
5886		- nic_data->vf_index,
5887		- efx->net_dev->dev_addr);
5888		- } else if (!rc) {
5889		- struct efx_nic *efx_pf = pci_get_drvdata(pci_dev_pf);
5890		- struct efx_ef10_nic_data *nic_data = efx_pf->nic_data;
5891		- unsigned int i;
5892		-
5893		- /* MAC address successfully changed by VF (with MAC
5894		- * spoofing) so update the parent PF if possible.
5895		- */
5896		- for (i = 0; i < efx_pf->vf_count; ++i) {
5897		- struct ef10_vf *vf = nic_data->vf + i;
5898		-
5899		- if (vf->efx == efx) {
5900		- ether_addr_copy(vf->mac,
5901		- efx->net_dev->dev_addr);
5902		- return 0;
5903		- }
5904		- }
5905		- }
5906		- } else
5907		-#endif
5908	3322	if (rc == -EPERM) {
5909	3323	netif_err(efx, drv, efx->net_dev,
5910	3324	"Cannot change MAC address; use sfboot to enable"
..	..	@@ -5924,18 +3338,15 @@
5924	3338	return rc;
5925	3339	}
5926	3340
5927		-static int efx_ef10_mac_reconfigure(struct efx_nic *efx)
	3341	+static int efx_ef10_mac_reconfigure(struct efx_nic *efx, bool mtu_only)
5928	3342	{
5929		- efx_ef10_filter_sync_rx_mode(efx);
	3343	+ WARN_ON(!mutex_is_locked(&efx->mac_lock));
5930	3344
	3345	+ efx_mcdi_filter_sync_rx_mode(efx);
	3346	+
	3347	+ if (mtu_only && efx_has_cap(efx, SET_MAC_ENHANCED))
	3348	+ return efx_mcdi_set_mtu(efx);
5931	3349	return efx_mcdi_set_mac(efx);
5932		-}
5933		-
5934		-static int efx_ef10_mac_reconfigure_vf(struct efx_nic *efx)
5935		-{
5936		- efx_ef10_filter_sync_rx_mode(efx);
5937		-
5938		- return 0;
5939	3350	}
5940	3351
5941	3352	static int efx_ef10_start_bist(struct efx_nic *efx, u32 bist_type)
..	..	@@ -6041,6 +3452,13 @@
6041	3452	{ NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3, 0, 3, "sfc_exp_rom_cfg" },
6042	3453	{ NVRAM_PARTITION_TYPE_LICENSE, 0, 0, "sfc_license" },
6043	3454	{ NVRAM_PARTITION_TYPE_PHY_MIN, 0xff, 0, "sfc_phy_fw" },
	3455	+ { NVRAM_PARTITION_TYPE_MUM_FIRMWARE, 0, 0, "sfc_mumfw" },
	3456	+ { NVRAM_PARTITION_TYPE_EXPANSION_UEFI, 0, 0, "sfc_uefi" },
	3457	+ { NVRAM_PARTITION_TYPE_DYNCONFIG_DEFAULTS, 0, 0, "sfc_dynamic_cfg_dflt" },
	3458	+ { NVRAM_PARTITION_TYPE_ROMCONFIG_DEFAULTS, 0, 0, "sfc_exp_rom_cfg_dflt" },
	3459	+ { NVRAM_PARTITION_TYPE_STATUS, 0, 0, "sfc_status" },
	3460	+ { NVRAM_PARTITION_TYPE_BUNDLE, 0, 0, "sfc_bundle" },
	3461	+ { NVRAM_PARTITION_TYPE_BUNDLE_METADATA, 0, 0, "sfc_bundle_metadata" },
6044	3462	};
6045	3463	#define EF10_NVRAM_PARTITION_COUNT ARRAY_SIZE(efx_ef10_nvram_types)
6046	3464
..	..	@@ -6070,8 +3488,15 @@
6070	3488	rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
6071	3489	if (rc)
6072	3490	return rc;
	3491	+ if (protected &&
	3492	+ (type != NVRAM_PARTITION_TYPE_DYNCONFIG_DEFAULTS &&
	3493	+ type != NVRAM_PARTITION_TYPE_ROMCONFIG_DEFAULTS))
	3494	+ /* Hide protected partitions that don't provide defaults. */
	3495	+ return -ENODEV;
	3496	+
6073	3497	if (protected)
6074		- return -ENODEV; /* hide it */
	3498	+ /* Protected partitions are read only. */
	3499	+ erase_size = 0;
6075	3500
6076	3501	/* If we've already exposed a partition of this type, hide this
6077	3502	* duplicate. All operations on MTDs are keyed by the type anyway,
..	..	@@ -6101,6 +3526,9 @@
6101	3526	part->common.mtd.flags = MTD_CAP_NORFLASH;
6102	3527	part->common.mtd.size = size;
6103	3528	part->common.mtd.erasesize = erase_size;
	3529	+ /* sfc_status is read-only */
	3530	+ if (!erase_size)
	3531	+ part->common.mtd.flags \|= MTD_NO_ERASE;
6104	3532
6105	3533	return 0;
6106	3534	}
..	..	@@ -6144,6 +3572,11 @@
6144	3572	if (rc)
6145	3573	goto fail;
6146	3574	n_parts++;
	3575	+ }
	3576	+
	3577	+ if (!n_parts) {
	3578	+ kfree(parts);
	3579	+ return 0;
6147	3580	}
6148	3581
6149	3582	rc = efx_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts));
..	..	@@ -6345,8 +3778,8 @@
6345	3778	MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_MAXNUM);
6346	3779
6347	3780	for (i = 0; i < ARRAY_SIZE(nic_data->udp_tunnels); ++i) {
6348		- if (nic_data->udp_tunnels[i].count &&
6349		- nic_data->udp_tunnels[i].port) {
	3781	+ if (nic_data->udp_tunnels[i].type !=
	3782	+ TUNNEL_ENCAP_UDP_PORT_ENTRY_INVALID) {
6350	3783	efx_dword_t entry;
6351	3784
6352	3785	EFX_POPULATE_DWORD_2(entry,
..	..	@@ -6432,79 +3865,34 @@
6432	3865	return rc;
6433	3866	}
6434	3867
6435		-static struct efx_udp_tunnel __efx_ef10_udp_tnl_lookup_port(struct efx_nic efx,
6436		- __be16 port)
	3868	+static int efx_ef10_udp_tnl_set_port(struct net_device *dev,
	3869	+ unsigned int table, unsigned int entry,
	3870	+ struct udp_tunnel_info *ti)
6437	3871	{
6438		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
6439		- size_t i;
	3872	+ struct efx_nic *efx = netdev_priv(dev);
	3873	+ struct efx_ef10_nic_data *nic_data;
	3874	+ int efx_tunnel_type, rc;
6440	3875
6441		- for (i = 0; i < ARRAY_SIZE(nic_data->udp_tunnels); ++i) {
6442		- if (!nic_data->udp_tunnels[i].count)
6443		- continue;
6444		- if (nic_data->udp_tunnels[i].port == port)
6445		- return &nic_data->udp_tunnels[i];
6446		- }
6447		- return NULL;
6448		-}
	3876	+ if (ti->type == UDP_TUNNEL_TYPE_VXLAN)
	3877	+ efx_tunnel_type = TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN;
	3878	+ else
	3879	+ efx_tunnel_type = TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE;
6449	3880
6450		-static int efx_ef10_udp_tnl_add_port(struct efx_nic *efx,
6451		- struct efx_udp_tunnel tnl)
6452		-{
6453		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
6454		- struct efx_udp_tunnel *match;
6455		- char typebuf[8];
6456		- size_t i;
6457		- int rc;
6458		-
	3881	+ nic_data = efx->nic_data;
6459	3882	if (!(nic_data->datapath_caps &
6460	3883	(1 << MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN)))
6461		- return 0;
6462		-
6463		- efx_get_udp_tunnel_type_name(tnl.type, typebuf, sizeof(typebuf));
6464		- netif_dbg(efx, drv, efx->net_dev, "Adding UDP tunnel (%s) port %d\n",
6465		- typebuf, ntohs(tnl.port));
	3884	+ return -EOPNOTSUPP;
6466	3885
6467	3886	mutex_lock(&nic_data->udp_tunnels_lock);
6468	3887	/* Make sure all TX are stopped while we add to the table, else we
6469	3888	* might race against an efx_features_check().
6470	3889	*/
6471	3890	efx_device_detach_sync(efx);
6472		-
6473		- match = __efx_ef10_udp_tnl_lookup_port(efx, tnl.port);
6474		- if (match != NULL) {
6475		- if (match->type == tnl.type) {
6476		- netif_dbg(efx, drv, efx->net_dev,
6477		- "Referencing existing tunnel entry\n");
6478		- match->count++;
6479		- /* No need to cause an MCDI update */
6480		- rc = 0;
6481		- goto unlock_out;
6482		- }
6483		- efx_get_udp_tunnel_type_name(match->type,
6484		- typebuf, sizeof(typebuf));
6485		- netif_dbg(efx, drv, efx->net_dev,
6486		- "UDP port %d is already in use by %s\n",
6487		- ntohs(tnl.port), typebuf);
6488		- rc = -EEXIST;
6489		- goto unlock_out;
6490		- }
6491		-
6492		- for (i = 0; i < ARRAY_SIZE(nic_data->udp_tunnels); ++i)
6493		- if (!nic_data->udp_tunnels[i].count) {
6494		- nic_data->udp_tunnels[i] = tnl;
6495		- nic_data->udp_tunnels[i].count = 1;
6496		- rc = efx_ef10_set_udp_tnl_ports(efx, false);
6497		- goto unlock_out;
6498		- }
6499		-
6500		- netif_dbg(efx, drv, efx->net_dev,
6501		- "Unable to add UDP tunnel (%s) port %d; insufficient resources.\n",
6502		- typebuf, ntohs(tnl.port));
6503		-
6504		- rc = -ENOMEM;
6505		-
6506		-unlock_out:
	3891	+ nic_data->udp_tunnels[entry].type = efx_tunnel_type;
	3892	+ nic_data->udp_tunnels[entry].port = ti->port;
	3893	+ rc = efx_ef10_set_udp_tnl_ports(efx, false);
6507	3894	mutex_unlock(&nic_data->udp_tunnels_lock);
	3895	+
6508	3896	return rc;
6509	3897	}
6510	3898
..	..	@@ -6516,6 +3904,7 @@
6516	3904	static bool efx_ef10_udp_tnl_has_port(struct efx_nic *efx, __be16 port)
6517	3905	{
6518	3906	struct efx_ef10_nic_data *nic_data = efx->nic_data;
	3907	+ size_t i;
6519	3908
6520	3909	if (!(nic_data->datapath_caps &
6521	3910	(1 << MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN)))
..	..	@@ -6527,56 +3916,78 @@
6527	3916	*/
6528	3917	return false;
6529	3918
6530		- return __efx_ef10_udp_tnl_lookup_port(efx, port) != NULL;
	3919	+ for (i = 0; i < ARRAY_SIZE(nic_data->udp_tunnels); ++i)
	3920	+ if (nic_data->udp_tunnels[i].type !=
	3921	+ TUNNEL_ENCAP_UDP_PORT_ENTRY_INVALID &&
	3922	+ nic_data->udp_tunnels[i].port == port)
	3923	+ return true;
	3924	+
	3925	+ return false;
6531	3926	}
6532	3927
6533		-static int efx_ef10_udp_tnl_del_port(struct efx_nic *efx,
6534		- struct efx_udp_tunnel tnl)
	3928	+static int efx_ef10_udp_tnl_unset_port(struct net_device *dev,
	3929	+ unsigned int table, unsigned int entry,
	3930	+ struct udp_tunnel_info *ti)
6535	3931	{
6536		- struct efx_ef10_nic_data *nic_data = efx->nic_data;
6537		- struct efx_udp_tunnel *match;
6538		- char typebuf[8];
	3932	+ struct efx_nic *efx = netdev_priv(dev);
	3933	+ struct efx_ef10_nic_data *nic_data;
6539	3934	int rc;
6540	3935
6541		- if (!(nic_data->datapath_caps &
6542		- (1 << MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN)))
6543		- return 0;
6544		-
6545		- efx_get_udp_tunnel_type_name(tnl.type, typebuf, sizeof(typebuf));
6546		- netif_dbg(efx, drv, efx->net_dev, "Removing UDP tunnel (%s) port %d\n",
6547		- typebuf, ntohs(tnl.port));
	3936	+ nic_data = efx->nic_data;
6548	3937
6549	3938	mutex_lock(&nic_data->udp_tunnels_lock);
6550	3939	/* Make sure all TX are stopped while we remove from the table, else we
6551	3940	* might race against an efx_features_check().
6552	3941	*/
6553	3942	efx_device_detach_sync(efx);
6554		-
6555		- match = __efx_ef10_udp_tnl_lookup_port(efx, tnl.port);
6556		- if (match != NULL) {
6557		- if (match->type == tnl.type) {
6558		- if (--match->count) {
6559		- /* Port is still in use, so nothing to do */
6560		- netif_dbg(efx, drv, efx->net_dev,
6561		- "UDP tunnel port %d remains active\n",
6562		- ntohs(tnl.port));
6563		- rc = 0;
6564		- goto out_unlock;
6565		- }
6566		- rc = efx_ef10_set_udp_tnl_ports(efx, false);
6567		- goto out_unlock;
6568		- }
6569		- efx_get_udp_tunnel_type_name(match->type,
6570		- typebuf, sizeof(typebuf));
6571		- netif_warn(efx, drv, efx->net_dev,
6572		- "UDP port %d is actually in use by %s, not removing\n",
6573		- ntohs(tnl.port), typebuf);
6574		- }
6575		- rc = -ENOENT;
6576		-
6577		-out_unlock:
	3943	+ nic_data->udp_tunnels[entry].type = TUNNEL_ENCAP_UDP_PORT_ENTRY_INVALID;
	3944	+ nic_data->udp_tunnels[entry].port = 0;
	3945	+ rc = efx_ef10_set_udp_tnl_ports(efx, false);
6578	3946	mutex_unlock(&nic_data->udp_tunnels_lock);
	3947	+
6579	3948	return rc;
	3949	+}
	3950	+
	3951	+static const struct udp_tunnel_nic_info efx_ef10_udp_tunnels = {
	3952	+ .set_port = efx_ef10_udp_tnl_set_port,
	3953	+ .unset_port = efx_ef10_udp_tnl_unset_port,
	3954	+ .flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP,
	3955	+ .tables = {
	3956	+ {
	3957	+ .n_entries = 16,
	3958	+ .tunnel_types = UDP_TUNNEL_TYPE_VXLAN \|
	3959	+ UDP_TUNNEL_TYPE_GENEVE,
	3960	+ },
	3961	+ },
	3962	+};
	3963	+
	3964	+/* EF10 may have multiple datapath firmware variants within a
	3965	+ * single version. Report which variants are running.
	3966	+ */
	3967	+static size_t efx_ef10_print_additional_fwver(struct efx_nic efx, char buf,
	3968	+ size_t len)
	3969	+{
	3970	+ struct efx_ef10_nic_data *nic_data = efx->nic_data;
	3971	+
	3972	+ return scnprintf(buf, len, " rx%x tx%x",
	3973	+ nic_data->rx_dpcpu_fw_id,
	3974	+ nic_data->tx_dpcpu_fw_id);
	3975	+}
	3976	+
	3977	+static unsigned int ef10_check_caps(const struct efx_nic *efx,
	3978	+ u8 flag,
	3979	+ u32 offset)
	3980	+{
	3981	+ const struct efx_ef10_nic_data *nic_data = efx->nic_data;
	3982	+
	3983	+ switch (offset) {
	3984	+ case(MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS1_OFST):
	3985	+ return nic_data->datapath_caps & BIT_ULL(flag);
	3986	+ case(MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS2_OFST):
	3987	+ return nic_data->datapath_caps2 & BIT_ULL(flag);
	3988	+ default:
	3989	+ return 0;
	3990	+ }
6580	3991	}
6581	3992
6582	3993	#define EF10_OFFLOAD_FEATURES \
..	..	@@ -6584,7 +3995,10 @@
6584	3995	NETIF_F_HW_VLAN_CTAG_FILTER \| \
6585	3996	NETIF_F_IPV6_CSUM \| \
6586	3997	NETIF_F_RXHASH \| \
6587		- NETIF_F_NTUPLE)
	3998	+ NETIF_F_NTUPLE \| \
	3999	+ NETIF_F_SG \| \
	4000	+ NETIF_F_RXCSUM \| \
	4001	+ NETIF_F_RXALL)
6588	4002
6589	4003	const struct efx_nic_type efx_hunt_a0_vf_nic_type = {
6590	4004	.is_vf = true,
..	..	@@ -6594,23 +4008,23 @@
6594	4008	.remove = efx_ef10_remove,
6595	4009	.dimension_resources = efx_ef10_dimension_resources,
6596	4010	.init = efx_ef10_init_nic,
6597		- .fini = efx_port_dummy_op_void,
	4011	+ .fini = efx_ef10_fini_nic,
6598	4012	.map_reset_reason = efx_ef10_map_reset_reason,
6599	4013	.map_reset_flags = efx_ef10_map_reset_flags,
6600	4014	.reset = efx_ef10_reset,
6601	4015	.probe_port = efx_mcdi_port_probe,
6602	4016	.remove_port = efx_mcdi_port_remove,
6603		- .fini_dmaq = efx_ef10_fini_dmaq,
	4017	+ .fini_dmaq = efx_fini_dmaq,
6604	4018	.prepare_flr = efx_ef10_prepare_flr,
6605	4019	.finish_flr = efx_port_dummy_op_void,
6606	4020	.describe_stats = efx_ef10_describe_stats,
6607	4021	.update_stats = efx_ef10_update_stats_vf,
	4022	+ .update_stats_atomic = efx_ef10_update_stats_atomic_vf,
6608	4023	.start_stats = efx_port_dummy_op_void,
6609	4024	.pull_stats = efx_port_dummy_op_void,
6610	4025	.stop_stats = efx_port_dummy_op_void,
6611		- .set_id_led = efx_mcdi_set_id_led,
6612	4026	.push_irq_moderation = efx_ef10_push_irq_moderation,
6613		- .reconfigure_mac = efx_ef10_mac_reconfigure_vf,
	4027	+ .reconfigure_mac = efx_ef10_mac_reconfigure,
6614	4028	.check_mac_fault = efx_mcdi_mac_check_fault,
6615	4029	.reconfigure_port = efx_mcdi_port_reconfigure,
6616	4030	.get_wol = efx_ef10_get_wol_vf,
..	..	@@ -6628,36 +4042,38 @@
6628	4042	.irq_handle_legacy = efx_ef10_legacy_interrupt,
6629	4043	.tx_probe = efx_ef10_tx_probe,
6630	4044	.tx_init = efx_ef10_tx_init,
6631		- .tx_remove = efx_ef10_tx_remove,
	4045	+ .tx_remove = efx_mcdi_tx_remove,
6632	4046	.tx_write = efx_ef10_tx_write,
6633	4047	.tx_limit_len = efx_ef10_tx_limit_len,
6634		- .rx_push_rss_config = efx_ef10_vf_rx_push_rss_config,
6635		- .rx_pull_rss_config = efx_ef10_rx_pull_rss_config,
6636		- .rx_probe = efx_ef10_rx_probe,
6637		- .rx_init = efx_ef10_rx_init,
6638		- .rx_remove = efx_ef10_rx_remove,
	4048	+ .tx_enqueue = __efx_enqueue_skb,
	4049	+ .rx_push_rss_config = efx_mcdi_vf_rx_push_rss_config,
	4050	+ .rx_pull_rss_config = efx_mcdi_rx_pull_rss_config,
	4051	+ .rx_probe = efx_mcdi_rx_probe,
	4052	+ .rx_init = efx_mcdi_rx_init,
	4053	+ .rx_remove = efx_mcdi_rx_remove,
6639	4054	.rx_write = efx_ef10_rx_write,
6640	4055	.rx_defer_refill = efx_ef10_rx_defer_refill,
6641		- .ev_probe = efx_ef10_ev_probe,
	4056	+ .rx_packet = __efx_rx_packet,
	4057	+ .ev_probe = efx_mcdi_ev_probe,
6642	4058	.ev_init = efx_ef10_ev_init,
6643		- .ev_fini = efx_ef10_ev_fini,
6644		- .ev_remove = efx_ef10_ev_remove,
	4059	+ .ev_fini = efx_mcdi_ev_fini,
	4060	+ .ev_remove = efx_mcdi_ev_remove,
6645	4061	.ev_process = efx_ef10_ev_process,
6646	4062	.ev_read_ack = efx_ef10_ev_read_ack,
6647	4063	.ev_test_generate = efx_ef10_ev_test_generate,
6648	4064	.filter_table_probe = efx_ef10_filter_table_probe,
6649		- .filter_table_restore = efx_ef10_filter_table_restore,
6650		- .filter_table_remove = efx_ef10_filter_table_remove,
6651		- .filter_update_rx_scatter = efx_ef10_filter_update_rx_scatter,
6652		- .filter_insert = efx_ef10_filter_insert,
6653		- .filter_remove_safe = efx_ef10_filter_remove_safe,
6654		- .filter_get_safe = efx_ef10_filter_get_safe,
6655		- .filter_clear_rx = efx_ef10_filter_clear_rx,
6656		- .filter_count_rx_used = efx_ef10_filter_count_rx_used,
6657		- .filter_get_rx_id_limit = efx_ef10_filter_get_rx_id_limit,
6658		- .filter_get_rx_ids = efx_ef10_filter_get_rx_ids,
	4065	+ .filter_table_restore = efx_mcdi_filter_table_restore,
	4066	+ .filter_table_remove = efx_mcdi_filter_table_remove,
	4067	+ .filter_update_rx_scatter = efx_mcdi_update_rx_scatter,
	4068	+ .filter_insert = efx_mcdi_filter_insert,
	4069	+ .filter_remove_safe = efx_mcdi_filter_remove_safe,
	4070	+ .filter_get_safe = efx_mcdi_filter_get_safe,
	4071	+ .filter_clear_rx = efx_mcdi_filter_clear_rx,
	4072	+ .filter_count_rx_used = efx_mcdi_filter_count_rx_used,
	4073	+ .filter_get_rx_id_limit = efx_mcdi_filter_get_rx_id_limit,
	4074	+ .filter_get_rx_ids = efx_mcdi_filter_get_rx_ids,
6659	4075	#ifdef CONFIG_RFS_ACCEL
6660		- .filter_rfs_expire_one = efx_ef10_filter_rfs_expire_one,
	4076	+ .filter_rfs_expire_one = efx_mcdi_filter_rfs_expire_one,
6661	4077	#endif
6662	4078	#ifdef CONFIG_SFC_MTD
6663	4079	.mtd_probe = efx_port_dummy_op_int,
..	..	@@ -6683,14 +4099,16 @@
6683	4099	.can_rx_scatter = true,
6684	4100	.always_rx_scatter = true,
6685	4101	.min_interrupt_mode = EFX_INT_MODE_MSIX,
6686		- .max_interrupt_mode = EFX_INT_MODE_MSIX,
6687	4102	.timer_period_max = 1 << ERF_DD_EVQ_IND_TIMER_VAL_WIDTH,
6688	4103	.offload_features = EF10_OFFLOAD_FEATURES,
6689	4104	.mcdi_max_ver = 2,
6690		- .max_rx_ip_filters = HUNT_FILTER_TBL_ROWS,
	4105	+ .max_rx_ip_filters = EFX_MCDI_FILTER_TBL_ROWS,
6691	4106	.hwtstamp_filters = 1 << HWTSTAMP_FILTER_NONE \|
6692	4107	1 << HWTSTAMP_FILTER_ALL,
6693	4108	.rx_hash_key_size = 40,
	4109	+ .check_caps = ef10_check_caps,
	4110	+ .print_additional_fwver = efx_ef10_print_additional_fwver,
	4111	+ .sensor_event = efx_mcdi_sensor_event,
6694	4112	};
6695	4113
6696	4114	const struct efx_nic_type efx_hunt_a0_nic_type = {
..	..	@@ -6701,13 +4119,13 @@
6701	4119	.remove = efx_ef10_remove,
6702	4120	.dimension_resources = efx_ef10_dimension_resources,
6703	4121	.init = efx_ef10_init_nic,
6704		- .fini = efx_port_dummy_op_void,
	4122	+ .fini = efx_ef10_fini_nic,
6705	4123	.map_reset_reason = efx_ef10_map_reset_reason,
6706	4124	.map_reset_flags = efx_ef10_map_reset_flags,
6707	4125	.reset = efx_ef10_reset,
6708	4126	.probe_port = efx_mcdi_port_probe,
6709	4127	.remove_port = efx_mcdi_port_remove,
6710		- .fini_dmaq = efx_ef10_fini_dmaq,
	4128	+ .fini_dmaq = efx_fini_dmaq,
6711	4129	.prepare_flr = efx_ef10_prepare_flr,
6712	4130	.finish_flr = efx_port_dummy_op_void,
6713	4131	.describe_stats = efx_ef10_describe_stats,
..	..	@@ -6715,7 +4133,6 @@
6715	4133	.start_stats = efx_mcdi_mac_start_stats,
6716	4134	.pull_stats = efx_mcdi_mac_pull_stats,
6717	4135	.stop_stats = efx_mcdi_mac_stop_stats,
6718		- .set_id_led = efx_mcdi_set_id_led,
6719	4136	.push_irq_moderation = efx_ef10_push_irq_moderation,
6720	4137	.reconfigure_mac = efx_ef10_mac_reconfigure,
6721	4138	.check_mac_fault = efx_mcdi_mac_check_fault,
..	..	@@ -6737,39 +4154,41 @@
6737	4154	.irq_handle_legacy = efx_ef10_legacy_interrupt,
6738	4155	.tx_probe = efx_ef10_tx_probe,
6739	4156	.tx_init = efx_ef10_tx_init,
6740		- .tx_remove = efx_ef10_tx_remove,
	4157	+ .tx_remove = efx_mcdi_tx_remove,
6741	4158	.tx_write = efx_ef10_tx_write,
6742	4159	.tx_limit_len = efx_ef10_tx_limit_len,
6743		- .rx_push_rss_config = efx_ef10_pf_rx_push_rss_config,
6744		- .rx_pull_rss_config = efx_ef10_rx_pull_rss_config,
6745		- .rx_push_rss_context_config = efx_ef10_rx_push_rss_context_config,
6746		- .rx_pull_rss_context_config = efx_ef10_rx_pull_rss_context_config,
6747		- .rx_restore_rss_contexts = efx_ef10_rx_restore_rss_contexts,
6748		- .rx_probe = efx_ef10_rx_probe,
6749		- .rx_init = efx_ef10_rx_init,
6750		- .rx_remove = efx_ef10_rx_remove,
	4160	+ .tx_enqueue = __efx_enqueue_skb,
	4161	+ .rx_push_rss_config = efx_mcdi_pf_rx_push_rss_config,
	4162	+ .rx_pull_rss_config = efx_mcdi_rx_pull_rss_config,
	4163	+ .rx_push_rss_context_config = efx_mcdi_rx_push_rss_context_config,
	4164	+ .rx_pull_rss_context_config = efx_mcdi_rx_pull_rss_context_config,
	4165	+ .rx_restore_rss_contexts = efx_mcdi_rx_restore_rss_contexts,
	4166	+ .rx_probe = efx_mcdi_rx_probe,
	4167	+ .rx_init = efx_mcdi_rx_init,
	4168	+ .rx_remove = efx_mcdi_rx_remove,
6751	4169	.rx_write = efx_ef10_rx_write,
6752	4170	.rx_defer_refill = efx_ef10_rx_defer_refill,
6753		- .ev_probe = efx_ef10_ev_probe,
	4171	+ .rx_packet = __efx_rx_packet,
	4172	+ .ev_probe = efx_mcdi_ev_probe,
6754	4173	.ev_init = efx_ef10_ev_init,
6755		- .ev_fini = efx_ef10_ev_fini,
6756		- .ev_remove = efx_ef10_ev_remove,
	4174	+ .ev_fini = efx_mcdi_ev_fini,
	4175	+ .ev_remove = efx_mcdi_ev_remove,
6757	4176	.ev_process = efx_ef10_ev_process,
6758	4177	.ev_read_ack = efx_ef10_ev_read_ack,
6759	4178	.ev_test_generate = efx_ef10_ev_test_generate,
6760	4179	.filter_table_probe = efx_ef10_filter_table_probe,
6761		- .filter_table_restore = efx_ef10_filter_table_restore,
6762		- .filter_table_remove = efx_ef10_filter_table_remove,
6763		- .filter_update_rx_scatter = efx_ef10_filter_update_rx_scatter,
6764		- .filter_insert = efx_ef10_filter_insert,
6765		- .filter_remove_safe = efx_ef10_filter_remove_safe,
6766		- .filter_get_safe = efx_ef10_filter_get_safe,
6767		- .filter_clear_rx = efx_ef10_filter_clear_rx,
6768		- .filter_count_rx_used = efx_ef10_filter_count_rx_used,
6769		- .filter_get_rx_id_limit = efx_ef10_filter_get_rx_id_limit,
6770		- .filter_get_rx_ids = efx_ef10_filter_get_rx_ids,
	4180	+ .filter_table_restore = efx_mcdi_filter_table_restore,
	4181	+ .filter_table_remove = efx_mcdi_filter_table_remove,
	4182	+ .filter_update_rx_scatter = efx_mcdi_update_rx_scatter,
	4183	+ .filter_insert = efx_mcdi_filter_insert,
	4184	+ .filter_remove_safe = efx_mcdi_filter_remove_safe,
	4185	+ .filter_get_safe = efx_mcdi_filter_get_safe,
	4186	+ .filter_clear_rx = efx_mcdi_filter_clear_rx,
	4187	+ .filter_count_rx_used = efx_mcdi_filter_count_rx_used,
	4188	+ .filter_get_rx_id_limit = efx_mcdi_filter_get_rx_id_limit,
	4189	+ .filter_get_rx_ids = efx_mcdi_filter_get_rx_ids,
6771	4190	#ifdef CONFIG_RFS_ACCEL
6772		- .filter_rfs_expire_one = efx_ef10_filter_rfs_expire_one,
	4191	+ .filter_rfs_expire_one = efx_mcdi_filter_rfs_expire_one,
6773	4192	#endif
6774	4193	#ifdef CONFIG_SFC_MTD
6775	4194	.mtd_probe = efx_ef10_mtd_probe,
..	..	@@ -6785,9 +4204,7 @@
6785	4204	.vlan_rx_add_vid = efx_ef10_vlan_rx_add_vid,
6786	4205	.vlan_rx_kill_vid = efx_ef10_vlan_rx_kill_vid,
6787	4206	.udp_tnl_push_ports = efx_ef10_udp_tnl_push_ports,
6788		- .udp_tnl_add_port = efx_ef10_udp_tnl_add_port,
6789	4207	.udp_tnl_has_port = efx_ef10_udp_tnl_has_port,
6790		- .udp_tnl_del_port = efx_ef10_udp_tnl_del_port,
6791	4208	#ifdef CONFIG_SFC_SRIOV
6792	4209	.sriov_configure = efx_ef10_sriov_configure,
6793	4210	.sriov_init = efx_ef10_sriov_init,
..	..	@@ -6818,12 +4235,14 @@
6818	4235	.always_rx_scatter = true,
6819	4236	.option_descriptors = true,
6820	4237	.min_interrupt_mode = EFX_INT_MODE_LEGACY,
6821		- .max_interrupt_mode = EFX_INT_MODE_MSIX,
6822	4238	.timer_period_max = 1 << ERF_DD_EVQ_IND_TIMER_VAL_WIDTH,
6823	4239	.offload_features = EF10_OFFLOAD_FEATURES,
6824	4240	.mcdi_max_ver = 2,
6825		- .max_rx_ip_filters = HUNT_FILTER_TBL_ROWS,
	4241	+ .max_rx_ip_filters = EFX_MCDI_FILTER_TBL_ROWS,
6826	4242	.hwtstamp_filters = 1 << HWTSTAMP_FILTER_NONE \|
6827	4243	1 << HWTSTAMP_FILTER_ALL,
6828	4244	.rx_hash_key_size = 40,
	4245	+ .check_caps = ef10_check_caps,
	4246	+ .print_additional_fwver = efx_ef10_print_additional_fwver,
	4247	+ .sensor_event = efx_mcdi_sensor_event,
6829	4248	};