.. | .. |
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122 | 122 | unsigned int base; /* base index */ |
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123 | 123 | unsigned int next; /* next possible free index */ |
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124 | 124 | spinlock_t lock; /* ppm pool lock */ |
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125 | | - unsigned long bmap[0]; |
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| 125 | + unsigned long bmap[]; |
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126 | 126 | } ____cacheline_aligned_in_smp; |
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127 | 127 | |
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128 | 128 | struct cxgbi_ppm { |
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143 | 143 | spinlock_t map_lock; /* ppm map lock */ |
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144 | 144 | unsigned int bmap_index_max; |
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145 | 145 | unsigned int next; |
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| 146 | + unsigned int max_index_in_edram; |
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146 | 147 | unsigned long *ppod_bmap; |
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147 | | - struct cxgbi_ppod_data ppod_data[0]; |
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| 148 | + struct cxgbi_ppod_data ppod_data[]; |
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148 | 149 | }; |
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149 | 150 | |
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150 | 151 | #define DDP_THRESHOLD 512 |
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324 | 325 | unsigned long caller_data); |
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325 | 326 | int cxgbi_ppm_init(void **ppm_pp, struct net_device *, struct pci_dev *, |
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326 | 327 | void *lldev, struct cxgbi_tag_format *, |
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327 | | - unsigned int ppmax, unsigned int llimit, |
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328 | | - unsigned int start, |
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329 | | - unsigned int reserve_factor); |
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| 328 | + unsigned int iscsi_size, unsigned int llimit, |
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| 329 | + unsigned int start, unsigned int reserve_factor, |
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| 330 | + unsigned int edram_start, unsigned int edram_size); |
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330 | 331 | int cxgbi_ppm_release(struct cxgbi_ppm *ppm); |
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331 | 332 | void cxgbi_tagmask_check(unsigned int tagmask, struct cxgbi_tag_format *); |
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332 | 333 | unsigned int cxgbi_tagmask_set(unsigned int ppmax); |
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