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2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da 
 kernel/drivers/mtd/nand/spi/unim.c
....@@ -10,7 +10,8 @@
1010 #include <linux/kernel.h>
1111 #include <linux/mtd/spinand.h>
1212 
13
-#define SPINAND_MFR_UNIM		0xA1
13
+#define SPINAND_MFR_UNIM_ZL		0xA1
14
+#define SPINAND_MFR_UNIM		0xB0
1415 
1516 static SPINAND_OP_VARIANTS(read_cache_variants,
1617 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
....@@ -57,6 +58,59 @@
5758 	.free = tx25g01_ooblayout_free,
5859 };
5960 
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+
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+static int um19a0xisw_ooblayout_ecc(struct mtd_info *mtd, int section,
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+				  struct mtd_oob_region *region)
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+{
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+	return -ERANGE;
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+}
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+
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+static int um19a0xisw_ooblayout_free(struct mtd_info *mtd, int section,
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+				   struct mtd_oob_region *region)
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+{
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+	if (section)
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+		return -ERANGE;
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+
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+	region->offset = 2;
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+	region->length = 62;
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+
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+	return 0;
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+}
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+
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+static const struct mtd_ooblayout_ops um19a0xisw_ooblayout = {
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+	.ecc = um19a0xisw_ooblayout_ecc,
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+	.free = um19a0xisw_ooblayout_free,
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+};
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+
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+static int um19a1xisw_ooblayout_ecc(struct mtd_info *mtd, int section,
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+				 struct mtd_oob_region *region)
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+{
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+	if (section)
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+		return -ERANGE;
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+
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+	region->offset = 64;
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+	region->length = 64;
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+
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+	return 0;
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+}
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+
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+static int um19a1xisw_ooblayout_free(struct mtd_info *mtd, int section,
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+				  struct mtd_oob_region *region)
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+{
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+	if (section)
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+		return -ERANGE;
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+
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+	region->offset = 2;
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+	region->length = 62;
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+
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+	return 0;
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+}
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+
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+static const struct mtd_ooblayout_ops um19a1xisw_ooblayout = {
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+	.ecc = um19a1xisw_ooblayout_ecc,
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+	.free = um19a1xisw_ooblayout_free,
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+};
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+
60114 /*
61115  * ecc bits: 0xC0[4,6]
62116  * [0b000], No bit errors were detected;
....@@ -80,7 +134,32 @@
80134 		return -EBADMSG;
81135 }
82136 
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-static const struct spinand_info unim_spinand_table[] = {
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+/*
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+ * ecc bits: 0xC0[4,6]
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+ * [0b000], No bit errors were detected;
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+ * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not
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+ *	reach Flipping Bits;
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+ * [0b101], Bit error count equals the bit flip
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+ *	detection threshold
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+ * [0b010], Multiple bit errors were detected and
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+ *	not corrected.
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+ * others, Reserved.
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+ */
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+static int um19axxisw_ecc_ecc_get_status(struct spinand_device *spinand,
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+					u8 status)
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+{
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+	struct nand_device *nand = spinand_to_nand(spinand);
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+	u8 eccsr = (status & GENMASK(6, 4)) >> 4;
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+
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+	if (eccsr <= 1 || eccsr == 3)
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+		return eccsr;
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+	else if (eccsr == 5)
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+		return nanddev_get_ecc_requirements(nand)->strength;
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+	else
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+		return -EBADMSG;
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+}
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+
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+static const struct spinand_info unim_zl_spinand_table[] = {
84163 	SPINAND_INFO("TX25G01",
85164 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1),
86165 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
....@@ -92,9 +171,56 @@
92171 		     SPINAND_ECCINFO(&tx25g01_ooblayout, tx25g01_ecc_get_status)),
93172 };
94173 
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+static const struct spinand_info unim_spinand_table[] = {
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+	SPINAND_INFO("UM19A1HISW",
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+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24),
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+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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+		     NAND_ECCREQ(8, 512),
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+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+					      &write_cache_variants,
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+					      &update_cache_variants),
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+		     SPINAND_HAS_QE_BIT,
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+		     SPINAND_ECCINFO(&um19a1xisw_ooblayout, um19axxisw_ecc_ecc_get_status)),
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+	SPINAND_INFO("UM19A0HCSW",
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+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x14),
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+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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+		     NAND_ECCREQ(8, 512),
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+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+					      &write_cache_variants,
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+					      &update_cache_variants),
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+		     SPINAND_HAS_QE_BIT,
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+		     SPINAND_ECCINFO(&um19a0xisw_ooblayout, um19axxisw_ecc_ecc_get_status)),
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+	SPINAND_INFO("UM19A0LCSW",
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+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x15),
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+		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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+		     NAND_ECCREQ(8, 512),
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+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+					      &write_cache_variants,
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+					      &update_cache_variants),
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+		     SPINAND_HAS_QE_BIT,
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+		     SPINAND_ECCINFO(&um19a0xisw_ooblayout, um19axxisw_ecc_ecc_get_status)),
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+	SPINAND_INFO("UM19A1LISW",
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+		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x25),
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+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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+		     NAND_ECCREQ(8, 512),
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+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+					      &write_cache_variants,
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+					      &update_cache_variants),
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+		     SPINAND_HAS_QE_BIT,
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+		     SPINAND_ECCINFO(&um19a1xisw_ooblayout, um19axxisw_ecc_ecc_get_status)),
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+};
212
+
95213 static const struct spinand_manufacturer_ops unim_spinand_manuf_ops = {
96214 };
97215 
216
+const struct spinand_manufacturer unim_zl_spinand_manufacturer = {
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+	.id = SPINAND_MFR_UNIM_ZL,
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+	.name = "UNIM_ZL",
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+	.chips = unim_zl_spinand_table,
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+	.nchips = ARRAY_SIZE(unim_zl_spinand_table),
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+	.ops = &unim_spinand_manuf_ops,
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+};
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+
98224 const struct spinand_manufacturer unim_spinand_manufacturer = {
99225 	.id = SPINAND_MFR_UNIM,
100226 	.name = "UNIM",