hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/mtd/nand/raw/mtk_ecc.c
....@@ -1,17 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0 OR MIT
12 /*
23 * MTK ECC controller driver.
34 * Copyright (C) 2016 MediaTek Inc.
45 * Authors: Xiaolei Li <xiaolei.li@mediatek.com>
56 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
10
- *
11
- * This program is distributed in the hope that it will be useful,
12
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14
- * GNU General Public License for more details.
157 */
168
179 #include <linux/platform_device.h>
....@@ -51,6 +43,7 @@
5143
5244 struct mtk_ecc_caps {
5345 u32 err_mask;
46
+ u32 err_shift;
5447 const u8 *ecc_strength;
5548 const u32 *ecc_regs;
5649 u8 num_ecc_strength;
....@@ -84,7 +77,7 @@
8477 };
8578
8679 static const u8 ecc_strength_mt7622[] = {
87
- 4, 6, 8, 10, 12, 14, 16
80
+ 4, 6, 8, 10, 12
8881 };
8982
9083 enum mtk_ecc_regs {
....@@ -229,7 +222,7 @@
229222 for (i = 0; i < sectors; i++) {
230223 offset = (i >> 2) << 2;
231224 err = readl(ecc->regs + ECC_DECENUM0 + offset);
232
- err = err >> ((i % 4) * 8);
225
+ err = err >> ((i % 4) * ecc->caps->err_shift);
233226 err &= ecc->caps->err_mask;
234227 if (err == ecc->caps->err_mask) {
235228 /* uncorrectable errors */
....@@ -267,11 +260,15 @@
267260 struct mtk_ecc *ecc;
268261
269262 pdev = of_find_device_by_node(np);
270
- if (!pdev || !platform_get_drvdata(pdev))
263
+ if (!pdev)
271264 return ERR_PTR(-EPROBE_DEFER);
272265
273
- get_device(&pdev->dev);
274266 ecc = platform_get_drvdata(pdev);
267
+ if (!ecc) {
268
+ put_device(&pdev->dev);
269
+ return ERR_PTR(-EPROBE_DEFER);
270
+ }
271
+
275272 clk_prepare_enable(ecc->clk);
276273 mtk_ecc_hw_init(ecc);
277274
....@@ -453,6 +450,7 @@
453450
454451 static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = {
455452 .err_mask = 0x3f,
453
+ .err_shift = 8,
456454 .ecc_strength = ecc_strength_mt2701,
457455 .ecc_regs = mt2701_ecc_regs,
458456 .num_ecc_strength = 20,
....@@ -463,6 +461,7 @@
463461
464462 static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = {
465463 .err_mask = 0x7f,
464
+ .err_shift = 8,
466465 .ecc_strength = ecc_strength_mt2712,
467466 .ecc_regs = mt2712_ecc_regs,
468467 .num_ecc_strength = 23,
....@@ -472,10 +471,11 @@
472471 };
473472
474473 static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = {
475
- .err_mask = 0x3f,
474
+ .err_mask = 0x1f,
475
+ .err_shift = 5,
476476 .ecc_strength = ecc_strength_mt7622,
477477 .ecc_regs = mt7622_ecc_regs,
478
- .num_ecc_strength = 7,
478
+ .num_ecc_strength = 5,
479479 .ecc_mode_shift = 4,
480480 .parity_bits = 13,
481481 .pg_irq_sel = 0,
....@@ -531,10 +531,8 @@
531531 }
532532
533533 irq = platform_get_irq(pdev, 0);
534
- if (irq < 0) {
535
- dev_err(dev, "failed to get irq: %d\n", irq);
534
+ if (irq < 0)
536535 return irq;
537
- }
538536
539537 ret = dma_set_mask(dev, DMA_BIT_MASK(32));
540538 if (ret) {
....@@ -600,4 +598,4 @@
600598
601599 MODULE_AUTHOR("Xiaolei Li <xiaolei.li@mediatek.com>");
602600 MODULE_DESCRIPTION("MTK Nand ECC Driver");
603
-MODULE_LICENSE("GPL");
601
+MODULE_LICENSE("Dual MIT/GPL");