hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/misc/cardreader/rtsx_pcr.h
....@@ -1,19 +1,7 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /* Driver for Realtek PCI-Express card reader
23 *
34 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of the GNU General Public License as published by the
7
- * Free Software Foundation; either version 2, or (at your option) any
8
- * later version.
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- *
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- * This program is distributed in the hope that it will be useful, but
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- * WITHOUT ANY WARRANTY; without even the implied warranty of
12
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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- * General Public License for more details.
14
- *
15
- * You should have received a copy of the GNU General Public License along
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- * with this program; if not, see <http://www.gnu.org/licenses/>.
175 *
186 * Author:
197 * Wei WANG <wei_wang@realsil.com.cn>
....@@ -30,7 +18,24 @@
3018 #define RTS522A_PM_CTRL3 0xFF7E
3119
3220 #define RTS524A_PME_FORCE_CTL 0xFF78
21
+#define REG_EFUSE_BYPASS 0x08
22
+#define REG_EFUSE_POR 0x04
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+#define REG_EFUSE_POWER_MASK 0x03
24
+#define REG_EFUSE_POWERON 0x03
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+#define REG_EFUSE_POWEROFF 0x00
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+#define RTS5250_CLK_CFG3 0xFF79
27
+#define RTS525A_CFG_MEM_PD 0xF0
3328 #define RTS524A_PM_CTRL3 0xFF7E
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+#define RTS525A_BIOS_CFG 0xFF2D
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+#define RTS525A_LOAD_BIOS_FLAG 0x01
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+#define RTS525A_CLEAR_BIOS_FLAG 0x00
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+
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+#define RTS525A_EFUSE_CTL 0xFC32
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+#define REG_EFUSE_ENABLE 0x80
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+#define REG_EFUSE_MODE 0x40
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+#define RTS525A_EFUSE_ADD 0xFC33
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+#define REG_EFUSE_ADD_MASK 0x3F
38
+#define RTS525A_EFUSE_DATA 0xFC35
3439
3540 #define LTR_ACTIVE_LATENCY_DEF 0x883C
3641 #define LTR_IDLE_LATENCY_DEF 0x892C
....@@ -41,10 +46,14 @@
4146 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF 0xAC
4247 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF 0xF8
4348 #define CMD_TIMEOUT_DEF 100
44
-#define ASPM_MASK_NEG 0xFC
4549 #define MASK_8_BIT_DEF 0xFF
4650
4751 #define SSC_CLOCK_STABLE_WAIT 130
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+
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+#define RTS524A_OCP_THD_800 0x04
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+#define RTS525A_OCP_THD_800 0x05
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+#define RTS522A_OCP_THD_800 0x06
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+
4857
4958 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
5059 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
....@@ -60,6 +69,8 @@
6069 void rts525a_init_params(struct rtsx_pcr *pcr);
6170 void rtl8411b_init_params(struct rtsx_pcr *pcr);
6271 void rts5260_init_params(struct rtsx_pcr *pcr);
72
+void rts5261_init_params(struct rtsx_pcr *pcr);
73
+void rts5228_init_params(struct rtsx_pcr *pcr);
6374
6475 static inline u8 map_sd_drive(int idx)
6576 {
....@@ -77,6 +88,8 @@
7788 #define rts5209_vendor_setting1_valid(reg) (!((reg) & 0x80))
7889 #define rts5209_vendor_setting2_valid(reg) ((reg) & 0x80)
7990
91
+#define rtsx_check_mmc_support(reg) ((reg) & 0x10)
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+#define rtsx_reg_to_rtd3(reg) ((reg) & 0x02)
8093 #define rtsx_reg_to_aspm(reg) (((reg) >> 28) & 0x03)
8194 #define rtsx_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 26) & 0x03)
8295 #define rtsx_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x03)
....@@ -107,6 +120,8 @@
107120 void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr);
108121 int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val);
109122 void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr);
123
+void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr);
124
+void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr);
110125 int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr);
111126 int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr);
112127