.. | .. |
---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
---|
1 | 2 | /* |
---|
2 | 3 | * SMI PCIe driver for DVBSky cards. |
---|
3 | 4 | * |
---|
4 | 5 | * Copyright (C) 2014 Max nibble <nibble.max@gmail.com> |
---|
5 | | - * |
---|
6 | | - * This program is free software; you can redistribute it and/or modify |
---|
7 | | - * it under the terms of the GNU General Public License as published by |
---|
8 | | - * the Free Software Foundation; either version 2 of the License, or |
---|
9 | | - * (at your option) any later version. |
---|
10 | | - * |
---|
11 | | - * This program is distributed in the hope that it will be useful, |
---|
12 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
---|
13 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
---|
14 | | - * GNU General Public License for more details. |
---|
15 | 6 | */ |
---|
16 | 7 | |
---|
17 | 8 | #include "smipcie.h" |
---|
| 9 | + |
---|
| 10 | +#define SMI_SAMPLE_PERIOD 83 |
---|
| 11 | +#define SMI_SAMPLE_IDLEMIN (10000 / SMI_SAMPLE_PERIOD) |
---|
18 | 12 | |
---|
19 | 13 | static void smi_ir_enableInterrupt(struct smi_rc *ir) |
---|
20 | 14 | { |
---|
.. | .. |
---|
42 | 36 | struct smi_dev *dev = ir->dev; |
---|
43 | 37 | |
---|
44 | 38 | smi_ir_disableInterrupt(ir); |
---|
45 | | - smi_clear(IR_Init_Reg, 0x80); |
---|
| 39 | + smi_clear(IR_Init_Reg, rbIRen); |
---|
46 | 40 | } |
---|
47 | 41 | |
---|
48 | | -#define BITS_PER_COMMAND 14 |
---|
49 | | -#define GROUPS_PER_BIT 2 |
---|
50 | | -#define IR_RC5_MIN_BIT 36 |
---|
51 | | -#define IR_RC5_MAX_BIT 52 |
---|
52 | | -static u32 smi_decode_rc5(u8 *pData, u8 size) |
---|
| 42 | +static void smi_raw_process(struct rc_dev *rc_dev, const u8 *buffer, |
---|
| 43 | + const u8 length) |
---|
53 | 44 | { |
---|
54 | | - u8 index, current_bit, bit_count; |
---|
55 | | - u8 group_array[BITS_PER_COMMAND * GROUPS_PER_BIT + 4]; |
---|
56 | | - u8 group_index = 0; |
---|
57 | | - u32 command = 0xFFFFFFFF; |
---|
| 45 | + struct ir_raw_event rawir = {}; |
---|
| 46 | + int cnt; |
---|
58 | 47 | |
---|
59 | | - group_array[group_index++] = 1; |
---|
60 | | - |
---|
61 | | - for (index = 0; index < size; index++) { |
---|
62 | | - |
---|
63 | | - current_bit = (pData[index] & 0x80) ? 1 : 0; |
---|
64 | | - bit_count = pData[index] & 0x7f; |
---|
65 | | - |
---|
66 | | - if ((current_bit == 1) && (bit_count >= 2*IR_RC5_MAX_BIT + 1)) { |
---|
67 | | - goto process_code; |
---|
68 | | - } else if ((bit_count >= IR_RC5_MIN_BIT) && |
---|
69 | | - (bit_count <= IR_RC5_MAX_BIT)) { |
---|
70 | | - group_array[group_index++] = current_bit; |
---|
71 | | - } else if ((bit_count > IR_RC5_MAX_BIT) && |
---|
72 | | - (bit_count <= 2*IR_RC5_MAX_BIT)) { |
---|
73 | | - group_array[group_index++] = current_bit; |
---|
74 | | - group_array[group_index++] = current_bit; |
---|
75 | | - } else { |
---|
76 | | - goto invalid_timing; |
---|
77 | | - } |
---|
78 | | - if (group_index >= BITS_PER_COMMAND*GROUPS_PER_BIT) |
---|
79 | | - goto process_code; |
---|
80 | | - |
---|
81 | | - if ((group_index == BITS_PER_COMMAND*GROUPS_PER_BIT - 1) |
---|
82 | | - && (group_array[group_index-1] == 0)) { |
---|
83 | | - group_array[group_index++] = 1; |
---|
84 | | - goto process_code; |
---|
| 48 | + for (cnt = 0; cnt < length; cnt++) { |
---|
| 49 | + if (buffer[cnt] & 0x7f) { |
---|
| 50 | + rawir.pulse = (buffer[cnt] & 0x80) == 0; |
---|
| 51 | + rawir.duration = ((buffer[cnt] & 0x7f) + |
---|
| 52 | + (rawir.pulse ? 0 : -1)) * |
---|
| 53 | + rc_dev->rx_resolution; |
---|
| 54 | + ir_raw_event_store_with_filter(rc_dev, &rawir); |
---|
85 | 55 | } |
---|
86 | 56 | } |
---|
87 | | - |
---|
88 | | -process_code: |
---|
89 | | - if (group_index == (BITS_PER_COMMAND*GROUPS_PER_BIT-1)) |
---|
90 | | - group_array[group_index++] = 1; |
---|
91 | | - |
---|
92 | | - if (group_index == BITS_PER_COMMAND*GROUPS_PER_BIT) { |
---|
93 | | - command = 0; |
---|
94 | | - for (index = 0; index < (BITS_PER_COMMAND*GROUPS_PER_BIT); |
---|
95 | | - index = index + 2) { |
---|
96 | | - if ((group_array[index] == 1) && |
---|
97 | | - (group_array[index+1] == 0)) { |
---|
98 | | - command |= (1 << (BITS_PER_COMMAND - |
---|
99 | | - (index/2) - 1)); |
---|
100 | | - } else if ((group_array[index] == 0) && |
---|
101 | | - (group_array[index+1] == 1)) { |
---|
102 | | - /* */ |
---|
103 | | - } else { |
---|
104 | | - command = 0xFFFFFFFF; |
---|
105 | | - goto invalid_timing; |
---|
106 | | - } |
---|
107 | | - } |
---|
108 | | - } |
---|
109 | | - |
---|
110 | | -invalid_timing: |
---|
111 | | - return command; |
---|
112 | 57 | } |
---|
113 | 58 | |
---|
114 | | -static void smi_ir_decode(struct work_struct *work) |
---|
| 59 | +static void smi_ir_decode(struct smi_rc *ir) |
---|
115 | 60 | { |
---|
116 | | - struct smi_rc *ir = container_of(work, struct smi_rc, work); |
---|
117 | 61 | struct smi_dev *dev = ir->dev; |
---|
118 | 62 | struct rc_dev *rc_dev = ir->rc_dev; |
---|
119 | | - u32 dwIRControl, dwIRData, dwIRCode, scancode; |
---|
120 | | - u8 index, ucIRCount, readLoop, rc5_command, rc5_system, toggle; |
---|
| 63 | + u32 control, data; |
---|
| 64 | + u8 index, ir_count, read_loop; |
---|
121 | 65 | |
---|
122 | | - dwIRControl = smi_read(IR_Init_Reg); |
---|
123 | | - if (dwIRControl & rbIRVld) { |
---|
124 | | - ucIRCount = (u8) smi_read(IR_Data_Cnt); |
---|
| 66 | + control = smi_read(IR_Init_Reg); |
---|
125 | 67 | |
---|
126 | | - if (ucIRCount < 4) |
---|
127 | | - goto end_ir_decode; |
---|
| 68 | + dev_dbg(&rc_dev->dev, "ircontrol: 0x%08x\n", control); |
---|
128 | 69 | |
---|
129 | | - readLoop = ucIRCount/4; |
---|
130 | | - if (ucIRCount % 4) |
---|
131 | | - readLoop += 1; |
---|
132 | | - for (index = 0; index < readLoop; index++) { |
---|
133 | | - dwIRData = smi_read(IR_DATA_BUFFER_BASE + (index*4)); |
---|
| 70 | + if (control & rbIRVld) { |
---|
| 71 | + ir_count = (u8)smi_read(IR_Data_Cnt); |
---|
134 | 72 | |
---|
135 | | - ir->irData[index*4 + 0] = (u8)(dwIRData); |
---|
136 | | - ir->irData[index*4 + 1] = (u8)(dwIRData >> 8); |
---|
137 | | - ir->irData[index*4 + 2] = (u8)(dwIRData >> 16); |
---|
138 | | - ir->irData[index*4 + 3] = (u8)(dwIRData >> 24); |
---|
| 73 | + dev_dbg(&rc_dev->dev, "ircount %d\n", ir_count); |
---|
| 74 | + |
---|
| 75 | + read_loop = ir_count / 4; |
---|
| 76 | + if (ir_count % 4) |
---|
| 77 | + read_loop += 1; |
---|
| 78 | + for (index = 0; index < read_loop; index++) { |
---|
| 79 | + data = smi_read(IR_DATA_BUFFER_BASE + (index * 4)); |
---|
| 80 | + dev_dbg(&rc_dev->dev, "IRData 0x%08x\n", data); |
---|
| 81 | + |
---|
| 82 | + ir->irData[index * 4 + 0] = (u8)(data); |
---|
| 83 | + ir->irData[index * 4 + 1] = (u8)(data >> 8); |
---|
| 84 | + ir->irData[index * 4 + 2] = (u8)(data >> 16); |
---|
| 85 | + ir->irData[index * 4 + 3] = (u8)(data >> 24); |
---|
139 | 86 | } |
---|
140 | | - dwIRCode = smi_decode_rc5(ir->irData, ucIRCount); |
---|
141 | | - |
---|
142 | | - if (dwIRCode != 0xFFFFFFFF) { |
---|
143 | | - rc5_command = dwIRCode & 0x3F; |
---|
144 | | - rc5_system = (dwIRCode & 0x7C0) >> 6; |
---|
145 | | - toggle = (dwIRCode & 0x800) ? 1 : 0; |
---|
146 | | - scancode = rc5_system << 8 | rc5_command; |
---|
147 | | - rc_keydown(rc_dev, RC_PROTO_RC5, scancode, toggle); |
---|
148 | | - } |
---|
| 87 | + smi_raw_process(rc_dev, ir->irData, ir_count); |
---|
149 | 88 | } |
---|
150 | | -end_ir_decode: |
---|
151 | | - smi_set(IR_Init_Reg, 0x04); |
---|
152 | | - smi_ir_enableInterrupt(ir); |
---|
| 89 | + |
---|
| 90 | + if (control & rbIRhighidle) { |
---|
| 91 | + struct ir_raw_event rawir = {}; |
---|
| 92 | + |
---|
| 93 | + dev_dbg(&rc_dev->dev, "high idle\n"); |
---|
| 94 | + |
---|
| 95 | + rawir.pulse = 0; |
---|
| 96 | + rawir.duration = SMI_SAMPLE_PERIOD * SMI_SAMPLE_IDLEMIN; |
---|
| 97 | + ir_raw_event_store_with_filter(rc_dev, &rawir); |
---|
| 98 | + } |
---|
| 99 | + |
---|
| 100 | + smi_set(IR_Init_Reg, rbIRVld); |
---|
| 101 | + ir_raw_event_handle(rc_dev); |
---|
153 | 102 | } |
---|
154 | 103 | |
---|
155 | 104 | /* ir functions call by main driver.*/ |
---|
.. | .. |
---|
160 | 109 | if (int_status & IR_X_INT) { |
---|
161 | 110 | smi_ir_disableInterrupt(ir); |
---|
162 | 111 | smi_ir_clearInterrupt(ir); |
---|
163 | | - schedule_work(&ir->work); |
---|
| 112 | + smi_ir_decode(ir); |
---|
| 113 | + smi_ir_enableInterrupt(ir); |
---|
164 | 114 | handled = 1; |
---|
165 | 115 | } |
---|
166 | 116 | return handled; |
---|
.. | .. |
---|
170 | 120 | { |
---|
171 | 121 | struct smi_dev *dev = ir->dev; |
---|
172 | 122 | |
---|
173 | | - smi_write(IR_Idle_Cnt_Low, 0x00140070); |
---|
| 123 | + smi_write(IR_Idle_Cnt_Low, |
---|
| 124 | + (((SMI_SAMPLE_PERIOD - 1) & 0xFFFF) << 16) | |
---|
| 125 | + (SMI_SAMPLE_IDLEMIN & 0xFFFF)); |
---|
174 | 126 | msleep(20); |
---|
175 | | - smi_set(IR_Init_Reg, 0x90); |
---|
| 127 | + smi_set(IR_Init_Reg, rbIRen | rbIRhighidle); |
---|
176 | 128 | |
---|
177 | 129 | smi_ir_enableInterrupt(ir); |
---|
178 | 130 | } |
---|
.. | .. |
---|
183 | 135 | struct rc_dev *rc_dev; |
---|
184 | 136 | struct smi_rc *ir = &dev->ir; |
---|
185 | 137 | |
---|
186 | | - rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE); |
---|
| 138 | + rc_dev = rc_allocate_device(RC_DRIVER_IR_RAW); |
---|
187 | 139 | if (!rc_dev) |
---|
188 | 140 | return -ENOMEM; |
---|
189 | 141 | |
---|
.. | .. |
---|
193 | 145 | snprintf(ir->input_phys, sizeof(ir->input_phys), "pci-%s/ir0", |
---|
194 | 146 | pci_name(dev->pci_dev)); |
---|
195 | 147 | |
---|
| 148 | + rc_dev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; |
---|
196 | 149 | rc_dev->driver_name = "SMI_PCIe"; |
---|
197 | 150 | rc_dev->input_phys = ir->input_phys; |
---|
198 | 151 | rc_dev->device_name = ir->device_name; |
---|
.. | .. |
---|
203 | 156 | rc_dev->dev.parent = &dev->pci_dev->dev; |
---|
204 | 157 | |
---|
205 | 158 | rc_dev->map_name = dev->info->rc_map; |
---|
| 159 | + rc_dev->timeout = SMI_SAMPLE_PERIOD * SMI_SAMPLE_IDLEMIN; |
---|
| 160 | + rc_dev->rx_resolution = SMI_SAMPLE_PERIOD; |
---|
206 | 161 | |
---|
207 | 162 | ir->rc_dev = rc_dev; |
---|
208 | 163 | ir->dev = dev; |
---|
209 | 164 | |
---|
210 | | - INIT_WORK(&ir->work, smi_ir_decode); |
---|
211 | 165 | smi_ir_disableInterrupt(ir); |
---|
212 | 166 | |
---|
213 | 167 | ret = rc_register_device(rc_dev); |
---|
.. | .. |
---|
225 | 179 | struct smi_rc *ir = &dev->ir; |
---|
226 | 180 | struct rc_dev *rc_dev = ir->rc_dev; |
---|
227 | 181 | |
---|
228 | | - smi_ir_stop(ir); |
---|
229 | 182 | rc_unregister_device(rc_dev); |
---|
| 183 | + smi_ir_stop(ir); |
---|
230 | 184 | ir->rc_dev = NULL; |
---|
231 | 185 | } |
---|