add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/media/dvb-frontends/drx39xyj/drxj.h
..
..
@@ -49,7 +49,7 @@
49
49
 #if ((DRXDAP_SINGLE_MASTER == 0) && (DRXDAPFASI_LONG_ADDR_ALLOWED == 0))
50
50
 #error "Multi master mode and short addressing only is an illegal combination"
51
51
 	*;			/* Generate a fatal compiler error to make sure it stops here,
52
-				   this is necesarry because not all compilers stop after a #error. */
52
+				   this is necessary because not all compilers stop after a #error. */
53
53
 #endif
54
54
 
55
55
 /*-------------------------------------------------------------------------
..
..
@@ -203,7 +203,7 @@
203
203
 * /struct drxjrs_errors
204
204
 * Available failure information in DRXJ_FEC_RS.
205
205
 *
206
-* Container for errors that are received in the most recently finished measurment period
206
+* Container for errors that are received in the most recently finished measurement period
207
207
 *
208
208
 */
209
209
 	struct drxjrs_errors {
..
..
@@ -405,7 +405,7 @@
405
405
 *
406
406
 */
407
407
 	struct drxj_data {
408
-		/* device capabilties (determined during drx_open()) */
408
+		/* device capabilities (determined during drx_open()) */
409
409
 		bool has_lna;		  /*< true if LNA (aka PGA) present */
410
410
 		bool has_oob;		  /*< true if OOB supported */
411
411
 		bool has_ntsc;		  /*< true if NTSC supported */
..
..
@@ -455,7 +455,7 @@
455
455
 
456
456
 		/* IQM fs frequecy shift and inversion */
457
457
 		u32 iqm_fs_rate_ofs;	   /*< frequency shifter setting after setchannel      */
458
-		bool pos_image;	   /*< Ture: positive image                            */
458
+		bool pos_image;	   /*< True: positive image                            */
459
459
 		/* IQM RC frequecy shift */
460
460
 		u32 iqm_rc_rate_ofs;	   /*< frequency shifter setting after setchannel      */
461
461
 
..
..
@@ -468,8 +468,8 @@
468
468
 		bool phase_correction_bypass;/*< flag: true=bypass */
469
469
 		s16 atv_top_vid_peak;	  /*< shadow of ATV_TOP_VID_PEAK__A */
470
470
 		u16 atv_top_noise_th;	  /*< shadow of ATV_TOP_NOISE_TH__A */
471
-		bool enable_cvbs_output;  /*< flag CVBS ouput enable */
472
-		bool enable_sif_output;	  /*< flag SIF ouput enable */
471
+		bool enable_cvbs_output;  /*< flag CVBS output enable */
472
+		bool enable_sif_output;	  /*< flag SIF output enable */
473
473
 		 enum drxjsif_attenuation sif_attenuation;
474
474
 					  /*< current SIF att setting */
475
475
 		/* Agc configuration for QAM and VSB */