add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.h
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@@ -67,7 +67,7 @@
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 * (2 bytes). The DAP can operate in 3 modes:
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 * (1) only short
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 * (2) only long
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-* (3) both long and short but short preferred and long only when necesarry
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+* (3) both long and short but short preferred and long only when necessary
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 *
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 * These modes must be selected compile time via compile switches.
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 * Compile switch settings for the different modes:
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@@ -112,14 +112,14 @@
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 *  + single master mode means no use of repeated starts
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 *  + multi master mode means use of repeated starts
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 *  Default is single master.
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-*  Default can be overriden by setting the compile switch DRXDAP_SINGLE_MASTER.
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+*  Default can be overridden by setting the compile switch DRXDAP_SINGLE_MASTER.
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 *
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 * Slave:
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 * Single/multi master selected via the flags in the FASI protocol.
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 *  + single master means remember memory address between i2c packets
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 *  + multimaster means flush memory address between i2c packets
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 *  Default is single master, DAP FASI changes multi-master setting silently
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-*  into single master setting. This cannot be overrriden.
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+*  into single master setting. This cannot be overridden.
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 *
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 */
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 /* set default */
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@@ -139,7 +139,7 @@
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 * In single master mode, data can be written by sending the register address
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 * first, then two or four bytes of data in the next packet.
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 * Because the device address plus a register address equals five bytes,
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-* the mimimum chunk size must be five.
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+* the minimum chunk size must be five.
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 * If ten-bit I2C device addresses are used, the minimum chunk size must be six,
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 * because the I2C device address will then occupy two bytes when writing.
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 *