.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * linux/arch/arm/common/vic.c |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 1999 - 2003 ARM Limited |
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5 | 6 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
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6 | | - * |
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7 | | - * This program is free software; you can redistribute it and/or modify |
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8 | | - * it under the terms of the GNU General Public License as published by |
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9 | | - * the Free Software Foundation; either version 2 of the License, or |
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10 | | - * (at your option) any later version. |
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11 | | - * |
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12 | | - * This program is distributed in the hope that it will be useful, |
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13 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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15 | | - * GNU General Public License for more details. |
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16 | | - * |
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17 | | - * You should have received a copy of the GNU General Public License |
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18 | | - * along with this program; if not, write to the Free Software |
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19 | | - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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20 | 7 | */ |
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21 | 8 | |
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22 | 9 | #include <linux/export.h> |
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.. | .. |
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40 | 27 | |
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41 | 28 | #define VIC_IRQ_STATUS 0x00 |
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42 | 29 | #define VIC_FIQ_STATUS 0x04 |
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| 30 | +#define VIC_RAW_STATUS 0x08 |
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43 | 31 | #define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */ |
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| 32 | +#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ |
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| 33 | +#define VIC_INT_ENABLE_CLEAR 0x14 |
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44 | 34 | #define VIC_INT_SOFT 0x18 |
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45 | 35 | #define VIC_INT_SOFT_CLEAR 0x1c |
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46 | 36 | #define VIC_PROTECT 0x20 |
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.. | .. |
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173 | 163 | }; |
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174 | 164 | |
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175 | 165 | /** |
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176 | | - * vic_pm_init - initicall to register VIC pm |
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| 166 | + * vic_pm_init - initcall to register VIC pm |
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177 | 167 | * |
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178 | 168 | * This is called via late_initcall() to register |
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179 | 169 | * the resources for the VICs due to the early |
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.. | .. |
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407 | 397 | /* |
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408 | 398 | * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. |
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409 | 399 | * The original cell has 32 interrupts, while the modified one has 64, |
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410 | | - * replocating two blocks 0x00..0x1f in 0x20..0x3f. In that case |
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| 400 | + * replicating two blocks 0x00..0x1f in 0x20..0x3f. In that case |
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411 | 401 | * the probe function is called twice, with base set to offset 000 |
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412 | 402 | * and 020 within the page. We call this "second block". |
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413 | 403 | */ |
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.. | .. |
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441 | 431 | vic_register(base, 0, irq_start, vic_sources, 0, node); |
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442 | 432 | } |
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443 | 433 | |
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444 | | -void __init __vic_init(void __iomem *base, int parent_irq, int irq_start, |
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| 434 | +static void __init __vic_init(void __iomem *base, int parent_irq, int irq_start, |
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445 | 435 | u32 vic_sources, u32 resume_sources, |
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446 | 436 | struct device_node *node) |
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447 | 437 | { |
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.. | .. |
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465 | 455 | return; |
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466 | 456 | default: |
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467 | 457 | printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n"); |
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468 | | - /* fall through */ |
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| 458 | + fallthrough; |
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469 | 459 | case AMBA_VENDOR_ARM: |
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470 | 460 | break; |
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471 | 461 | } |
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.. | .. |
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494 | 484 | __vic_init(base, 0, irq_start, vic_sources, resume_sources, NULL); |
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495 | 485 | } |
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496 | 486 | |
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497 | | -/** |
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498 | | - * vic_init_cascaded() - initialise a cascaded vectored interrupt controller |
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499 | | - * @base: iomem base address |
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500 | | - * @parent_irq: the parent IRQ we're cascaded off |
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501 | | - * @vic_sources: bitmask of interrupt sources to allow |
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502 | | - * @resume_sources: bitmask of interrupt sources to allow for resume |
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503 | | - * |
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504 | | - * This returns the base for the new interrupts or negative on error. |
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505 | | - */ |
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506 | | -int __init vic_init_cascaded(void __iomem *base, unsigned int parent_irq, |
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507 | | - u32 vic_sources, u32 resume_sources) |
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508 | | -{ |
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509 | | - struct vic_device *v; |
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510 | | - |
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511 | | - v = &vic_devices[vic_id]; |
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512 | | - __vic_init(base, parent_irq, 0, vic_sources, resume_sources, NULL); |
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513 | | - /* Return out acquired base */ |
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514 | | - return v->irq; |
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515 | | -} |
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516 | | -EXPORT_SYMBOL_GPL(vic_init_cascaded); |
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517 | | - |
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518 | 487 | #ifdef CONFIG_OF |
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519 | 488 | static int __init vic_of_init(struct device_node *node, |
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520 | 489 | struct device_node *parent) |
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.. | .. |
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522 | 491 | void __iomem *regs; |
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523 | 492 | u32 interrupt_mask = ~0; |
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524 | 493 | u32 wakeup_mask = ~0; |
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525 | | - |
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526 | | - if (WARN(parent, "non-root VICs are not supported")) |
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527 | | - return -EINVAL; |
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| 494 | + int parent_irq; |
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528 | 495 | |
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529 | 496 | regs = of_iomap(node, 0); |
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530 | 497 | if (WARN_ON(!regs)) |
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.. | .. |
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532 | 499 | |
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533 | 500 | of_property_read_u32(node, "valid-mask", &interrupt_mask); |
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534 | 501 | of_property_read_u32(node, "valid-wakeup-mask", &wakeup_mask); |
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| 502 | + parent_irq = of_irq_get(node, 0); |
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| 503 | + if (parent_irq < 0) |
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| 504 | + parent_irq = 0; |
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535 | 505 | |
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536 | 506 | /* |
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537 | 507 | * Passing 0 as first IRQ makes the simple domain allocate descriptors |
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538 | 508 | */ |
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539 | | - __vic_init(regs, 0, 0, interrupt_mask, wakeup_mask, node); |
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| 509 | + __vic_init(regs, parent_irq, 0, interrupt_mask, wakeup_mask, node); |
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540 | 510 | |
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541 | 511 | return 0; |
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542 | 512 | } |
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