| .. | .. | 
|---|
 | 1 | +# SPDX-License-Identifier: GPL-2.0-only  | 
|---|
 | 2 | +# The IOVA library may also be used by non-IOMMU_API users  | 
|---|
 | 3 | +config IOMMU_IOVA  | 
|---|
 | 4 | +	tristate  | 
|---|
 | 5 | +  | 
|---|
 | 6 | +# The IOASID library may also be used by non-IOMMU_API users  | 
|---|
 | 7 | +config IOASID  | 
|---|
 | 8 | +	tristate  | 
|---|
 | 9 | +  | 
|---|
| 1 | 10 |  # IOMMU_API always gets selected by whoever wants it. | 
|---|
| 2 | 11 |  config IOMMU_API | 
|---|
| 3 | 12 |  	bool | 
|---|
 | 13 | +  | 
|---|
 | 14 | +if IOMMU_IOVA  | 
|---|
 | 15 | +  | 
|---|
 | 16 | +config IOMMU_LIMIT_IOVA_ALIGNMENT  | 
|---|
 | 17 | +	bool "Limit IOVA alignment"  | 
|---|
 | 18 | +	help  | 
|---|
 | 19 | +	  When the IOVA framework applies IOVA alignment it aligns all  | 
|---|
 | 20 | +	  IOVAs to the smallest PAGE_SIZE order which is greater than or  | 
|---|
 | 21 | +	  equal to the requested IOVA size. This works fine for sizes up  | 
|---|
 | 22 | +	  to several MiB, but for larger sizes it results in address  | 
|---|
 | 23 | +	  space wastage and fragmentation. For example drivers with a 4  | 
|---|
 | 24 | +	  GiB IOVA space might run out of IOVA space when allocating  | 
|---|
 | 25 | +	  buffers great than 64 MiB.  | 
|---|
 | 26 | +  | 
|---|
 | 27 | +	  Enable this option to impose a limit on the alignment of IOVAs.  | 
|---|
 | 28 | +  | 
|---|
 | 29 | +	  If unsure, say N.  | 
|---|
 | 30 | +  | 
|---|
 | 31 | +config IOMMU_IOVA_ALIGNMENT  | 
|---|
 | 32 | +	int "Maximum PAGE_SIZE order of alignment for IOVAs"  | 
|---|
 | 33 | +	depends on IOMMU_LIMIT_IOVA_ALIGNMENT  | 
|---|
 | 34 | +	range 4 9  | 
|---|
 | 35 | +	default 9  | 
|---|
 | 36 | +	help  | 
|---|
 | 37 | +	  With this parameter you can specify the maximum PAGE_SIZE order for  | 
|---|
 | 38 | +	  IOVAs. Larger IOVAs will be aligned only to this specified order.  | 
|---|
 | 39 | +	  The order is expressed a power of two multiplied by the PAGE_SIZE.  | 
|---|
 | 40 | +  | 
|---|
 | 41 | +	  If unsure, leave the default value "9".  | 
|---|
 | 42 | +endif  | 
|---|
| 4 | 43 |   | 
|---|
| 5 | 44 |  menuconfig IOMMU_SUPPORT | 
|---|
| 6 | 45 |  	bool "IOMMU Hardware Support" | 
|---|
| 7 | 46 |  	depends on MMU | 
|---|
| 8 | 47 |  	default y | 
|---|
| 9 |  | -	---help---  | 
|---|
 | 48 | +	help  | 
|---|
| 10 | 49 |  	  Say Y here if you want to compile device drivers for IO Memory | 
|---|
| 11 | 50 |  	  Management Units into the kernel. These devices usually allow to | 
|---|
| 12 | 51 |  	  remap DMA requests and/or remap interrupts from other devices on the | 
|---|
| .. | .. | 
|---|
| 58 | 97 |   | 
|---|
| 59 | 98 |  	  If unsure, say N here. | 
|---|
| 60 | 99 |   | 
|---|
| 61 |  | -config IOMMU_IO_PGTABLE_FAST  | 
|---|
| 62 |  | -	bool "Fast ARMv7/v8 Long Descriptor Format"  | 
|---|
| 63 |  | -	depends on ARM64_DMA_USE_IOMMU && IOMMU_DMA  | 
|---|
| 64 |  | -	help  | 
|---|
| 65 |  | -          Enable support for a subset of the ARM long descriptor pagetable  | 
|---|
| 66 |  | -	  format.  This allocator achieves fast performance by  | 
|---|
| 67 |  | -	  pre-allocating and pre-populating page table memory up front.  | 
|---|
| 68 |  | -	  only supports a 32 bit virtual address space.  | 
|---|
| 69 |  | -  | 
|---|
| 70 |  | -          This implementation is mainly optimized for use cases where the  | 
|---|
| 71 |  | -          buffers are small (<= 64K) since it only supports 4K page sizes.  | 
|---|
| 72 |  | -  | 
|---|
| 73 | 100 |  endmenu | 
|---|
| 74 | 101 |   | 
|---|
| 75 | 102 |  config IOMMU_DEBUGFS | 
|---|
| .. | .. | 
|---|
| 85 | 112 |  config IOMMU_DEFAULT_PASSTHROUGH | 
|---|
| 86 | 113 |  	bool "IOMMU passthrough by default" | 
|---|
| 87 | 114 |  	depends on IOMMU_API | 
|---|
| 88 |  | -        help  | 
|---|
 | 115 | +	help  | 
|---|
| 89 | 116 |  	  Enable passthrough by default, removing the need to pass in | 
|---|
| 90 | 117 |  	  iommu.passthrough=on or iommu=pt through command line. If this | 
|---|
| 91 | 118 |  	  is enabled, you can still disable with iommu.passthrough=off | 
|---|
| .. | .. | 
|---|
| 93 | 120 |   | 
|---|
| 94 | 121 |  	  If unsure, say N here. | 
|---|
| 95 | 122 |   | 
|---|
| 96 |  | -config IOMMU_IOVA  | 
|---|
| 97 |  | -	tristate  | 
|---|
| 98 |  | -  | 
|---|
| 99 | 123 |  config OF_IOMMU | 
|---|
| 100 |  | -       def_bool y  | 
|---|
| 101 |  | -       depends on OF && IOMMU_API  | 
|---|
 | 124 | +	def_bool y  | 
|---|
 | 125 | +	depends on OF && IOMMU_API  | 
|---|
| 102 | 126 |   | 
|---|
| 103 | 127 |  # IOMMU-agnostic DMA-mapping layer | 
|---|
| 104 | 128 |  config IOMMU_DMA | 
|---|
| 105 | 129 |  	bool | 
|---|
 | 130 | +	select DMA_OPS  | 
|---|
| 106 | 131 |  	select IOMMU_API | 
|---|
| 107 | 132 |  	select IOMMU_IOVA | 
|---|
 | 133 | +	select IRQ_MSI_IOMMU  | 
|---|
| 108 | 134 |  	select NEED_SG_DMA_LENGTH | 
|---|
| 109 | 135 |   | 
|---|
| 110 | 136 |  config FSL_PAMU | 
|---|
| .. | .. | 
|---|
| 133 | 159 |   | 
|---|
| 134 | 160 |  	  If unsure, say N here. | 
|---|
| 135 | 161 |   | 
|---|
| 136 |  | -config IOMMU_PGTABLES_L2  | 
|---|
| 137 |  | -	def_bool y  | 
|---|
| 138 |  | -	depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n  | 
|---|
| 139 |  | -  | 
|---|
| 140 |  | -# AMD IOMMU support  | 
|---|
| 141 |  | -config AMD_IOMMU  | 
|---|
| 142 |  | -	bool "AMD IOMMU support"  | 
|---|
| 143 |  | -	select SWIOTLB  | 
|---|
| 144 |  | -	select PCI_MSI  | 
|---|
| 145 |  | -	select PCI_ATS  | 
|---|
| 146 |  | -	select PCI_PRI  | 
|---|
| 147 |  | -	select PCI_PASID  | 
|---|
| 148 |  | -	select IOMMU_API  | 
|---|
| 149 |  | -	select IOMMU_IOVA  | 
|---|
| 150 |  | -	depends on X86_64 && PCI && ACPI  | 
|---|
| 151 |  | -	---help---  | 
|---|
| 152 |  | -	  With this option you can enable support for AMD IOMMU hardware in  | 
|---|
| 153 |  | -	  your system. An IOMMU is a hardware component which provides  | 
|---|
| 154 |  | -	  remapping of DMA memory accesses from devices. With an AMD IOMMU you  | 
|---|
| 155 |  | -	  can isolate the DMA memory of different devices and protect the  | 
|---|
| 156 |  | -	  system from misbehaving device drivers or hardware.  | 
|---|
| 157 |  | -  | 
|---|
| 158 |  | -	  You can find out if your system has an AMD IOMMU if you look into  | 
|---|
| 159 |  | -	  your BIOS for an option to enable it or if you have an IVRS ACPI  | 
|---|
| 160 |  | -	  table.  | 
|---|
| 161 |  | -  | 
|---|
| 162 |  | -config AMD_IOMMU_V2  | 
|---|
| 163 |  | -	tristate "AMD IOMMU Version 2 driver"  | 
|---|
| 164 |  | -	depends on AMD_IOMMU  | 
|---|
| 165 |  | -	select MMU_NOTIFIER  | 
|---|
| 166 |  | -	---help---  | 
|---|
| 167 |  | -	  This option enables support for the AMD IOMMUv2 features of the IOMMU  | 
|---|
| 168 |  | -	  hardware. Select this option if you want to use devices that support  | 
|---|
| 169 |  | -	  the PCI PRI and PASID interface.  | 
|---|
| 170 |  | -  | 
|---|
| 171 |  | -config AMD_IOMMU_DEBUGFS  | 
|---|
| 172 |  | -	bool "Enable AMD IOMMU internals in DebugFS"  | 
|---|
| 173 |  | -	depends on AMD_IOMMU && IOMMU_DEBUGFS  | 
|---|
| 174 |  | -	---help---  | 
|---|
| 175 |  | -	  !!!WARNING!!!  !!!WARNING!!!  !!!WARNING!!!  !!!WARNING!!!  | 
|---|
| 176 |  | -  | 
|---|
| 177 |  | -	  DO NOT ENABLE THIS OPTION UNLESS YOU REALLY, -REALLY- KNOW WHAT YOU ARE DOING!!!  | 
|---|
| 178 |  | -	  Exposes AMD IOMMU device internals in DebugFS.  | 
|---|
| 179 |  | -  | 
|---|
| 180 |  | -	  This option is -NOT- intended for production environments, and should  | 
|---|
| 181 |  | -	  not generally be enabled.  | 
|---|
| 182 |  | -  | 
|---|
| 183 |  | -# Intel IOMMU support  | 
|---|
| 184 |  | -config DMAR_TABLE  | 
|---|
| 185 |  | -	bool  | 
|---|
| 186 |  | -  | 
|---|
| 187 |  | -config INTEL_IOMMU  | 
|---|
| 188 |  | -	bool "Support for Intel IOMMU using DMA Remapping Devices"  | 
|---|
| 189 |  | -	depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)  | 
|---|
| 190 |  | -	select IOMMU_API  | 
|---|
| 191 |  | -	select IOMMU_IOVA  | 
|---|
| 192 |  | -	select NEED_DMA_MAP_STATE  | 
|---|
| 193 |  | -	select DMAR_TABLE  | 
|---|
| 194 |  | -	help  | 
|---|
| 195 |  | -	  DMA remapping (DMAR) devices support enables independent address  | 
|---|
| 196 |  | -	  translations for Direct Memory Access (DMA) from devices.  | 
|---|
| 197 |  | -	  These DMA remapping devices are reported via ACPI tables  | 
|---|
| 198 |  | -	  and include PCI device scope covered by these DMA  | 
|---|
| 199 |  | -	  remapping devices.  | 
|---|
| 200 |  | -  | 
|---|
| 201 |  | -config INTEL_IOMMU_SVM  | 
|---|
| 202 |  | -	bool "Support for Shared Virtual Memory with Intel IOMMU"  | 
|---|
| 203 |  | -	depends on INTEL_IOMMU && X86  | 
|---|
| 204 |  | -	select PCI_PASID  | 
|---|
| 205 |  | -	select MMU_NOTIFIER  | 
|---|
| 206 |  | -	help  | 
|---|
| 207 |  | -	  Shared Virtual Memory (SVM) provides a facility for devices  | 
|---|
| 208 |  | -	  to access DMA resources through process address space by  | 
|---|
| 209 |  | -	  means of a Process Address Space ID (PASID).  | 
|---|
| 210 |  | -  | 
|---|
| 211 |  | -config INTEL_IOMMU_DEFAULT_ON  | 
|---|
| 212 |  | -	def_bool y  | 
|---|
| 213 |  | -	prompt "Enable Intel DMA Remapping Devices by default"  | 
|---|
| 214 |  | -	depends on INTEL_IOMMU  | 
|---|
| 215 |  | -	help  | 
|---|
| 216 |  | -	  Selecting this option will enable a DMAR device at boot time if  | 
|---|
| 217 |  | -	  one is found. If this option is not selected, DMAR support can  | 
|---|
| 218 |  | -	  be enabled by passing intel_iommu=on to the kernel.  | 
|---|
| 219 |  | -  | 
|---|
| 220 |  | -config INTEL_IOMMU_BROKEN_GFX_WA  | 
|---|
| 221 |  | -	bool "Workaround broken graphics drivers (going away soon)"  | 
|---|
| 222 |  | -	depends on INTEL_IOMMU && BROKEN && X86  | 
|---|
| 223 |  | -	---help---  | 
|---|
| 224 |  | -	  Current Graphics drivers tend to use physical address  | 
|---|
| 225 |  | -	  for DMA and avoid using DMA APIs. Setting this config  | 
|---|
| 226 |  | -	  option permits the IOMMU driver to set a unity map for  | 
|---|
| 227 |  | -	  all the OS-visible memory. Hence the driver can continue  | 
|---|
| 228 |  | -	  to use physical addresses for DMA, at least until this  | 
|---|
| 229 |  | -	  option is removed in the 2.6.32 kernel.  | 
|---|
| 230 |  | -  | 
|---|
| 231 |  | -config INTEL_IOMMU_FLOPPY_WA  | 
|---|
| 232 |  | -	def_bool y  | 
|---|
| 233 |  | -	depends on INTEL_IOMMU && X86  | 
|---|
| 234 |  | -	---help---  | 
|---|
| 235 |  | -	  Floppy disk drivers are known to bypass DMA API calls  | 
|---|
| 236 |  | -	  thereby failing to work when IOMMU is enabled. This  | 
|---|
| 237 |  | -	  workaround will setup a 1:1 mapping for the first  | 
|---|
| 238 |  | -	  16MiB to make floppy (an ISA device) work.  | 
|---|
 | 162 | +source "drivers/iommu/amd/Kconfig"  | 
|---|
 | 163 | +source "drivers/iommu/intel/Kconfig"  | 
|---|
| 239 | 164 |   | 
|---|
| 240 | 165 |  config IRQ_REMAP | 
|---|
| 241 | 166 |  	bool "Support for Interrupt Remapping" | 
|---|
| 242 | 167 |  	depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI | 
|---|
| 243 | 168 |  	select DMAR_TABLE | 
|---|
| 244 |  | -	---help---  | 
|---|
 | 169 | +	help  | 
|---|
| 245 | 170 |  	  Supports Interrupt remapping for IO-APIC and MSI devices. | 
|---|
| 246 | 171 |  	  To use x2apic mode in the CPU's which support x2APIC enhancements or | 
|---|
| 247 | 172 |  	  to support platforms with CPU's having > 8 bit APIC ID, say Y. | 
|---|
| .. | .. | 
|---|
| 249 | 174 |  # OMAP IOMMU support | 
|---|
| 250 | 175 |  config OMAP_IOMMU | 
|---|
| 251 | 176 |  	bool "OMAP IOMMU Support" | 
|---|
| 252 |  | -	depends on ARM && MMU  | 
|---|
| 253 | 177 |  	depends on ARCH_OMAP2PLUS || COMPILE_TEST | 
|---|
| 254 | 178 |  	select IOMMU_API | 
|---|
| 255 |  | -	---help---  | 
|---|
 | 179 | +	help  | 
|---|
| 256 | 180 |  	  The OMAP3 media platform drivers depend on iommu support, | 
|---|
| 257 | 181 |  	  if you need them say Y here. | 
|---|
| 258 | 182 |   | 
|---|
| 259 | 183 |  config OMAP_IOMMU_DEBUG | 
|---|
| 260 | 184 |  	bool "Export OMAP IOMMU internals in DebugFS" | 
|---|
| 261 | 185 |  	depends on OMAP_IOMMU && DEBUG_FS | 
|---|
| 262 |  | -	---help---  | 
|---|
 | 186 | +	help  | 
|---|
| 263 | 187 |  	  Select this to see extensive information about | 
|---|
| 264 | 188 |  	  the internal state of OMAP IOMMU in debugfs. | 
|---|
| 265 | 189 |   | 
|---|
| .. | .. | 
|---|
| 270 | 194 |  	depends on ARM || ARM64 | 
|---|
| 271 | 195 |  	depends on ARCH_ROCKCHIP || COMPILE_TEST | 
|---|
| 272 | 196 |  	select IOMMU_API | 
|---|
| 273 |  | -	select ARM_DMA_USE_IOMMU if ARM  | 
|---|
 | 197 | +	select ARM_DMA_USE_IOMMU  | 
|---|
| 274 | 198 |  	help | 
|---|
| 275 | 199 |  	  Support for IOMMUs found on Rockchip rk32xx SOCs. | 
|---|
| 276 | 200 |  	  These IOMMUs allow virtualization of the address space used by most | 
|---|
| .. | .. | 
|---|
| 278 | 202 |  	  Say Y here if you are using a Rockchip SoC that includes an IOMMU | 
|---|
| 279 | 203 |  	  device. | 
|---|
| 280 | 204 |   | 
|---|
 | 205 | +config SUN50I_IOMMU  | 
|---|
 | 206 | +	bool "Allwinner H6 IOMMU Support"  | 
|---|
 | 207 | +	depends on HAS_DMA  | 
|---|
 | 208 | +	depends on ARCH_SUNXI || COMPILE_TEST  | 
|---|
 | 209 | +	select ARM_DMA_USE_IOMMU  | 
|---|
 | 210 | +	select IOMMU_API  | 
|---|
 | 211 | +	help  | 
|---|
 | 212 | +	  Support for the IOMMU introduced in the Allwinner H6 SoCs.  | 
|---|
 | 213 | +  | 
|---|
| 281 | 214 |  config TEGRA_IOMMU_GART | 
|---|
| 282 | 215 |  	bool "Tegra GART IOMMU Support" | 
|---|
| 283 | 216 |  	depends on ARCH_TEGRA_2x_SOC | 
|---|
 | 217 | +	depends on TEGRA_MC  | 
|---|
| 284 | 218 |  	select IOMMU_API | 
|---|
| 285 | 219 |  	help | 
|---|
| 286 | 220 |  	  Enables support for remapping discontiguous physical memory | 
|---|
| .. | .. | 
|---|
| 300 | 234 |   | 
|---|
| 301 | 235 |  config EXYNOS_IOMMU | 
|---|
| 302 | 236 |  	bool "Exynos IOMMU Support" | 
|---|
| 303 |  | -	depends on ARCH_EXYNOS && MMU  | 
|---|
 | 237 | +	depends on ARCH_EXYNOS || COMPILE_TEST  | 
|---|
| 304 | 238 |  	depends on !CPU_BIG_ENDIAN # revisit driver if we can enable big-endian ptes | 
|---|
| 305 | 239 |  	select IOMMU_API | 
|---|
| 306 | 240 |  	select ARM_DMA_USE_IOMMU | 
|---|
| .. | .. | 
|---|
| 323 | 257 |   | 
|---|
| 324 | 258 |  config IPMMU_VMSA | 
|---|
| 325 | 259 |  	bool "Renesas VMSA-compatible IPMMU" | 
|---|
| 326 |  | -	depends on ARM || IOMMU_DMA  | 
|---|
| 327 | 260 |  	depends on ARCH_RENESAS || (COMPILE_TEST && !GENERIC_ATOMIC64) | 
|---|
| 328 | 261 |  	select IOMMU_API | 
|---|
| 329 | 262 |  	select IOMMU_IO_PGTABLE_LPAE | 
|---|
| 330 | 263 |  	select ARM_DMA_USE_IOMMU | 
|---|
| 331 | 264 |  	help | 
|---|
| 332 | 265 |  	  Support for the Renesas VMSA-compatible IPMMU found in the R-Mobile | 
|---|
| 333 |  | -	  APE6, R-Car Gen2, and R-Car Gen3 SoCs.  | 
|---|
 | 266 | +	  APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.  | 
|---|
| 334 | 267 |   | 
|---|
| 335 | 268 |  	  If unsure, say N. | 
|---|
| 336 | 269 |   | 
|---|
| .. | .. | 
|---|
| 345 | 278 |  # ARM IOMMU support | 
|---|
| 346 | 279 |  config ARM_SMMU | 
|---|
| 347 | 280 |  	tristate "ARM Ltd. System MMU (SMMU) Support" | 
|---|
| 348 |  | -	depends on (ARM64 || ARM) && MMU  | 
|---|
 | 281 | +	depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64)  | 
|---|
 | 282 | +	depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y  | 
|---|
| 349 | 283 |  	select IOMMU_API | 
|---|
| 350 | 284 |  	select IOMMU_IO_PGTABLE_LPAE | 
|---|
| 351 | 285 |  	select ARM_DMA_USE_IOMMU if ARM | 
|---|
| 352 |  | -	select ARM64_DMA_USE_IOMMU if ARM64  | 
|---|
| 353 | 286 |  	help | 
|---|
| 354 | 287 |  	  Support for implementations of the ARM System MMU architecture | 
|---|
| 355 | 288 |  	  versions 1 and 2. | 
|---|
| .. | .. | 
|---|
| 357 | 290 |  	  Say Y here if your SoC includes an IOMMU device implementing | 
|---|
| 358 | 291 |  	  the ARM SMMU architecture. | 
|---|
| 359 | 292 |   | 
|---|
 | 293 | +config ARM_SMMU_LEGACY_DT_BINDINGS  | 
|---|
 | 294 | +	bool "Support the legacy \"mmu-masters\" devicetree bindings"  | 
|---|
 | 295 | +	depends on ARM_SMMU=y && OF  | 
|---|
 | 296 | +	help  | 
|---|
 | 297 | +	  Support for the badly designed and deprecated "mmu-masters"  | 
|---|
 | 298 | +	  devicetree bindings. This allows some DMA masters to attach  | 
|---|
 | 299 | +	  to the SMMU but does not provide any support via the DMA API.  | 
|---|
 | 300 | +	  If you're lucky, you might be able to get VFIO up and running.  | 
|---|
 | 301 | +  | 
|---|
 | 302 | +	  If you say Y here then you'll make me very sad. Instead, say N  | 
|---|
 | 303 | +	  and move your firmware to the utopian future that was 2016.  | 
|---|
 | 304 | +  | 
|---|
 | 305 | +config ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT  | 
|---|
 | 306 | +	bool "Default to disabling bypass on ARM SMMU v1 and v2"  | 
|---|
 | 307 | +	depends on ARM_SMMU  | 
|---|
 | 308 | +	default y  | 
|---|
 | 309 | +	help  | 
|---|
 | 310 | +	  Say Y here to (by default) disable bypass streams such that  | 
|---|
 | 311 | +	  incoming transactions from devices that are not attached to  | 
|---|
 | 312 | +	  an iommu domain will report an abort back to the device and  | 
|---|
 | 313 | +	  will not be allowed to pass through the SMMU.  | 
|---|
 | 314 | +  | 
|---|
 | 315 | +	  Any old kernels that existed before this KConfig was  | 
|---|
 | 316 | +	  introduced would default to _allowing_ bypass (AKA the  | 
|---|
 | 317 | +	  equivalent of NO for this config).  However the default for  | 
|---|
 | 318 | +	  this option is YES because the old behavior is insecure.  | 
|---|
 | 319 | +  | 
|---|
 | 320 | +	  There are few reasons to allow unmatched stream bypass, and  | 
|---|
 | 321 | +	  even fewer good ones.  If saying YES here breaks your board  | 
|---|
 | 322 | +	  you should work on fixing your board.  This KConfig option  | 
|---|
 | 323 | +	  is expected to be removed in the future and we'll simply  | 
|---|
 | 324 | +	  hardcode the bypass disable in the code.  | 
|---|
 | 325 | +  | 
|---|
 | 326 | +	  NOTE: the kernel command line parameter  | 
|---|
 | 327 | +	  'arm-smmu.disable_bypass' will continue to override this  | 
|---|
 | 328 | +	  config.  | 
|---|
 | 329 | +  | 
|---|
| 360 | 330 |  config ARM_SMMU_V3 | 
|---|
| 361 |  | -	bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"  | 
|---|
 | 331 | +	tristate "ARM Ltd. System MMU Version 3 (SMMUv3) Support"  | 
|---|
| 362 | 332 |  	depends on ARM64 | 
|---|
| 363 | 333 |  	select IOMMU_API | 
|---|
| 364 | 334 |  	select IOMMU_IO_PGTABLE_LPAE | 
|---|
| .. | .. | 
|---|
| 370 | 340 |  	  Say Y here if your system includes an IOMMU device implementing | 
|---|
| 371 | 341 |  	  the ARM SMMUv3 architecture. | 
|---|
| 372 | 342 |   | 
|---|
 | 343 | +config ARM_SMMU_V3_SVA  | 
|---|
 | 344 | +	bool "Shared Virtual Addressing support for the ARM SMMUv3"  | 
|---|
 | 345 | +	depends on ARM_SMMU_V3  | 
|---|
 | 346 | +	help  | 
|---|
 | 347 | +	  Support for sharing process address spaces with devices using the  | 
|---|
 | 348 | +	  SMMUv3.  | 
|---|
 | 349 | +  | 
|---|
 | 350 | +	  Say Y here if your system supports SVA extensions such as PCIe PASID  | 
|---|
 | 351 | +	  and PRI.  | 
|---|
 | 352 | +  | 
|---|
| 373 | 353 |  config S390_IOMMU | 
|---|
| 374 | 354 |  	def_bool y if S390 && PCI | 
|---|
| 375 | 355 |  	depends on S390 && PCI | 
|---|
| .. | .. | 
|---|
| 379 | 359 |   | 
|---|
| 380 | 360 |  config S390_CCW_IOMMU | 
|---|
| 381 | 361 |  	bool "S390 CCW IOMMU Support" | 
|---|
| 382 |  | -	depends on S390 && CCW  | 
|---|
 | 362 | +	depends on S390 && CCW || COMPILE_TEST  | 
|---|
 | 363 | +	select IOMMU_API  | 
|---|
 | 364 | +	help  | 
|---|
 | 365 | +	  Enables bits of IOMMU API required by VFIO. The iommu_ops  | 
|---|
 | 366 | +	  is not implemented as it is not necessary for VFIO.  | 
|---|
 | 367 | +  | 
|---|
 | 368 | +config S390_AP_IOMMU  | 
|---|
 | 369 | +	bool "S390 AP IOMMU Support"  | 
|---|
 | 370 | +	depends on S390 && ZCRYPT || COMPILE_TEST  | 
|---|
| 383 | 371 |  	select IOMMU_API | 
|---|
| 384 | 372 |  	help | 
|---|
| 385 | 373 |  	  Enables bits of IOMMU API required by VFIO. The iommu_ops | 
|---|
| .. | .. | 
|---|
| 387 | 375 |   | 
|---|
| 388 | 376 |  config MTK_IOMMU | 
|---|
| 389 | 377 |  	bool "MTK IOMMU Support" | 
|---|
| 390 |  | -	depends on ARM || ARM64  | 
|---|
| 391 | 378 |  	depends on ARCH_MEDIATEK || COMPILE_TEST | 
|---|
| 392 | 379 |  	select ARM_DMA_USE_IOMMU | 
|---|
| 393 | 380 |  	select IOMMU_API | 
|---|
| 394 |  | -	select IOMMU_DMA  | 
|---|
| 395 | 381 |  	select IOMMU_IO_PGTABLE_ARMV7S | 
|---|
| 396 | 382 |  	select MEMORY | 
|---|
| 397 | 383 |  	select MTK_SMI | 
|---|
| .. | .. | 
|---|
| 421 | 407 |  	# Note: iommu drivers cannot (yet?) be built as modules | 
|---|
| 422 | 408 |  	bool "Qualcomm IOMMU Support" | 
|---|
| 423 | 409 |  	depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64) | 
|---|
 | 410 | +	depends on QCOM_SCM=y  | 
|---|
| 424 | 411 |  	select IOMMU_API | 
|---|
| 425 | 412 |  	select IOMMU_IO_PGTABLE_LPAE | 
|---|
| 426 | 413 |  	select ARM_DMA_USE_IOMMU | 
|---|
| 427 | 414 |  	help | 
|---|
| 428 | 415 |  	  Support for IOMMU on certain Qualcomm SoCs. | 
|---|
| 429 | 416 |   | 
|---|
 | 417 | +config HYPERV_IOMMU  | 
|---|
 | 418 | +	bool "Hyper-V x2APIC IRQ Handling"  | 
|---|
 | 419 | +	depends on HYPERV && X86  | 
|---|
 | 420 | +	select IOMMU_API  | 
|---|
 | 421 | +	default HYPERV  | 
|---|
 | 422 | +	help  | 
|---|
 | 423 | +	  Stub IOMMU driver to handle IRQs as to allow Hyper-V Linux  | 
|---|
 | 424 | +	  guests to run with x2APIC mode enabled.  | 
|---|
 | 425 | +  | 
|---|
 | 426 | +config VIRTIO_IOMMU  | 
|---|
 | 427 | +	tristate "Virtio IOMMU driver"  | 
|---|
 | 428 | +	depends on VIRTIO  | 
|---|
 | 429 | +	depends on ARM64  | 
|---|
 | 430 | +	select IOMMU_API  | 
|---|
 | 431 | +	select INTERVAL_TREE  | 
|---|
 | 432 | +	help  | 
|---|
 | 433 | +	  Para-virtualised IOMMU driver with virtio.  | 
|---|
 | 434 | +  | 
|---|
 | 435 | +	  Say Y here if you intend to run this kernel as a guest.  | 
|---|
 | 436 | +  | 
|---|
| 430 | 437 |  endif # IOMMU_SUPPORT | 
|---|