hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/gpu/drm/radeon/si_dpm.c
....@@ -21,15 +21,16 @@
2121 *
2222 */
2323
24
-#include <drm/drmP.h>
24
+#include <linux/math64.h>
25
+#include <linux/pci.h>
26
+#include <linux/seq_file.h>
27
+
28
+#include "atom.h"
29
+#include "r600_dpm.h"
2530 #include "radeon.h"
2631 #include "radeon_asic.h"
27
-#include "sid.h"
28
-#include "r600_dpm.h"
2932 #include "si_dpm.h"
30
-#include "atom.h"
31
-#include <linux/math64.h>
32
-#include <linux/seq_file.h>
33
+#include "sid.h"
3334
3435 #define MC_CG_ARB_FREQ_F0 0x0a
3536 #define MC_CG_ARB_FREQ_F1 0x0b
....@@ -249,24 +250,6 @@
249250 { 12024, 11189, 11451, 8411, 7939, 6666, 5681, 4905, 4241, 3720, 3354, 3122, 2890, 0, 0, 0 },
250251 85,
251252 false
252
-};
253
-
254
-static const struct si_dte_data dte_data_tahiti_le =
255
-{
256
- { 0x1E8480, 0x7A1200, 0x2160EC0, 0x3938700, 0 },
257
- { 0x7D, 0x7D, 0x4E4, 0xB00, 0 },
258
- 0x5,
259
- 0xAFC8,
260
- 0x64,
261
- 0x32,
262
- 1,
263
- 0,
264
- 0x10,
265
- { 0x78, 0x7C, 0x82, 0x88, 0x8E, 0x94, 0x9A, 0xA0, 0xA6, 0xAC, 0xB0, 0xB4, 0xB8, 0xBC, 0xC0, 0xC4 },
266
- { 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700, 0x3938700 },
267
- { 0x2AF8, 0x2AF8, 0x29BB, 0x27F9, 0x2637, 0x2475, 0x22B3, 0x20F1, 0x1F2F, 0x1D6D, 0x1734, 0x1414, 0x10F4, 0xDD4, 0xAB4, 0x794 },
268
- 85,
269
- true
270253 };
271254
272255 static const struct si_dte_data dte_data_tahiti_pro =
....@@ -2978,7 +2961,6 @@
29782961
29792962 if (rdev->family == CHIP_HAINAN) {
29802963 if ((rdev->pdev->revision == 0x81) ||
2981
- (rdev->pdev->revision == 0x83) ||
29822964 (rdev->pdev->revision == 0xC3) ||
29832965 (rdev->pdev->device == 0x6664) ||
29842966 (rdev->pdev->device == 0x6665) ||
....@@ -3641,14 +3623,13 @@
36413623
36423624 static void si_program_response_times(struct radeon_device *rdev)
36433625 {
3644
- u32 voltage_response_time, backbias_response_time, acpi_delay_time, vbi_time_out;
3626
+ u32 voltage_response_time, acpi_delay_time, vbi_time_out;
36453627 u32 vddc_dly, acpi_dly, vbi_dly;
36463628 u32 reference_clock;
36473629
36483630 si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_mvdd_chg_time, 1);
36493631
36503632 voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time;
3651
- backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time;
36523633
36533634 if (voltage_response_time == 0)
36543635 voltage_response_time = 1000;
....@@ -5766,10 +5747,12 @@
57665747 si_pi->force_pcie_gen = RADEON_PCIE_GEN2;
57675748 if (current_link_speed == RADEON_PCIE_GEN2)
57685749 break;
5750
+ fallthrough;
57695751 case RADEON_PCIE_GEN2:
57705752 if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)
57715753 break;
57725754 #endif
5755
+ /* fall through */
57735756 default:
57745757 si_pi->force_pcie_gen = si_get_current_pcie_speed(rdev);
57755758 break;
....@@ -5899,7 +5882,7 @@
58995882
59005883 static int si_patch_dependency_tables_based_on_leakage(struct radeon_device *rdev)
59015884 {
5902
- int ret = 0;
5885
+ int ret;
59035886
59045887 ret = si_patch_single_dependency_table_based_on_leakage(rdev,
59055888 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk);