forked from ~ljy/RK356X_SDK_RELEASE

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2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da 
 kernel/drivers/gpu/drm/radeon/radeon_gem.c
....@@ -25,8 +25,14 @@
2525  *          Alex Deucher
2626  *          Jerome Glisse
2727  */
28
-#include <drm/drmP.h>
28
+
29
+#include <linux/pci.h>
30
+
31
+#include <drm/drm_debugfs.h>
32
+#include <drm/drm_device.h>
33
+#include <drm/drm_file.h>
2934 #include <drm/radeon_drm.h>
35
+
3036 #include "radeon.h"
3137 
3238 void radeon_gem_object_free(struct drm_gem_object *gobj)
....@@ -78,7 +84,7 @@
7884 		}
7985 		return r;
8086 	}
81
-	*obj = &robj->gem_base;
87
+	*obj = &robj->tbo.base;
8288 	robj->pid = task_pid_nr(current);
8389 
8490 	mutex_lock(&rdev->gem.mutex);
....@@ -109,7 +115,7 @@
109115 	}
110116 	if (domain == RADEON_GEM_DOMAIN_CPU) {
111117 		/* Asking for cpu access wait for object idle */
112
-		r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
118
+		r = dma_resv_wait_timeout_rcu(robj->tbo.base.resv, true, true, 30 * HZ);
113119 		if (!r)
114120 			r = -EBUSY;
115121 
....@@ -218,9 +224,9 @@
218224 {
219225 	struct radeon_device *rdev = dev->dev_private;
220226 	struct drm_radeon_gem_info *args = data;
221
-	struct ttm_mem_type_manager *man;
227
+	struct ttm_resource_manager *man;
222228 
223
-	man = &rdev->mman.bdev.man[TTM_PL_VRAM];
229
+	man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
224230 
225231 	args->vram_size = (u64)man->size << PAGE_SHIFT;
226232 	args->vram_visible = rdev->mc.visible_vram_size;
....@@ -269,7 +275,7 @@
269275 	}
270276 	r = drm_gem_handle_create(filp, gobj, &handle);
271277 	/* drop reference from allocate - handle holds it now */
272
-	drm_gem_object_put_unlocked(gobj);
278
+	drm_gem_object_put(gobj);
273279 	if (r) {
274280 		up_read(&rdev->exclusive_lock);
275281 		r = radeon_gem_handle_lockup(rdev, r);
....@@ -325,7 +331,7 @@
325331 		goto handle_lockup;
326332 
327333 	bo = gem_to_radeon_bo(gobj);
328
-	r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
334
+	r = radeon_ttm_tt_set_userptr(rdev, bo->tbo.ttm, args->addr, args->flags);
329335 	if (r)
330336 		goto release_object;
331337 
....@@ -336,24 +342,24 @@
336342 	}
337343 
338344 	if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
339
-		down_read(&current->mm->mmap_sem);
345
+		mmap_read_lock(current->mm);
340346 		r = radeon_bo_reserve(bo, true);
341347 		if (r) {
342
-			up_read(&current->mm->mmap_sem);
348
+			mmap_read_unlock(current->mm);
343349 			goto release_object;
344350 		}
345351 
346352 		radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
347353 		r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
348354 		radeon_bo_unreserve(bo);
349
-		up_read(&current->mm->mmap_sem);
355
+		mmap_read_unlock(current->mm);
350356 		if (r)
351357 			goto release_object;
352358 	}
353359 
354360 	r = drm_gem_handle_create(filp, gobj, &handle);
355361 	/* drop reference from allocate - handle holds it now */
356
-	drm_gem_object_put_unlocked(gobj);
362
+	drm_gem_object_put(gobj);
357363 	if (r)
358364 		goto handle_lockup;
359365 
....@@ -362,7 +368,7 @@
362368 	return 0;
363369 
364370 release_object:
365
-	drm_gem_object_put_unlocked(gobj);
371
+	drm_gem_object_put(gobj);
366372 
367373 handle_lockup:
368374 	up_read(&rdev->exclusive_lock);
....@@ -379,7 +385,6 @@
379385 	struct radeon_device *rdev = dev->dev_private;
380386 	struct drm_radeon_gem_set_domain *args = data;
381387 	struct drm_gem_object *gobj;
382
-	struct radeon_bo *robj;
383388 	int r;
384389 
385390 	/* for now if someone requests domain CPU -
....@@ -392,13 +397,12 @@
392397 		up_read(&rdev->exclusive_lock);
393398 		return -ENOENT;
394399 	}
395
-	robj = gem_to_radeon_bo(gobj);
396400 
397401 	r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
398402 
399
-	drm_gem_object_put_unlocked(gobj);
403
+	drm_gem_object_put(gobj);
400404 	up_read(&rdev->exclusive_lock);
401
-	r = radeon_gem_handle_lockup(robj->rdev, r);
405
+	r = radeon_gem_handle_lockup(rdev, r);
402406 	return r;
403407 }
404408 
....@@ -414,12 +418,12 @@
414418 		return -ENOENT;
415419 	}
416420 	robj = gem_to_radeon_bo(gobj);
417
-	if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
418
-		drm_gem_object_put_unlocked(gobj);
421
+	if (radeon_ttm_tt_has_userptr(robj->rdev, robj->tbo.ttm)) {
422
+		drm_gem_object_put(gobj);
419423 		return -EPERM;
420424 	}
421425 	*offset_p = radeon_bo_mmap_offset(robj);
422
-	drm_gem_object_put_unlocked(gobj);
426
+	drm_gem_object_put(gobj);
423427 	return 0;
424428 }
425429 
....@@ -446,7 +450,7 @@
446450 	}
447451 	robj = gem_to_radeon_bo(gobj);
448452 
449
-	r = reservation_object_test_signaled_rcu(robj->tbo.resv, true);
453
+	r = dma_resv_test_signaled_rcu(robj->tbo.base.resv, true);
450454 	if (r == 0)
451455 		r = -EBUSY;
452456 	else
....@@ -454,7 +458,7 @@
454458 
455459 	cur_placement = READ_ONCE(robj->tbo.mem.mem_type);
456460 	args->domain = radeon_mem_type_to_domain(cur_placement);
457
-	drm_gem_object_put_unlocked(gobj);
461
+	drm_gem_object_put(gobj);
458462 	return r;
459463 }
460464 
....@@ -475,7 +479,7 @@
475479 	}
476480 	robj = gem_to_radeon_bo(gobj);
477481 
478
-	ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
482
+	ret = dma_resv_wait_timeout_rcu(robj->tbo.base.resv, true, true, 30 * HZ);
479483 	if (ret == 0)
480484 		r = -EBUSY;
481485 	else if (ret < 0)
....@@ -486,7 +490,7 @@
486490 	if (rdev->asic->mmio_hdp_flush &&
487491 	    radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
488492 		robj->rdev->asic->mmio_hdp_flush(rdev);
489
-	drm_gem_object_put_unlocked(gobj);
493
+	drm_gem_object_put(gobj);
490494 	r = radeon_gem_handle_lockup(rdev, r);
491495 	return r;
492496 }
....@@ -505,7 +509,7 @@
505509 		return -ENOENT;
506510 	robj = gem_to_radeon_bo(gobj);
507511 	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
508
-	drm_gem_object_put_unlocked(gobj);
512
+	drm_gem_object_put(gobj);
509513 	return r;
510514 }
511515 
....@@ -528,7 +532,7 @@
528532 	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
529533 	radeon_bo_unreserve(rbo);
530534 out:
531
-	drm_gem_object_put_unlocked(gobj);
535
+	drm_gem_object_put(gobj);
532536 	return r;
533537 }
534538 
....@@ -554,7 +558,7 @@
554558 	INIT_LIST_HEAD(&list);
555559 
556560 	tv.bo = &bo_va->bo->tbo;
557
-	tv.shared = true;
561
+	tv.num_shared = 1;
558562 	list_add(&tv.head, &list);
559563 
560564 	vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list);
....@@ -662,14 +666,14 @@
662666 	r = radeon_bo_reserve(rbo, false);
663667 	if (r) {
664668 		args->operation = RADEON_VA_RESULT_ERROR;
665
-		drm_gem_object_put_unlocked(gobj);
669
+		drm_gem_object_put(gobj);
666670 		return r;
667671 	}
668672 	bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
669673 	if (!bo_va) {
670674 		args->operation = RADEON_VA_RESULT_ERROR;
671675 		radeon_bo_unreserve(rbo);
672
-		drm_gem_object_put_unlocked(gobj);
676
+		drm_gem_object_put(gobj);
673677 		return -ENOENT;
674678 	}
675679 
....@@ -696,7 +700,7 @@
696700 		args->operation = RADEON_VA_RESULT_ERROR;
697701 	}
698702 out:
699
-	drm_gem_object_put_unlocked(gobj);
703
+	drm_gem_object_put(gobj);
700704 	return r;
701705 }
702706 
....@@ -715,7 +719,7 @@
715719 	robj = gem_to_radeon_bo(gobj);
716720 
717721 	r = -EPERM;
718
-	if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
722
+	if (radeon_ttm_tt_has_userptr(robj->rdev, robj->tbo.ttm))
719723 		goto out;
720724 
721725 	r = radeon_bo_reserve(robj, false);
....@@ -737,7 +741,7 @@
737741 
738742 	radeon_bo_unreserve(robj);
739743 out:
740
-	drm_gem_object_put_unlocked(gobj);
744
+	drm_gem_object_put(gobj);
741745 	return r;
742746 }
743747 
....@@ -763,7 +767,7 @@
763767 
764768 	r = drm_gem_handle_create(file_priv, gobj, &handle);
765769 	/* drop reference from allocate - handle holds it now */
766
-	drm_gem_object_put_unlocked(gobj);
770
+	drm_gem_object_put(gobj);
767771 	if (r) {
768772 		return r;
769773 	}