hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
....@@ -36,6 +36,7 @@
3636
3737 #define MAX_AUDIOS 7
3838 #define MAX_PIPES 6
39
+#define MAX_DWB_PIPES 1
3940
4041 struct gamma_curve {
4142 uint32_t offset;
....@@ -52,6 +53,12 @@
5253 uint32_t custom_float_y;
5354 uint32_t custom_float_offset;
5455 uint32_t custom_float_slope;
56
+};
57
+
58
+struct curve_points3 {
59
+ struct curve_points red;
60
+ struct curve_points green;
61
+ struct curve_points blue;
5562 };
5663
5764 struct pwl_result_data {
....@@ -72,9 +79,46 @@
7279 uint32_t delta_blue_reg;
7380 };
7481
82
+struct dc_rgb {
83
+ uint32_t red;
84
+ uint32_t green;
85
+ uint32_t blue;
86
+};
87
+
88
+struct tetrahedral_17x17x17 {
89
+ struct dc_rgb lut0[1229];
90
+ struct dc_rgb lut1[1228];
91
+ struct dc_rgb lut2[1228];
92
+ struct dc_rgb lut3[1228];
93
+};
94
+struct tetrahedral_9x9x9 {
95
+ struct dc_rgb lut0[183];
96
+ struct dc_rgb lut1[182];
97
+ struct dc_rgb lut2[182];
98
+ struct dc_rgb lut3[182];
99
+};
100
+
101
+struct tetrahedral_params {
102
+ union {
103
+ struct tetrahedral_17x17x17 tetrahedral_17;
104
+ struct tetrahedral_9x9x9 tetrahedral_9;
105
+ };
106
+ bool use_tetrahedral_9;
107
+ bool use_12bits;
108
+
109
+};
110
+
111
+/* arr_curve_points - regamma regions/segments specification
112
+ * arr_points - beginning and end point specified separately (only one on DCE)
113
+ * corner_points - beginning and end point for all 3 colors (DCN)
114
+ * rgb_resulted - final curve
115
+ */
75116 struct pwl_params {
76117 struct gamma_curve arr_curve_points[34];
77
- struct curve_points arr_points[2];
118
+ union {
119
+ struct curve_points arr_points[2];
120
+ struct curve_points3 corner_points[2];
121
+ };
78122 struct pwl_result_data rgb_resulted[256 + 3];
79123 uint32_t hw_points_num;
80124 };
....@@ -106,6 +150,15 @@
106150 IPP_DEGAMMA_MODE_USER_PWL
107151 };
108152
153
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
154
+enum gamcor_mode {
155
+ GAMCOR_MODE_BYPASS,
156
+ GAMCOR_MODE_RESERVED_1,
157
+ GAMCOR_MODE_USER_PWL,
158
+ GAMCOR_MODE_RESERVED_3
159
+};
160
+#endif
161
+
109162 enum ipp_output_format {
110163 IPP_OUTPUT_FORMAT_12_BIT_FIX,
111164 IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
....@@ -133,12 +186,24 @@
133186 uint16_t regval[12];
134187 };
135188
189
+enum gamut_remap_select {
190
+ GAMUT_REMAP_BYPASS = 0,
191
+ GAMUT_REMAP_COEFF,
192
+ GAMUT_REMAP_COMA_COEFF,
193
+ GAMUT_REMAP_COMB_COEFF
194
+};
136195
137196 enum opp_regamma {
138197 OPP_REGAMMA_BYPASS = 0,
139198 OPP_REGAMMA_SRGB,
140199 OPP_REGAMMA_XVYCC,
141200 OPP_REGAMMA_USER
201
+};
202
+
203
+enum optc_dsc_mode {
204
+ OPTC_DSC_DISABLED = 0,
205
+ OPTC_DSC_ENABLED_444 = 1, /* 'RGB 444' or 'Simple YCbCr 4:2:2' (4:2:2 upsampled to 4:4:4) */
206
+ OPTC_DSC_ENABLED_NATIVE_SUBSAMPLED = 2 /* Native 4:2:2 or 4:2:0 */
142207 };
143208
144209 struct dc_bias_and_scale {
....@@ -162,7 +227,8 @@
162227 TEST_PATTERN_MODE_VERTICALBARS,
163228 TEST_PATTERN_MODE_HORIZONTALBARS,
164229 TEST_PATTERN_MODE_SINGLERAMP_RGB,
165
- TEST_PATTERN_MODE_DUALRAMP_RGB
230
+ TEST_PATTERN_MODE_DUALRAMP_RGB,
231
+ TEST_PATTERN_MODE_XR_BIAS_RGB
166232 };
167233
168234 enum test_pattern_color_format {
....@@ -184,7 +250,15 @@
184250 CONTROLLER_DP_TEST_PATTERN_RESERVED_8,
185251 CONTROLLER_DP_TEST_PATTERN_RESERVED_9,
186252 CONTROLLER_DP_TEST_PATTERN_RESERVED_A,
187
- CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA
253
+ CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA,
254
+ CONTROLLER_DP_TEST_PATTERN_SOLID_COLOR
255
+};
256
+
257
+enum controller_dp_color_space {
258
+ CONTROLLER_DP_COLOR_SPACE_RGB,
259
+ CONTROLLER_DP_COLOR_SPACE_YCBCR601,
260
+ CONTROLLER_DP_COLOR_SPACE_YCBCR709,
261
+ CONTROLLER_DP_COLOR_SPACE_UDEFINED
188262 };
189263
190264 enum dc_lut_mode {