hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h
....@@ -31,8 +31,8 @@
3131 #define __DCN_CALCS_H__
3232
3333 #include "bw_fixed.h"
34
-#include "display_clock.h"
3534 #include "../dml/display_mode_lib.h"
35
+
3636
3737 struct dc;
3838 struct dc_state;
....@@ -504,10 +504,10 @@
504504 float prefetch_mode;
505505 float dstx_after_scaler;
506506 float dsty_after_scaler;
507
- float v_update_offset_pix;
507
+ float v_update_offset_pix[number_of_planes_minus_one + 1];
508508 float total_repeater_delay_time;
509
- float v_update_width_pix;
510
- float v_ready_offset_pix;
509
+ float v_update_width_pix[number_of_planes_minus_one + 1];
510
+ float v_ready_offset_pix[number_of_planes_minus_one + 1];
511511 float t_setup;
512512 float t_wait;
513513 float bandwidth_available_for_immediate_flip;
....@@ -621,7 +621,8 @@
621621
622622 bool dcn_validate_bandwidth(
623623 struct dc *dc,
624
- struct dc_state *context);
624
+ struct dc_state *context,
625
+ bool fast_validate);
625626
626627 unsigned int dcn_find_dcfclk_suits_all(
627628 const struct dc *dc,
....@@ -631,5 +632,7 @@
631632 void dcn_bw_notify_pplib_of_wm_ranges(struct dc *dc);
632633 void dcn_bw_sync_calcs_and_dml(struct dc *dc);
633634
635
+enum source_macro_tile_size swizzle_mode_to_macro_tile_size(enum swizzle_mode_values sw_mode);
636
+
634637 #endif /* __DCN_CALCS_H__ */
635638