hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c
....@@ -23,8 +23,12 @@
2323 *
2424 */
2525
26
+#include <linux/delay.h>
27
+#include <linux/slab.h>
28
+
2629 #include "dm_services.h"
2730
31
+#include "include/gpio_interface.h"
2832 #include "include/gpio_types.h"
2933 #include "hw_gpio.h"
3034 #include "hw_ddc.h"
....@@ -42,18 +46,20 @@
4246 #define REG(reg)\
4347 (ddc->regs->reg)
4448
45
-static void destruct(
49
+struct gpio;
50
+
51
+static void dal_hw_ddc_destruct(
4652 struct hw_ddc *pin)
4753 {
4854 dal_hw_gpio_destruct(&pin->base);
4955 }
5056
51
-static void destroy(
57
+static void dal_hw_ddc_destroy(
5258 struct hw_gpio_pin **ptr)
5359 {
5460 struct hw_ddc *pin = HW_DDC_FROM_BASE(*ptr);
5561
56
- destruct(pin);
62
+ dal_hw_ddc_destruct(pin);
5763
5864 kfree(pin);
5965
....@@ -144,12 +150,23 @@
144150 AUX_PAD1_MODE, 0);
145151 }
146152
153
+ if (ddc->regs->dc_gpio_aux_ctrl_5 != 0) {
154
+ REG_UPDATE(dc_gpio_aux_ctrl_5, DDC_PAD_I2CMODE, 1);
155
+ }
156
+ //set DC_IO_aux_rxsel = 2'b01
157
+ if (ddc->regs->phy_aux_cntl != 0) {
158
+ REG_UPDATE(phy_aux_cntl, AUX_PAD_RXSEL, 1);
159
+ }
147160 return GPIO_RESULT_OK;
148161 case GPIO_DDC_CONFIG_TYPE_MODE_AUX:
149162 /* set the AUX pad mode */
150163 if (!aux_pad_mode) {
151164 REG_SET(gpio.MASK_reg, regval,
152165 AUX_PAD1_MODE, 1);
166
+ }
167
+ if (ddc->regs->dc_gpio_aux_ctrl_5 != 0) {
168
+ REG_UPDATE(dc_gpio_aux_ctrl_5,
169
+ DDC_PAD_I2CMODE, 0);
153170 }
154171
155172 return GPIO_RESULT_OK;
....@@ -190,7 +207,7 @@
190207 }
191208
192209 static const struct hw_gpio_pin_funcs funcs = {
193
- .destroy = destroy,
210
+ .destroy = dal_hw_ddc_destroy,
194211 .open = dal_hw_gpio_open,
195212 .get_value = dal_hw_gpio_get_value,
196213 .set_value = dal_hw_gpio_set_value,
....@@ -199,7 +216,7 @@
199216 .close = dal_hw_gpio_close,
200217 };
201218
202
-static void construct(
219
+static void dal_hw_ddc_construct(
203220 struct hw_ddc *ddc,
204221 enum gpio_id id,
205222 uint32_t en,
....@@ -209,24 +226,29 @@
209226 ddc->base.base.funcs = &funcs;
210227 }
211228
212
-struct hw_gpio_pin *dal_hw_ddc_create(
229
+void dal_hw_ddc_init(
230
+ struct hw_ddc **hw_ddc,
213231 struct dc_context *ctx,
214232 enum gpio_id id,
215233 uint32_t en)
216234 {
217
- struct hw_ddc *pin;
218
-
219235 if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) {
220236 ASSERT_CRITICAL(false);
221
- return NULL;
237
+ *hw_ddc = NULL;
222238 }
223239
224
- pin = kzalloc(sizeof(struct hw_ddc), GFP_KERNEL);
225
- if (!pin) {
240
+ *hw_ddc = kzalloc(sizeof(struct hw_ddc), GFP_KERNEL);
241
+ if (!*hw_ddc) {
226242 ASSERT_CRITICAL(false);
227
- return NULL;
243
+ return;
228244 }
229245
230
- construct(pin, id, en, ctx);
231
- return &pin->base.base;
246
+ dal_hw_ddc_construct(*hw_ddc, id, en, ctx);
247
+}
248
+
249
+struct hw_gpio_pin *dal_hw_ddc_get_pin(struct gpio *gpio)
250
+{
251
+ struct hw_ddc *hw_ddc = dal_gpio_get_ddc(gpio);
252
+
253
+ return &hw_ddc->base.base;
232254 }