add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c
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@@ -84,17 +84,17 @@
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 #define DCP_REG(reg) (reg + tg110->offsets.dcp)
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 #define DMIF_REG(reg) (reg + tg110->offsets.dmif)
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-static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_khz)
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+static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz)
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 {
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 	uint64_t pix_dur;
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 	uint32_t addr = mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1
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 					+ DCE110TG_FROM_TG(tg)->offsets.dmif;
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 	uint32_t value = dm_read_reg(tg->ctx, addr);
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-	if (pix_clk_khz == 0)
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+	if (pix_clk_100hz == 0)
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 		return;
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-	pix_dur = 1000000000 / pix_clk_khz;
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+	pix_dur = div_u64(10000000000ull, pix_clk_100hz);
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 	set_reg_field_value(
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 		value,
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@@ -107,12 +107,17 @@
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 static void program_timing(struct timing_generator *tg,
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 	const struct dc_crtc_timing *timing,
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+	int vready_offset,
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+	int vstartup_start,
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+	int vupdate_offset,
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+	int vupdate_width,
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+	const enum signal_type signal,
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 	bool use_vbios)
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 {
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 	if (!use_vbios)
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-		program_pix_dur(tg, timing->pix_clk_khz);
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+		program_pix_dur(tg, timing->pix_clk_100hz);
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-	dce110_tg_program_timing(tg, timing, use_vbios);
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+	dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios);
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 }
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 static void dce80_timing_generator_enable_advanced_request(