kernel/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
.. .. @@ -25,7 +25,7 @@ 25 25 26 26 #include "dce_hwseq.h" 27 27 #include "reg_helper.h" 28 -#include "hw_sequencer.h"28 +#include "hw_sequencer_private.h"29 29 #include "core_types.h" 30 30 31 31 #define CTX \ .. .. @@ -85,6 +85,15 @@ 85 85 } 86 86 } 87 87 88 +#if defined(CONFIG_DRM_AMD_DC_SI)89 +void dce60_pipe_control_lock(struct dc *dc,90 + struct pipe_ctx *pipe,91 + bool lock)92 +{93 + /* DCE6 has no BLND_V_UPDATE_LOCK register */94 +}95 +#endif96 +88 97 void dce_set_blender_mode(struct dce_hwseq *hws, 89 98 unsigned int blnd_inst, 90 99 enum blnd_mode mode)