add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
..
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@@ -46,6 +46,24 @@
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 	SR(SMU_INTERRUPT_CONTROL), \
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 	SR(DC_DMCU_SCRATCH)
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+#if defined(CONFIG_DRM_AMD_DC_SI)
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+#define DMCU_DCE60_REG_LIST() \
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+	SR(DMCU_CTRL), \
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+	SR(DMCU_STATUS), \
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+	SR(DMCU_RAM_ACCESS_CTRL), \
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+	SR(DMCU_IRAM_WR_CTRL), \
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+	SR(DMCU_IRAM_WR_DATA), \
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+	SR(MASTER_COMM_DATA_REG1), \
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+	SR(MASTER_COMM_DATA_REG2), \
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+	SR(MASTER_COMM_DATA_REG3), \
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+	SR(MASTER_COMM_CMD_REG), \
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+	SR(MASTER_COMM_CNTL_REG), \
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+	SR(DMCU_IRAM_RD_CTRL), \
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+	SR(DMCU_IRAM_RD_DATA), \
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+	SR(DMCU_INTERRUPT_TO_UC_EN_MASK), \
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+	SR(DC_DMCU_SCRATCH)
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+#endif
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+
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 #define DMCU_DCE80_REG_LIST() \
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 	SR(DMCU_CTRL), \
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 	SR(DMCU_STATUS), \
..
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@@ -70,6 +88,10 @@
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 #define DMCU_DCN10_REG_LIST()\
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 	DMCU_COMMON_REG_LIST_DCE_BASE(), \
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 	SR(DMU_MEM_PWR_CNTL)
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+
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+#define DMCU_DCN20_REG_LIST()\
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+	DMCU_DCN10_REG_LIST(), \
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+	SR(DMCUB_SCRATCH15)
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 #define DMCU_SF(reg_name, field_name, post_fix)\
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 	.field_name = reg_name ## __ ## field_name ## post_fix
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@@ -99,6 +121,25 @@
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 	DMCU_SF(DMCU_INTERRUPT_TO_UC_EN_MASK, \
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 			STATIC_SCREEN4_INT_TO_UC_EN, mask_sh), \
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 	DMCU_SF(SMU_INTERRUPT_CONTROL, DC_SMU_INT_ENABLE, mask_sh)
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+
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+#if defined(CONFIG_DRM_AMD_DC_SI)
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+#define DMCU_MASK_SH_LIST_DCE60(mask_sh) \
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+	DMCU_SF(DMCU_CTRL, \
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+			DMCU_ENABLE, mask_sh), \
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+	DMCU_SF(DMCU_STATUS, \
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+			UC_IN_STOP_MODE, mask_sh), \
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+	DMCU_SF(DMCU_STATUS, \
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+			UC_IN_RESET, mask_sh), \
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+	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
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+			IRAM_HOST_ACCESS_EN, mask_sh), \
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+	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
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+			IRAM_WR_ADDR_AUTO_INC, mask_sh), \
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+	DMCU_SF(DMCU_RAM_ACCESS_CTRL, \
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+			IRAM_RD_ADDR_AUTO_INC, mask_sh), \
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+	DMCU_SF(MASTER_COMM_CMD_REG, \
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+			MASTER_COMM_CMD_REG_BYTE0, mask_sh), \
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+	DMCU_SF(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, mask_sh)
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+#endif
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 #define DMCU_MASK_SH_LIST_DCE80(mask_sh) \
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 	DMCU_SF(DMCU_CTRL, \
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@@ -175,6 +216,7 @@
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 	uint32_t DMCU_INTERRUPT_TO_UC_EN_MASK;
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 	uint32_t SMU_INTERRUPT_CONTROL;
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 	uint32_t DC_DMCU_SCRATCH;
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+	uint32_t DMCUB_SCRATCH15;
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 };
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 struct dce_dmcu {
..
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@@ -199,16 +241,16 @@
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  ******************************************************************/
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 union dce_dmcu_psr_config_data_reg1 {
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 	struct {
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-		unsigned int timehyst_frames:8;    /*[7:0]*/
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-		unsigned int hyst_lines:7;         /*[14:8]*/
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-		unsigned int rfb_update_auto_en:1; /*[15:15]*/
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-		unsigned int dp_port_num:3;        /*[18:16]*/
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-		unsigned int dcp_sel:3;            /*[21:19]*/
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-		unsigned int phy_type:1;           /*[22:22]*/
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-		unsigned int frame_cap_ind:1;      /*[23:23]*/
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-		unsigned int aux_chan:3;           /*[26:24]*/
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-		unsigned int aux_repeat:4;         /*[30:27]*/
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-		unsigned int reserved:1;           /*[31:31]*/
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+		unsigned int timehyst_frames:8;                  /*[7:0]*/
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+		unsigned int hyst_lines:7;                       /*[14:8]*/
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+		unsigned int rfb_update_auto_en:1;               /*[15:15]*/
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+		unsigned int dp_port_num:3;                      /*[18:16]*/
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+		unsigned int dcp_sel:3;                          /*[21:19]*/
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+		unsigned int phy_type:1;                         /*[22:22]*/
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+		unsigned int frame_cap_ind:1;                    /*[23:23]*/
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+		unsigned int aux_chan:3;                         /*[26:24]*/
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+		unsigned int aux_repeat:4;                       /*[30:27]*/
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+		unsigned int allow_smu_optimizations:1;         /*[31:31]*/
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 	} bits;
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 	unsigned int u32All;
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 };
..
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@@ -236,7 +278,7 @@
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 	struct {
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 		unsigned int psr_level:16;      /*[15:0]*/
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 		unsigned int link_rate:4;       /*[19:16]*/
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-		unsigned int reserved:12;       /*[31:20]*/
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+		unsigned int reserved:12;        /*[31:20]*/
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 	} bits;
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 	unsigned int u32All;
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 };
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@@ -261,6 +303,20 @@
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 	const struct dce_dmcu_shift *dmcu_shift,
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 	const struct dce_dmcu_mask *dmcu_mask);
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+struct dmcu *dcn20_dmcu_create(
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+	struct dc_context *ctx,
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+	const struct dce_dmcu_registers *regs,
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+	const struct dce_dmcu_shift *dmcu_shift,
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+	const struct dce_dmcu_mask *dmcu_mask);
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+
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+struct dmcu *dcn21_dmcu_create(
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+	struct dc_context *ctx,
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+	const struct dce_dmcu_registers *regs,
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+	const struct dce_dmcu_shift *dmcu_shift,
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+	const struct dce_dmcu_mask *dmcu_mask);
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+
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 void dce_dmcu_destroy(struct dmcu **dmcu);
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+static const uint32_t abm_gain_stepsize = 0x0060;
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+
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 #endif /* _DCE_ABM_H_ */