add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/gpio/gpio-mvebu.c
..
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@@ -38,6 +38,7 @@
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 #include <linux/err.h>
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 #include <linux/gpio/driver.h>
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 #include <linux/gpio/consumer.h>
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+#include <linux/gpio/machine.h>
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 #include <linux/init.h>
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 #include <linux/io.h>
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 #include <linux/irq.h>
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@@ -45,7 +46,6 @@
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 #include <linux/irqdomain.h>
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 #include <linux/mfd/syscon.h>
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 #include <linux/of_device.h>
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-#include <linux/of_irq.h>
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 #include <linux/pinctrl/consumer.h>
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 #include <linux/platform_device.h>
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 #include <linux/pwm.h>
..
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@@ -376,6 +376,19 @@
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 	return 0;
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 }
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378
 
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+static int mvebu_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
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+{
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+	struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip);
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+	u32 u;
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+
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+	regmap_read(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, &u);
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+
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+	if (u & BIT(pin))
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+		return GPIO_LINE_DIRECTION_IN;
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+
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+	return GPIO_LINE_DIRECTION_OUT;
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+}
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+
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 static int mvebu_gpio_to_irq(struct gpio_chip *chip, unsigned int pin)
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 {
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 	struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip);
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@@ -418,6 +431,7 @@
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 	u32 mask = d->mask;
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432
 
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 	irq_gc_lock(gc);
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+	mvebu_gpio_write_edge_cause(mvchip, ~mask);
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 	ct->mask_cache_priv |= mask;
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 	mvebu_gpio_write_edge_mask(mvchip, ct->mask_cache_priv);
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 	irq_gc_unlock(gc);
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@@ -608,15 +622,11 @@
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 		ret = -EBUSY;
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623
 	} else {
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 		desc = gpiochip_request_own_desc(&mvchip->chip,
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-						 pwm->hwpwm, "mvebu-pwm");
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+						 pwm->hwpwm, "mvebu-pwm",
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+						 GPIO_ACTIVE_HIGH,
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+						 GPIOD_OUT_LOW);
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 		if (IS_ERR(desc)) {
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629
 			ret = PTR_ERR(desc);
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-			goto out;
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-		}
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-
617
-		ret = gpiod_direction_output(desc, 0);
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-		if (ret) {
619
-			gpiochip_free_own_desc(desc);
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 			goto out;
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 		}
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632
 
..
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@@ -682,13 +692,16 @@
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 }
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693
 
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 static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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-			   struct pwm_state *state)
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+			   const struct pwm_state *state)
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 {
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 	struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip);
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 	struct mvebu_gpio_chip *mvchip = mvpwm->mvchip;
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 	unsigned long long val;
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 	unsigned long flags;
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 	unsigned int on, off;
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+
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+	if (state->polarity != PWM_POLARITY_NORMAL)
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+		return -EINVAL;
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705
 
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 	val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle;
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 	do_div(val, NSEC_PER_SEC);
..
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@@ -761,7 +774,6 @@
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 {
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 	struct device *dev = &pdev->dev;
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 	struct mvebu_pwm *mvpwm;
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-	struct resource *res;
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 	u32 set;
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 	if (!of_device_is_compatible(mvchip->chip.of_node,
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@@ -774,8 +786,7 @@
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 	 * for the first two GPIO chips. So if the resource is missing
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 	 * we can't treat it as an error.
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 	 */
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-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm");
778
-	if (!res)
789
+	if (!platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm"))
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 		return 0;
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791
 
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 	if (IS_ERR(mvchip->clk))
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@@ -800,7 +811,7 @@
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 	mvchip->mvpwm = mvpwm;
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 	mvpwm->mvchip = mvchip;
802
813
 
803
-	mvpwm->membase = devm_ioremap_resource(dev, res);
814
+	mvpwm->membase = devm_platform_ioremap_resource_byname(pdev, "pwm");
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815
 	if (IS_ERR(mvpwm->membase))
805
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 		return PTR_ERR(mvpwm->membase);
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817
 
..
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@@ -833,6 +844,7 @@
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 {
834
845
 	struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip);
835
846
 	u32 out, io_conf, blink, in_pol, data_in, cause, edg_msk, lvl_msk;
847
+	const char *label;
836
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 	int i;
837
849
 
838
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 	regmap_read(mvchip->regs, GPIO_OUT_OFF + mvchip->offset, &out);
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@@ -844,14 +856,9 @@
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 	edg_msk	= mvebu_gpio_read_edge_mask(mvchip);
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 	lvl_msk	= mvebu_gpio_read_level_mask(mvchip);
846
858
 
847
-	for (i = 0; i < chip->ngpio; i++) {
848
-		const char *label;
859
+	for_each_requested_gpio(chip, i, label) {
849
860
 		u32 msk;
850
861
 		bool is_out;
851
-
852
-		label = gpiochip_is_requested(chip, i);
853
-		if (!label)
854
-			continue;
855
862
 
856
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 		msk = BIT(i);
857
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 		is_out = !(io_conf & msk);
..
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@@ -1023,11 +1030,9 @@
1023
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 static int mvebu_gpio_probe_raw(struct platform_device *pdev,
1024
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 				struct mvebu_gpio_chip *mvchip)
1025
1032
 {
1026
-	struct resource *res;
1027
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 	void __iomem *base;
1028
1034
 
1029
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1030
-	base = devm_ioremap_resource(&pdev->dev, res);
1035
+	base = devm_platform_ioremap_resource(pdev, 0);
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1036
 	if (IS_ERR(base))
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 		return PTR_ERR(base);
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1038
 
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@@ -1047,8 +1052,7 @@
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1052
 	 * per-CPU registers
1048
1053
 	 */
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 	if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_ARMADAXP) {
1050
-		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1051
-		base = devm_ioremap_resource(&pdev->dev, res);
1055
+		base = devm_platform_ioremap_resource(pdev, 1);
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1056
 		if (IS_ERR(base))
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 			return PTR_ERR(base);
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1058
 
..
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@@ -1095,7 +1099,11 @@
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 		soc_variant = MVEBU_GPIO_SOC_VARIANT_ORION;
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1100
 
1097
1101
 	/* Some gpio controllers do not provide irq support */
1098
-	have_irqs = of_irq_count(np) != 0;
1102
+	err = platform_irq_count(pdev);
1103
+	if (err < 0)
1104
+		return err;
1105
+
1106
+	have_irqs = err != 0;
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1107
 
1100
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 	mvchip = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_gpio_chip),
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 			      GFP_KERNEL);
..
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@@ -1125,6 +1133,7 @@
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 	mvchip->chip.parent = &pdev->dev;
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 	mvchip->chip.request = gpiochip_generic_request;
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 	mvchip->chip.free = gpiochip_generic_free;
1136
+	mvchip->chip.get_direction = mvebu_gpio_get_direction;
1128
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 	mvchip->chip.direction_input = mvebu_gpio_direction_input;
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 	mvchip->chip.get = mvebu_gpio_get;
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 	mvchip->chip.direction_output = mvebu_gpio_direction_output;
..
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@@ -1243,7 +1252,7 @@
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 	 * pins.
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 	 */
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 	for (i = 0; i < 4; i++) {
1246
-		int irq = platform_get_irq(pdev, i);
1255
+		int irq = platform_get_irq_optional(pdev, i);
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1256
 
1248
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 		if (irq < 0)
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1258
 			continue;