.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * GPIO Chip driver for Analog Devices |
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3 | 4 | * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller |
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4 | 5 | * |
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5 | 6 | * Copyright 2009-2010 Analog Devices Inc. |
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6 | | - * |
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7 | | - * Licensed under the GPL-2 or later. |
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8 | 7 | */ |
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9 | 8 | |
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10 | 9 | #include <linux/module.h> |
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.. | .. |
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15 | 14 | #include <linux/gpio/driver.h> |
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16 | 15 | #include <linux/interrupt.h> |
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17 | 16 | #include <linux/irq.h> |
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| 17 | +#include <linux/of_device.h> |
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18 | 18 | |
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19 | 19 | #include <linux/platform_data/adp5588.h> |
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20 | 20 | |
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.. | .. |
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33 | 33 | struct mutex lock; /* protect cached dir, dat_out */ |
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34 | 34 | /* protect serialized access to the interrupt controller bus */ |
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35 | 35 | struct mutex irq_lock; |
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36 | | - unsigned gpio_start; |
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37 | | - unsigned irq_base; |
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38 | 36 | uint8_t dat_out[3]; |
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39 | 37 | uint8_t dir[3]; |
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40 | | - uint8_t int_lvl[3]; |
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| 38 | + uint8_t int_lvl_low[3]; |
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| 39 | + uint8_t int_lvl_high[3]; |
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41 | 40 | uint8_t int_en[3]; |
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42 | 41 | uint8_t irq_mask[3]; |
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43 | | - uint8_t irq_stat[3]; |
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44 | 42 | uint8_t int_input_en[3]; |
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45 | | - uint8_t int_lvl_cached[3]; |
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46 | 43 | }; |
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47 | 44 | |
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48 | 45 | static int adp5588_gpio_read(struct i2c_client *client, u8 reg) |
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.. | .. |
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148 | 145 | } |
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149 | 146 | |
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150 | 147 | #ifdef CONFIG_GPIO_ADP5588_IRQ |
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151 | | -static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off) |
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152 | | -{ |
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153 | | - struct adp5588_gpio *dev = gpiochip_get_data(chip); |
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154 | | - |
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155 | | - return dev->irq_base + off; |
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156 | | -} |
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157 | 148 | |
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158 | 149 | static void adp5588_irq_bus_lock(struct irq_data *d) |
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159 | 150 | { |
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160 | | - struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
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| 151 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 152 | + struct adp5588_gpio *dev = gpiochip_get_data(gc); |
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161 | 153 | |
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162 | 154 | mutex_lock(&dev->irq_lock); |
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163 | 155 | } |
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.. | .. |
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172 | 164 | |
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173 | 165 | static void adp5588_irq_bus_sync_unlock(struct irq_data *d) |
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174 | 166 | { |
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175 | | - struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
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| 167 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 168 | + struct adp5588_gpio *dev = gpiochip_get_data(gc); |
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176 | 169 | int i; |
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177 | 170 | |
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178 | 171 | for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) { |
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.. | .. |
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185 | 178 | mutex_unlock(&dev->lock); |
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186 | 179 | } |
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187 | 180 | |
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188 | | - if (dev->int_lvl_cached[i] != dev->int_lvl[i]) { |
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189 | | - dev->int_lvl_cached[i] = dev->int_lvl[i]; |
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190 | | - adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + i, |
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191 | | - dev->int_lvl[i]); |
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192 | | - } |
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193 | | - |
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194 | 181 | if (dev->int_en[i] ^ dev->irq_mask[i]) { |
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195 | 182 | dev->int_en[i] = dev->irq_mask[i]; |
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196 | | - adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i, |
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| 183 | + adp5588_gpio_write(dev->client, GPI_EM1 + i, |
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197 | 184 | dev->int_en[i]); |
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198 | 185 | } |
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199 | 186 | } |
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.. | .. |
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203 | 190 | |
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204 | 191 | static void adp5588_irq_mask(struct irq_data *d) |
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205 | 192 | { |
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206 | | - struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
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207 | | - unsigned gpio = d->irq - dev->irq_base; |
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| 193 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 194 | + struct adp5588_gpio *dev = gpiochip_get_data(gc); |
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208 | 195 | |
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209 | | - dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio); |
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| 196 | + dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq); |
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210 | 197 | } |
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211 | 198 | |
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212 | 199 | static void adp5588_irq_unmask(struct irq_data *d) |
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213 | 200 | { |
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214 | | - struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
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215 | | - unsigned gpio = d->irq - dev->irq_base; |
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| 201 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 202 | + struct adp5588_gpio *dev = gpiochip_get_data(gc); |
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216 | 203 | |
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217 | | - dev->irq_mask[ADP5588_BANK(gpio)] |= ADP5588_BIT(gpio); |
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| 204 | + dev->irq_mask[ADP5588_BANK(d->hwirq)] |= ADP5588_BIT(d->hwirq); |
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218 | 205 | } |
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219 | 206 | |
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220 | 207 | static int adp5588_irq_set_type(struct irq_data *d, unsigned int type) |
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221 | 208 | { |
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222 | | - struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d); |
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223 | | - uint16_t gpio = d->irq - dev->irq_base; |
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| 209 | + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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| 210 | + struct adp5588_gpio *dev = gpiochip_get_data(gc); |
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| 211 | + uint16_t gpio = d->hwirq; |
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224 | 212 | unsigned bank, bit; |
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225 | | - |
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226 | | - if ((type & IRQ_TYPE_EDGE_BOTH)) { |
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227 | | - dev_err(&dev->client->dev, "irq %d: unsupported type %d\n", |
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228 | | - d->irq, type); |
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229 | | - return -EINVAL; |
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230 | | - } |
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231 | 213 | |
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232 | 214 | bank = ADP5588_BANK(gpio); |
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233 | 215 | bit = ADP5588_BIT(gpio); |
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234 | 216 | |
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235 | | - if (type & IRQ_TYPE_LEVEL_HIGH) |
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236 | | - dev->int_lvl[bank] |= bit; |
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237 | | - else if (type & IRQ_TYPE_LEVEL_LOW) |
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238 | | - dev->int_lvl[bank] &= ~bit; |
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239 | | - else |
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240 | | - return -EINVAL; |
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| 217 | + dev->int_lvl_low[bank] &= ~bit; |
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| 218 | + dev->int_lvl_high[bank] &= ~bit; |
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| 219 | + |
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| 220 | + if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_HIGH) |
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| 221 | + dev->int_lvl_high[bank] |= bit; |
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| 222 | + |
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| 223 | + if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_LOW) |
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| 224 | + dev->int_lvl_low[bank] |= bit; |
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241 | 225 | |
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242 | 226 | dev->int_input_en[bank] |= bit; |
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243 | 227 | |
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.. | .. |
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253 | 237 | .irq_set_type = adp5588_irq_set_type, |
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254 | 238 | }; |
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255 | 239 | |
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256 | | -static int adp5588_gpio_read_intstat(struct i2c_client *client, u8 *buf) |
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257 | | -{ |
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258 | | - int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf); |
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259 | | - |
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260 | | - if (ret < 0) |
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261 | | - dev_err(&client->dev, "Read INT_STAT Error\n"); |
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262 | | - |
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263 | | - return ret; |
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264 | | -} |
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265 | | - |
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266 | 240 | static irqreturn_t adp5588_irq_handler(int irq, void *devid) |
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267 | 241 | { |
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268 | 242 | struct adp5588_gpio *dev = devid; |
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269 | | - unsigned status, bank, bit, pending; |
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270 | | - int ret; |
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271 | | - status = adp5588_gpio_read(dev->client, INT_STAT); |
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| 243 | + int status = adp5588_gpio_read(dev->client, INT_STAT); |
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272 | 244 | |
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273 | | - if (status & ADP5588_GPI_INT) { |
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274 | | - ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat); |
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275 | | - if (ret < 0) |
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276 | | - memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat)); |
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| 245 | + if (status & ADP5588_KE_INT) { |
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| 246 | + int ev_cnt = adp5588_gpio_read(dev->client, KEY_LCK_EC_STAT); |
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277 | 247 | |
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278 | | - for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO); |
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279 | | - bank++, bit = 0) { |
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280 | | - pending = dev->irq_stat[bank] & dev->irq_mask[bank]; |
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| 248 | + if (ev_cnt > 0) { |
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| 249 | + int i; |
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281 | 250 | |
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282 | | - while (pending) { |
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283 | | - if (pending & (1 << bit)) { |
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284 | | - handle_nested_irq(dev->irq_base + |
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285 | | - (bank << 3) + bit); |
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286 | | - pending &= ~(1 << bit); |
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| 251 | + for (i = 0; i < (ev_cnt & ADP5588_KEC); i++) { |
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| 252 | + int key = adp5588_gpio_read(dev->client, |
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| 253 | + Key_EVENTA + i); |
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| 254 | + /* GPIN events begin at 97, |
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| 255 | + * bit 7 indicates logic level |
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| 256 | + */ |
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| 257 | + int gpio = (key & 0x7f) - 97; |
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| 258 | + int lvl = key & (1 << 7); |
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| 259 | + int bank = ADP5588_BANK(gpio); |
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| 260 | + int bit = ADP5588_BIT(gpio); |
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287 | 261 | |
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288 | | - } |
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289 | | - bit++; |
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| 262 | + if ((lvl && dev->int_lvl_high[bank] & bit) || |
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| 263 | + (!lvl && dev->int_lvl_low[bank] & bit)) |
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| 264 | + handle_nested_irq(irq_find_mapping( |
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| 265 | + dev->gpio_chip.irq.domain, gpio)); |
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290 | 266 | } |
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291 | 267 | } |
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292 | 268 | } |
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.. | .. |
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296 | 272 | return IRQ_HANDLED; |
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297 | 273 | } |
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298 | 274 | |
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| 275 | + |
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| 276 | +static int adp5588_irq_init_hw(struct gpio_chip *gc) |
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| 277 | +{ |
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| 278 | + struct adp5588_gpio *dev = gpiochip_get_data(gc); |
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| 279 | + /* Enable IRQs after registering chip */ |
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| 280 | + adp5588_gpio_write(dev->client, CFG, |
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| 281 | + ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_KE_IEN); |
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| 282 | + |
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| 283 | + return 0; |
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| 284 | +} |
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| 285 | + |
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299 | 286 | static int adp5588_irq_setup(struct adp5588_gpio *dev) |
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300 | 287 | { |
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301 | 288 | struct i2c_client *client = dev->client; |
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| 289 | + int ret; |
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302 | 290 | struct adp5588_gpio_platform_data *pdata = |
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303 | 291 | dev_get_platdata(&client->dev); |
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304 | | - unsigned gpio; |
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305 | | - int ret; |
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| 292 | + struct gpio_irq_chip *girq; |
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306 | 293 | |
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307 | 294 | adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC); |
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308 | 295 | adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */ |
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309 | | - adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */ |
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310 | 296 | |
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311 | | - dev->irq_base = pdata->irq_base; |
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312 | 297 | mutex_init(&dev->irq_lock); |
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313 | 298 | |
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314 | | - for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) { |
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315 | | - int irq = gpio + dev->irq_base; |
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316 | | - irq_set_chip_data(irq, dev); |
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317 | | - irq_set_chip_and_handler(irq, &adp5588_irq_chip, |
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318 | | - handle_level_irq); |
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319 | | - irq_set_nested_thread(irq, 1); |
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320 | | - irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE); |
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321 | | - } |
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322 | | - |
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323 | | - ret = request_threaded_irq(client->irq, |
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324 | | - NULL, |
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325 | | - adp5588_irq_handler, |
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326 | | - IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
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327 | | - dev_name(&client->dev), dev); |
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| 299 | + ret = devm_request_threaded_irq(&client->dev, client->irq, |
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| 300 | + NULL, adp5588_irq_handler, IRQF_ONESHOT |
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| 301 | + | IRQF_TRIGGER_FALLING | IRQF_SHARED, |
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| 302 | + dev_name(&client->dev), dev); |
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328 | 303 | if (ret) { |
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329 | 304 | dev_err(&client->dev, "failed to request irq %d\n", |
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330 | 305 | client->irq); |
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331 | | - goto out; |
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| 306 | + return ret; |
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332 | 307 | } |
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333 | 308 | |
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334 | | - dev->gpio_chip.to_irq = adp5588_gpio_to_irq; |
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335 | | - adp5588_gpio_write(client, CFG, |
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336 | | - ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_GPI_INT); |
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| 309 | + /* This will be registered in the call to devm_gpiochip_add_data() */ |
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| 310 | + girq = &dev->gpio_chip.irq; |
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| 311 | + girq->chip = &adp5588_irq_chip; |
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| 312 | + /* This will let us handle the parent IRQ in the driver */ |
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| 313 | + girq->parent_handler = NULL; |
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| 314 | + girq->num_parents = 0; |
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| 315 | + girq->parents = NULL; |
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| 316 | + girq->first = pdata ? pdata->irq_base : 0; |
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| 317 | + girq->default_type = IRQ_TYPE_NONE; |
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| 318 | + girq->handler = handle_simple_irq; |
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| 319 | + girq->init_hw = adp5588_irq_init_hw; |
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| 320 | + girq->threaded = true; |
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337 | 321 | |
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338 | 322 | return 0; |
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339 | | - |
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340 | | -out: |
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341 | | - dev->irq_base = 0; |
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342 | | - return ret; |
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343 | | -} |
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344 | | - |
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345 | | -static void adp5588_irq_teardown(struct adp5588_gpio *dev) |
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346 | | -{ |
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347 | | - if (dev->irq_base) |
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348 | | - free_irq(dev->client->irq, dev); |
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349 | 323 | } |
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350 | 324 | |
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351 | 325 | #else |
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.. | .. |
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357 | 331 | return 0; |
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358 | 332 | } |
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359 | 333 | |
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360 | | -static void adp5588_irq_teardown(struct adp5588_gpio *dev) |
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361 | | -{ |
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362 | | -} |
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363 | 334 | #endif /* CONFIG_GPIO_ADP5588_IRQ */ |
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364 | 335 | |
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365 | | -static int adp5588_gpio_probe(struct i2c_client *client, |
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366 | | - const struct i2c_device_id *id) |
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| 336 | +static int adp5588_gpio_probe(struct i2c_client *client) |
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367 | 337 | { |
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368 | 338 | struct adp5588_gpio_platform_data *pdata = |
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369 | 339 | dev_get_platdata(&client->dev); |
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370 | 340 | struct adp5588_gpio *dev; |
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371 | 341 | struct gpio_chip *gc; |
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372 | 342 | int ret, i, revid; |
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373 | | - |
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374 | | - if (!pdata) { |
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375 | | - dev_err(&client->dev, "missing platform data\n"); |
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376 | | - return -ENODEV; |
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377 | | - } |
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| 343 | + unsigned int pullup_dis_mask = 0; |
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378 | 344 | |
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379 | 345 | if (!i2c_check_functionality(client->adapter, |
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380 | 346 | I2C_FUNC_SMBUS_BYTE_DATA)) { |
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.. | .. |
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394 | 360 | gc->get = adp5588_gpio_get_value; |
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395 | 361 | gc->set = adp5588_gpio_set_value; |
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396 | 362 | gc->can_sleep = true; |
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| 363 | + gc->base = -1; |
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| 364 | + gc->parent = &client->dev; |
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397 | 365 | |
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398 | | - gc->base = pdata->gpio_start; |
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| 366 | + if (pdata) { |
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| 367 | + gc->base = pdata->gpio_start; |
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| 368 | + gc->names = pdata->names; |
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| 369 | + pullup_dis_mask = pdata->pullup_dis_mask; |
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| 370 | + } |
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| 371 | + |
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399 | 372 | gc->ngpio = ADP5588_MAXGPIO; |
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400 | 373 | gc->label = client->name; |
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401 | 374 | gc->owner = THIS_MODULE; |
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402 | | - gc->names = pdata->names; |
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403 | 375 | |
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404 | 376 | mutex_init(&dev->lock); |
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405 | 377 | |
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406 | 378 | ret = adp5588_gpio_read(dev->client, DEV_ID); |
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407 | 379 | if (ret < 0) |
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408 | | - goto err; |
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| 380 | + return ret; |
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409 | 381 | |
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410 | 382 | revid = ret & ADP5588_DEVICE_ID_MASK; |
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411 | 383 | |
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.. | .. |
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414 | 386 | dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i); |
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415 | 387 | ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0); |
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416 | 388 | ret |= adp5588_gpio_write(client, GPIO_PULL1 + i, |
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417 | | - (pdata->pullup_dis_mask >> (8 * i)) & 0xFF); |
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| 389 | + (pullup_dis_mask >> (8 * i)) & 0xFF); |
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418 | 390 | ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0); |
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419 | 391 | if (ret) |
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420 | | - goto err; |
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| 392 | + return ret; |
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421 | 393 | } |
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422 | 394 | |
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423 | | - if (pdata->irq_base) { |
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| 395 | + if (client->irq) { |
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424 | 396 | if (WA_DELAYED_READOUT_REVID(revid)) { |
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425 | 397 | dev_warn(&client->dev, "GPIO int not supported\n"); |
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426 | 398 | } else { |
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427 | 399 | ret = adp5588_irq_setup(dev); |
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428 | 400 | if (ret) |
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429 | | - goto err; |
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| 401 | + return ret; |
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430 | 402 | } |
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431 | 403 | } |
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432 | 404 | |
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433 | 405 | ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev); |
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434 | 406 | if (ret) |
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435 | | - goto err_irq; |
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| 407 | + return ret; |
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436 | 408 | |
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437 | | - dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n", |
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438 | | - pdata->irq_base, revid); |
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439 | | - |
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440 | | - if (pdata->setup) { |
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| 409 | + if (pdata && pdata->setup) { |
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441 | 410 | ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context); |
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442 | 411 | if (ret < 0) |
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443 | 412 | dev_warn(&client->dev, "setup failed, %d\n", ret); |
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.. | .. |
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446 | 415 | i2c_set_clientdata(client, dev); |
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447 | 416 | |
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448 | 417 | return 0; |
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449 | | - |
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450 | | -err_irq: |
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451 | | - adp5588_irq_teardown(dev); |
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452 | | -err: |
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453 | | - return ret; |
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454 | 418 | } |
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455 | 419 | |
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456 | 420 | static int adp5588_gpio_remove(struct i2c_client *client) |
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.. | .. |
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460 | 424 | struct adp5588_gpio *dev = i2c_get_clientdata(client); |
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461 | 425 | int ret; |
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462 | 426 | |
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463 | | - if (pdata->teardown) { |
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| 427 | + if (pdata && pdata->teardown) { |
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464 | 428 | ret = pdata->teardown(client, |
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465 | 429 | dev->gpio_chip.base, dev->gpio_chip.ngpio, |
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466 | 430 | pdata->context); |
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.. | .. |
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470 | 434 | } |
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471 | 435 | } |
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472 | 436 | |
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473 | | - if (dev->irq_base) |
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| 437 | + if (dev->client->irq) |
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474 | 438 | free_irq(dev->client->irq, dev); |
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475 | 439 | |
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476 | 440 | return 0; |
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.. | .. |
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480 | 444 | {DRV_NAME, 0}, |
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481 | 445 | {} |
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482 | 446 | }; |
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483 | | - |
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484 | 447 | MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id); |
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| 448 | + |
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| 449 | +#ifdef CONFIG_OF |
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| 450 | +static const struct of_device_id adp5588_gpio_of_id[] = { |
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| 451 | + { .compatible = "adi," DRV_NAME, }, |
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| 452 | + {}, |
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| 453 | +}; |
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| 454 | +MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id); |
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| 455 | +#endif |
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485 | 456 | |
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486 | 457 | static struct i2c_driver adp5588_gpio_driver = { |
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487 | 458 | .driver = { |
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488 | | - .name = DRV_NAME, |
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489 | | - }, |
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490 | | - .probe = adp5588_gpio_probe, |
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| 459 | + .name = DRV_NAME, |
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| 460 | + .of_match_table = of_match_ptr(adp5588_gpio_of_id), |
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| 461 | + }, |
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| 462 | + .probe_new = adp5588_gpio_probe, |
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491 | 463 | .remove = adp5588_gpio_remove, |
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492 | 464 | .id_table = adp5588_gpio_id, |
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493 | 465 | }; |
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494 | 466 | |
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495 | 467 | module_i2c_driver(adp5588_gpio_driver); |
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496 | 468 | |
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497 | | -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); |
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| 469 | +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); |
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498 | 470 | MODULE_DESCRIPTION("GPIO ADP5588 Driver"); |
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499 | 471 | MODULE_LICENSE("GPL"); |
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