.. | .. |
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1 | | -/* |
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2 | | - This file is provided under a dual BSD/GPLv2 license. When using or |
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3 | | - redistributing this file, you may do so under either license. |
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4 | | - |
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5 | | - GPL LICENSE SUMMARY |
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6 | | - Copyright(c) 2014 Intel Corporation. |
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7 | | - This program is free software; you can redistribute it and/or modify |
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8 | | - it under the terms of version 2 of the GNU General Public License as |
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9 | | - published by the Free Software Foundation. |
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10 | | - |
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11 | | - This program is distributed in the hope that it will be useful, but |
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12 | | - WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | | - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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14 | | - General Public License for more details. |
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15 | | - |
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16 | | - Contact Information: |
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17 | | - qat-linux@intel.com |
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18 | | - |
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19 | | - BSD LICENSE |
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20 | | - Copyright(c) 2014 Intel Corporation. |
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21 | | - Redistribution and use in source and binary forms, with or without |
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22 | | - modification, are permitted provided that the following conditions |
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23 | | - are met: |
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24 | | - |
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25 | | - * Redistributions of source code must retain the above copyright |
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26 | | - notice, this list of conditions and the following disclaimer. |
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27 | | - * Redistributions in binary form must reproduce the above copyright |
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28 | | - notice, this list of conditions and the following disclaimer in |
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29 | | - the documentation and/or other materials provided with the |
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30 | | - distribution. |
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31 | | - * Neither the name of Intel Corporation nor the names of its |
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32 | | - contributors may be used to endorse or promote products derived |
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33 | | - from this software without specific prior written permission. |
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34 | | - |
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35 | | - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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36 | | - "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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37 | | - LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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38 | | - A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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39 | | - OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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40 | | - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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41 | | - LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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42 | | - DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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43 | | - THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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44 | | - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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45 | | - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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46 | | -*/ |
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47 | | - |
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| 1 | +// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) |
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| 2 | +/* Copyright(c) 2014 - 2020 Intel Corporation */ |
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48 | 3 | #include <linux/module.h> |
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49 | 4 | #include <crypto/internal/rsa.h> |
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50 | 5 | #include <crypto/internal/akcipher.h> |
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.. | .. |
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332 | 287 | } else { |
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333 | 288 | int shift = ctx->p_size - req->src_len; |
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334 | 289 | |
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335 | | - qat_req->src_align = dma_zalloc_coherent(dev, |
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336 | | - ctx->p_size, |
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337 | | - &qat_req->in.dh.in.b, |
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338 | | - GFP_KERNEL); |
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| 290 | + qat_req->src_align = dma_alloc_coherent(dev, |
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| 291 | + ctx->p_size, |
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| 292 | + &qat_req->in.dh.in.b, |
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| 293 | + GFP_KERNEL); |
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339 | 294 | if (unlikely(!qat_req->src_align)) |
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340 | 295 | return ret; |
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341 | 296 | |
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.. | .. |
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360 | 315 | goto unmap_src; |
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361 | 316 | |
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362 | 317 | } else { |
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363 | | - qat_req->dst_align = dma_zalloc_coherent(dev, ctx->p_size, |
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364 | | - &qat_req->out.dh.r, |
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365 | | - GFP_KERNEL); |
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| 318 | + qat_req->dst_align = dma_alloc_coherent(dev, ctx->p_size, |
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| 319 | + &qat_req->out.dh.r, |
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| 320 | + GFP_KERNEL); |
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366 | 321 | if (unlikely(!qat_req->dst_align)) |
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367 | 322 | goto unmap_src; |
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368 | 323 | } |
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.. | .. |
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384 | 339 | |
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385 | 340 | msg->pke_mid.src_data_addr = qat_req->phy_in; |
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386 | 341 | msg->pke_mid.dest_data_addr = qat_req->phy_out; |
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387 | | - msg->pke_mid.opaque = (uint64_t)(__force long)qat_req; |
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| 342 | + msg->pke_mid.opaque = (u64)(__force long)qat_req; |
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388 | 343 | msg->input_param_count = n_input_params; |
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389 | 344 | msg->output_param_count = 1; |
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390 | 345 | |
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391 | 346 | do { |
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392 | | - ret = adf_send_message(ctx->inst->pke_tx, (uint32_t *)msg); |
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| 347 | + ret = adf_send_message(ctx->inst->pke_tx, (u32 *)msg); |
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393 | 348 | } while (ret == -EBUSY && ctr++ < 100); |
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394 | 349 | |
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395 | 350 | if (!ret) |
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.. | .. |
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447 | 402 | return -EINVAL; |
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448 | 403 | |
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449 | 404 | ctx->p_size = params->p_size; |
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450 | | - ctx->p = dma_zalloc_coherent(dev, ctx->p_size, &ctx->dma_p, GFP_KERNEL); |
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| 405 | + ctx->p = dma_alloc_coherent(dev, ctx->p_size, &ctx->dma_p, GFP_KERNEL); |
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451 | 406 | if (!ctx->p) |
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452 | 407 | return -ENOMEM; |
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453 | 408 | memcpy(ctx->p, params->p, ctx->p_size); |
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.. | .. |
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458 | 413 | return 0; |
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459 | 414 | } |
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460 | 415 | |
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461 | | - ctx->g = dma_zalloc_coherent(dev, ctx->p_size, &ctx->dma_g, GFP_KERNEL); |
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| 416 | + ctx->g = dma_alloc_coherent(dev, ctx->p_size, &ctx->dma_g, GFP_KERNEL); |
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462 | 417 | if (!ctx->g) |
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463 | 418 | return -ENOMEM; |
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464 | 419 | memcpy(ctx->g + (ctx->p_size - params->g_size), params->g, |
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.. | .. |
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503 | 458 | if (ret < 0) |
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504 | 459 | goto err_clear_ctx; |
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505 | 460 | |
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506 | | - ctx->xa = dma_zalloc_coherent(dev, ctx->p_size, &ctx->dma_xa, |
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507 | | - GFP_KERNEL); |
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| 461 | + ctx->xa = dma_alloc_coherent(dev, ctx->p_size, &ctx->dma_xa, |
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| 462 | + GFP_KERNEL); |
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508 | 463 | if (!ctx->xa) { |
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509 | 464 | ret = -ENOMEM; |
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510 | 465 | goto err_clear_ctx; |
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.. | .. |
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737 | 692 | } else { |
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738 | 693 | int shift = ctx->key_sz - req->src_len; |
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739 | 694 | |
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740 | | - qat_req->src_align = dma_zalloc_coherent(dev, ctx->key_sz, |
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741 | | - &qat_req->in.rsa.enc.m, |
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742 | | - GFP_KERNEL); |
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| 695 | + qat_req->src_align = dma_alloc_coherent(dev, ctx->key_sz, |
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| 696 | + &qat_req->in.rsa.enc.m, |
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| 697 | + GFP_KERNEL); |
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743 | 698 | if (unlikely(!qat_req->src_align)) |
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744 | 699 | return ret; |
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745 | 700 | |
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.. | .. |
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756 | 711 | goto unmap_src; |
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757 | 712 | |
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758 | 713 | } else { |
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759 | | - qat_req->dst_align = dma_zalloc_coherent(dev, ctx->key_sz, |
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760 | | - &qat_req->out.rsa.enc.c, |
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761 | | - GFP_KERNEL); |
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| 714 | + qat_req->dst_align = dma_alloc_coherent(dev, ctx->key_sz, |
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| 715 | + &qat_req->out.rsa.enc.c, |
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| 716 | + GFP_KERNEL); |
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762 | 717 | if (unlikely(!qat_req->dst_align)) |
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763 | 718 | goto unmap_src; |
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764 | 719 | |
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.. | .. |
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779 | 734 | |
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780 | 735 | msg->pke_mid.src_data_addr = qat_req->phy_in; |
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781 | 736 | msg->pke_mid.dest_data_addr = qat_req->phy_out; |
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782 | | - msg->pke_mid.opaque = (uint64_t)(__force long)qat_req; |
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| 737 | + msg->pke_mid.opaque = (u64)(__force long)qat_req; |
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783 | 738 | msg->input_param_count = 3; |
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784 | 739 | msg->output_param_count = 1; |
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785 | 740 | do { |
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786 | | - ret = adf_send_message(ctx->inst->pke_tx, (uint32_t *)msg); |
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| 741 | + ret = adf_send_message(ctx->inst->pke_tx, (u32 *)msg); |
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787 | 742 | } while (ret == -EBUSY && ctr++ < 100); |
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788 | 743 | |
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789 | 744 | if (!ret) |
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.. | .. |
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881 | 836 | } else { |
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882 | 837 | int shift = ctx->key_sz - req->src_len; |
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883 | 838 | |
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884 | | - qat_req->src_align = dma_zalloc_coherent(dev, ctx->key_sz, |
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885 | | - &qat_req->in.rsa.dec.c, |
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886 | | - GFP_KERNEL); |
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| 839 | + qat_req->src_align = dma_alloc_coherent(dev, ctx->key_sz, |
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| 840 | + &qat_req->in.rsa.dec.c, |
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| 841 | + GFP_KERNEL); |
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887 | 842 | if (unlikely(!qat_req->src_align)) |
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888 | 843 | return ret; |
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889 | 844 | |
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.. | .. |
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900 | 855 | goto unmap_src; |
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901 | 856 | |
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902 | 857 | } else { |
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903 | | - qat_req->dst_align = dma_zalloc_coherent(dev, ctx->key_sz, |
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904 | | - &qat_req->out.rsa.dec.m, |
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905 | | - GFP_KERNEL); |
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| 858 | + qat_req->dst_align = dma_alloc_coherent(dev, ctx->key_sz, |
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| 859 | + &qat_req->out.rsa.dec.m, |
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| 860 | + GFP_KERNEL); |
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906 | 861 | if (unlikely(!qat_req->dst_align)) |
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907 | 862 | goto unmap_src; |
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908 | 863 | |
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.. | .. |
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927 | 882 | |
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928 | 883 | msg->pke_mid.src_data_addr = qat_req->phy_in; |
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929 | 884 | msg->pke_mid.dest_data_addr = qat_req->phy_out; |
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930 | | - msg->pke_mid.opaque = (uint64_t)(__force long)qat_req; |
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| 885 | + msg->pke_mid.opaque = (u64)(__force long)qat_req; |
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931 | 886 | if (ctx->crt_mode) |
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932 | 887 | msg->input_param_count = 6; |
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933 | 888 | else |
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.. | .. |
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935 | 890 | |
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936 | 891 | msg->output_param_count = 1; |
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937 | 892 | do { |
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938 | | - ret = adf_send_message(ctx->inst->pke_tx, (uint32_t *)msg); |
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| 893 | + ret = adf_send_message(ctx->inst->pke_tx, (u32 *)msg); |
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939 | 894 | } while (ret == -EBUSY && ctr++ < 100); |
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940 | 895 | |
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941 | 896 | if (!ret) |
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.. | .. |
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989 | 944 | goto err; |
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990 | 945 | |
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991 | 946 | ret = -ENOMEM; |
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992 | | - ctx->n = dma_zalloc_coherent(dev, ctx->key_sz, &ctx->dma_n, GFP_KERNEL); |
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| 947 | + ctx->n = dma_alloc_coherent(dev, ctx->key_sz, &ctx->dma_n, GFP_KERNEL); |
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993 | 948 | if (!ctx->n) |
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994 | 949 | goto err; |
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995 | 950 | |
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.. | .. |
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1018 | 973 | return -EINVAL; |
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1019 | 974 | } |
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1020 | 975 | |
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1021 | | - ctx->e = dma_zalloc_coherent(dev, ctx->key_sz, &ctx->dma_e, GFP_KERNEL); |
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| 976 | + ctx->e = dma_alloc_coherent(dev, ctx->key_sz, &ctx->dma_e, GFP_KERNEL); |
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1022 | 977 | if (!ctx->e) |
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1023 | 978 | return -ENOMEM; |
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1024 | 979 | |
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.. | .. |
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1044 | 999 | goto err; |
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1045 | 1000 | |
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1046 | 1001 | ret = -ENOMEM; |
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1047 | | - ctx->d = dma_zalloc_coherent(dev, ctx->key_sz, &ctx->dma_d, GFP_KERNEL); |
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| 1002 | + ctx->d = dma_alloc_coherent(dev, ctx->key_sz, &ctx->dma_d, GFP_KERNEL); |
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1048 | 1003 | if (!ctx->d) |
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1049 | 1004 | goto err; |
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1050 | 1005 | |
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.. | .. |
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1077 | 1032 | qat_rsa_drop_leading_zeros(&ptr, &len); |
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1078 | 1033 | if (!len) |
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1079 | 1034 | goto err; |
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1080 | | - ctx->p = dma_zalloc_coherent(dev, half_key_sz, &ctx->dma_p, GFP_KERNEL); |
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| 1035 | + ctx->p = dma_alloc_coherent(dev, half_key_sz, &ctx->dma_p, GFP_KERNEL); |
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1081 | 1036 | if (!ctx->p) |
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1082 | 1037 | goto err; |
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1083 | 1038 | memcpy(ctx->p + (half_key_sz - len), ptr, len); |
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.. | .. |
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1088 | 1043 | qat_rsa_drop_leading_zeros(&ptr, &len); |
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1089 | 1044 | if (!len) |
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1090 | 1045 | goto free_p; |
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1091 | | - ctx->q = dma_zalloc_coherent(dev, half_key_sz, &ctx->dma_q, GFP_KERNEL); |
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| 1046 | + ctx->q = dma_alloc_coherent(dev, half_key_sz, &ctx->dma_q, GFP_KERNEL); |
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1092 | 1047 | if (!ctx->q) |
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1093 | 1048 | goto free_p; |
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1094 | 1049 | memcpy(ctx->q + (half_key_sz - len), ptr, len); |
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.. | .. |
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1099 | 1054 | qat_rsa_drop_leading_zeros(&ptr, &len); |
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1100 | 1055 | if (!len) |
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1101 | 1056 | goto free_q; |
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1102 | | - ctx->dp = dma_zalloc_coherent(dev, half_key_sz, &ctx->dma_dp, |
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1103 | | - GFP_KERNEL); |
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| 1057 | + ctx->dp = dma_alloc_coherent(dev, half_key_sz, &ctx->dma_dp, |
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| 1058 | + GFP_KERNEL); |
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1104 | 1059 | if (!ctx->dp) |
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1105 | 1060 | goto free_q; |
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1106 | 1061 | memcpy(ctx->dp + (half_key_sz - len), ptr, len); |
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.. | .. |
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1111 | 1066 | qat_rsa_drop_leading_zeros(&ptr, &len); |
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1112 | 1067 | if (!len) |
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1113 | 1068 | goto free_dp; |
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1114 | | - ctx->dq = dma_zalloc_coherent(dev, half_key_sz, &ctx->dma_dq, |
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1115 | | - GFP_KERNEL); |
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| 1069 | + ctx->dq = dma_alloc_coherent(dev, half_key_sz, &ctx->dma_dq, |
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| 1070 | + GFP_KERNEL); |
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1116 | 1071 | if (!ctx->dq) |
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1117 | 1072 | goto free_dp; |
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1118 | 1073 | memcpy(ctx->dq + (half_key_sz - len), ptr, len); |
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.. | .. |
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1123 | 1078 | qat_rsa_drop_leading_zeros(&ptr, &len); |
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1124 | 1079 | if (!len) |
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1125 | 1080 | goto free_dq; |
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1126 | | - ctx->qinv = dma_zalloc_coherent(dev, half_key_sz, &ctx->dma_qinv, |
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1127 | | - GFP_KERNEL); |
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| 1081 | + ctx->qinv = dma_alloc_coherent(dev, half_key_sz, &ctx->dma_qinv, |
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| 1082 | + GFP_KERNEL); |
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1128 | 1083 | if (!ctx->qinv) |
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1129 | 1084 | goto free_dq; |
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1130 | 1085 | memcpy(ctx->qinv + (half_key_sz - len), ptr, len); |
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.. | .. |
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1300 | 1255 | static struct akcipher_alg rsa = { |
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1301 | 1256 | .encrypt = qat_rsa_enc, |
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1302 | 1257 | .decrypt = qat_rsa_dec, |
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1303 | | - .sign = qat_rsa_dec, |
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1304 | | - .verify = qat_rsa_enc, |
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1305 | 1258 | .set_pub_key = qat_rsa_setpubkey, |
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1306 | 1259 | .set_priv_key = qat_rsa_setprivkey, |
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1307 | 1260 | .max_size = qat_rsa_max_size, |
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