hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/drivers/clk/rockchip/regmap/clk-regmap-fractional-divider.c
....@@ -47,6 +47,16 @@
4747 struct clk_hw *p_parent;
4848 unsigned long scale;
4949
50
+ if (!rate) {
51
+ *m = 0;
52
+ *n = 1;
53
+
54
+ dev_dbg(fd->dev, "%s rate:(%ld) maybe invalid frequency setting!\n",
55
+ clk_hw_get_name(hw), rate);
56
+
57
+ return;
58
+ }
59
+
5060 p_rate = clk_hw_get_rate(clk_hw_get_parent(hw));
5161 if ((rate * 20 > p_rate) && (p_rate % rate != 0)) {
5262 p_parent = clk_hw_get_parent(clk_hw_get_parent(hw));