add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/clk/rockchip/clk-half-divider.c
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@@ -3,8 +3,9 @@
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  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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  */
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-#include <linux/slab.h>
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 #include <linux/clk-provider.h>
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+#include <linux/io.h>
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+#include <linux/slab.h>
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 #include "clk.h"
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 #define div_mask(width)	((1 << (width)) - 1)
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@@ -24,7 +25,7 @@
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 	struct clk_divider *divider = to_clk_divider(hw);
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 	unsigned int val;
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-	val = clk_readl(divider->reg) >> divider->shift;
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+	val = readl(divider->reg) >> divider->shift;
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 	val &= div_mask(divider->width);
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 	val = val * 2 + 3;
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@@ -116,11 +117,11 @@
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 	if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
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 		val = div_mask(divider->width) << (divider->shift + 16);
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 	} else {
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-		val = clk_readl(divider->reg);
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+		val = readl(divider->reg);
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 		val &= ~(div_mask(divider->width) << divider->shift);
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 	}
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 	val |= value << divider->shift;
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-	clk_writel(val, divider->reg);
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+	writel(val, divider->reg);
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 	if (divider->lock)
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 		spin_unlock_irqrestore(divider->lock, flags);
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@@ -130,12 +131,11 @@
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 	return 0;
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 }
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-const struct clk_ops clk_half_divider_ops = {
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+static const struct clk_ops clk_half_divider_ops = {
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 	.recalc_rate = clk_half_divider_recalc_rate,
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 	.round_rate = clk_half_divider_round_rate,
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 	.set_rate = clk_half_divider_set_rate,
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 };
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-EXPORT_SYMBOL_GPL(clk_half_divider_ops);
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 /**
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  * Register a clock branch.
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@@ -158,7 +158,7 @@
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 					  u8 gate_flags, unsigned long flags,
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 					  spinlock_t *lock)
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 {
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-	struct clk *clk = ERR_PTR(-ENOMEM);
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+	struct clk_hw *hw = ERR_PTR(-ENOMEM);
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 	struct clk_mux *mux = NULL;
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 	struct clk_gate *gate = NULL;
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 	struct clk_divider *div = NULL;
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@@ -207,16 +207,18 @@
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 		div_ops = &clk_half_divider_ops;
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 	}
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-	clk = clk_register_composite(NULL, name, parent_names, num_parents,
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-				     mux ? &mux->hw : NULL, mux_ops,
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-				     div ? &div->hw : NULL, div_ops,
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-				     gate ? &gate->hw : NULL, gate_ops,
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-				     flags);
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+	hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
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+				       mux ? &mux->hw : NULL, mux_ops,
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+				       div ? &div->hw : NULL, div_ops,
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+				       gate ? &gate->hw : NULL, gate_ops,
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+				       flags);
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+	if (IS_ERR(hw))
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+		goto err_div;
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-	return clk;
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+	return hw->clk;
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 err_div:
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 	kfree(gate);
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 err_gate:
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 	kfree(mux);
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-	return ERR_PTR(-ENOMEM);
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+	return ERR_CAST(hw);
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 }