.. | .. |
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9 | 9 | Say y here to enable common clock controller for Rockchip platforms. |
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10 | 10 | |
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11 | 11 | if COMMON_CLK_ROCKCHIP |
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| 12 | +config CLK_PX30 |
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| 13 | + tristate "Rockchip PX30 clock controller support" |
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| 14 | + depends on CPU_PX30 || COMPILE_TEST |
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| 15 | + default y |
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| 16 | + help |
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| 17 | + Build the driver for PX30 Clock Driver. |
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| 18 | + |
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| 19 | +config CLK_RV1106 |
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| 20 | + tristate "Rockchip RV1106 clock controller support" |
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| 21 | + depends on CPU_RV1106 || COMPILE_TEST |
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| 22 | + default y |
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| 23 | + help |
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| 24 | + Build the driver for RV1106 Clock Driver. |
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| 25 | + |
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| 26 | +config CLK_RV1108 |
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| 27 | + tristate "Rockchip RV1108 clock controller support" |
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| 28 | + depends on CPU_RV1108 || COMPILE_TEST |
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| 29 | + default y |
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| 30 | + help |
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| 31 | + Build the driver for RV1108 Clock Driver. |
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| 32 | + |
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| 33 | +config CLK_RV1126 |
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| 34 | + tristate "Rockchip RV1126 clock controller support" |
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| 35 | + depends on CPU_RV1126 || COMPILE_TEST |
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| 36 | + default y |
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| 37 | + help |
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| 38 | + Build the driver for RV1126 Clock Driver. |
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| 39 | + |
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| 40 | +config CLK_RK1808 |
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| 41 | + tristate "Rockchip RK1808 clock controller support" |
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| 42 | + depends on CPU_RK1808 || COMPILE_TEST |
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| 43 | + default y |
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| 44 | + help |
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| 45 | + Build the driver for RK1808 Clock Driver. |
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| 46 | + |
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| 47 | +config CLK_RK3036 |
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| 48 | + tristate "Rockchip RK3036 clock controller support" |
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| 49 | + depends on CPU_RK3036 || COMPILE_TEST |
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| 50 | + default y |
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| 51 | + help |
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| 52 | + Build the driver for RK3036 Clock Driver. |
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| 53 | + |
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| 54 | +config CLK_RK312X |
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| 55 | + tristate "Rockchip RK312x clock controller support" |
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| 56 | + depends on CPU_RK312X || COMPILE_TEST |
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| 57 | + default y |
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| 58 | + help |
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| 59 | + Build the driver for RK312x Clock Driver. |
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| 60 | + |
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| 61 | +config CLK_RK3188 |
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| 62 | + tristate "Rockchip RK3188 clock controller support" |
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| 63 | + depends on CPU_RK3188 || COMPILE_TEST |
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| 64 | + default y |
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| 65 | + help |
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| 66 | + Build the driver for RK3188 Clock Driver. |
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| 67 | + |
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| 68 | +config CLK_RK322X |
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| 69 | + tristate "Rockchip RK322x clock controller support" |
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| 70 | + depends on CPU_RK322X || COMPILE_TEST |
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| 71 | + default y |
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| 72 | + help |
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| 73 | + Build the driver for RK322x Clock Driver. |
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| 74 | + |
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| 75 | +config CLK_RK3288 |
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| 76 | + tristate "Rockchip RK3288 clock controller support" |
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| 77 | + depends on CPU_RK3288 || COMPILE_TEST |
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| 78 | + default y |
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| 79 | + help |
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| 80 | + Build the driver for RK3288 Clock Driver. |
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| 81 | + |
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| 82 | +config CLK_RK3308 |
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| 83 | + tristate "Rockchip RK3308 clock controller support" |
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| 84 | + depends on CPU_RK3308 || COMPILE_TEST |
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| 85 | + default y |
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| 86 | + help |
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| 87 | + Build the driver for RK3308 Clock Driver. |
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| 88 | + |
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| 89 | +config CLK_RK3328 |
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| 90 | + tristate "Rockchip RK3328 clock controller support" |
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| 91 | + depends on CPU_RK3328 || COMPILE_TEST |
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| 92 | + default y |
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| 93 | + help |
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| 94 | + Build the driver for RK3328 Clock Driver. |
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| 95 | + |
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| 96 | +config CLK_RK3368 |
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| 97 | + tristate "Rockchip RK3368 clock controller support" |
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| 98 | + depends on CPU_RK3368 || COMPILE_TEST |
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| 99 | + default y |
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| 100 | + help |
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| 101 | + Build the driver for RK3368 Clock Driver. |
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| 102 | + |
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| 103 | +config CLK_RK3399 |
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| 104 | + tristate "Rockchip RK3399 clock controller support" |
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| 105 | + depends on CPU_RK3399 || COMPILE_TEST |
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| 106 | + default y |
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| 107 | + help |
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| 108 | + Build the driver for RK3399 Clock Driver. |
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| 109 | + |
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| 110 | +config CLK_RK3528 |
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| 111 | + tristate "Rockchip RK3528 clock controller support" |
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| 112 | + depends on CPU_RK3528 || COMPILE_TEST |
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| 113 | + default y |
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| 114 | + help |
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| 115 | + Build the driver for RK3528 Clock Driver. |
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| 116 | + |
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| 117 | +config CLK_RK3562 |
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| 118 | + tristate "Rockchip RK3562 clock controller support" |
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| 119 | + depends on CPU_RK3562 || COMPILE_TEST |
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| 120 | + default y |
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| 121 | + help |
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| 122 | + Build the driver for RK3562 Clock Driver. |
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| 123 | + |
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| 124 | +config CLK_RK3568 |
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| 125 | + tristate "Rockchip RK3568 clock controller support" |
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| 126 | + depends on CPU_RK3568 || COMPILE_TEST |
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| 127 | + default y |
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| 128 | + help |
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| 129 | + Build the driver for RK3568 Clock Driver. |
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| 130 | + |
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| 131 | +config CLK_RK3588 |
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| 132 | + tristate "Rockchip RK3588 clock controller support" |
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| 133 | + depends on CPU_RK3588 || COMPILE_TEST |
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| 134 | + default y |
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| 135 | + help |
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| 136 | + Build the driver for RK3588 Clock Driver. |
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| 137 | + |
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12 | 138 | config ROCKCHIP_CLK_COMPENSATION |
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13 | 139 | bool "Rockchip Clk Compensation" |
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14 | 140 | help |
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15 | 141 | Say y here to enable clk compensation(+/- 1000 ppm). |
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| 142 | + |
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| 143 | +config ROCKCHIP_CLK_LINK |
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| 144 | + tristate "Rockchip clock link support" |
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| 145 | + default CLK_RK3562 || CLK_RK3588 |
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| 146 | + help |
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| 147 | + Say y here to enable clock link for Rockchip. |
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16 | 148 | |
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17 | 149 | config ROCKCHIP_CLK_BOOST |
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18 | 150 | bool "Rockchip Clk Boost" |
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.. | .. |
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22 | 154 | |
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23 | 155 | config ROCKCHIP_CLK_INV |
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24 | 156 | bool "Rockchip Clk Inverter" |
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25 | | - default y if !CPU_RV1126 |
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| 157 | + default y if !CPU_RV1126 && !CPU_RV1106 |
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26 | 158 | help |
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27 | 159 | Say y here to enable clk Inverter. |
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28 | 160 | |
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| 161 | +config ROCKCHIP_CLK_OUT |
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| 162 | + tristate "Rockchip Clk Out / Input Switch" |
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| 163 | + default y if !ROCKCHIP_MINI_KERNEL |
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| 164 | + help |
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| 165 | + Say y here to enable clk out / input switch. |
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| 166 | + |
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29 | 167 | config ROCKCHIP_CLK_PVTM |
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30 | 168 | bool "Rockchip Clk Pvtm" |
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31 | | - default y if !CPU_RV1126 |
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| 169 | + default y if !CPU_RV1126 && !CPU_RV1106 |
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32 | 170 | help |
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33 | 171 | Say y here to enable clk pvtm. |
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34 | 172 | |
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35 | | -config ROCKCHIP_DCLK_DIV |
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36 | | - bool "Rockchip Dclk Divider" |
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37 | | - default y if !CPU_RV1126 |
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38 | | - help |
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39 | | - Say y here to enable dclk divider. |
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40 | | - |
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41 | | -config ROCKCHIP_DDRCLK_SCPI |
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42 | | - bool "Rockchip DDR Clk SCPI" |
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43 | | - default y if RK3368_SCPI_PROTOCOL |
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44 | | - help |
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45 | | - Say y here to enable ddr clk scpi. |
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| 173 | +config ROCKCHIP_DDRCLK |
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| 174 | + bool |
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46 | 175 | |
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47 | 176 | config ROCKCHIP_DDRCLK_SIP |
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48 | 177 | bool "Rockchip DDR Clk SIP" |
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49 | 178 | default y if CPU_RK3399 |
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| 179 | + select ROCKCHIP_DDRCLK |
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50 | 180 | help |
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51 | 181 | Say y here to enable ddr clk sip. |
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| 182 | + |
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| 183 | +config ROCKCHIP_DDRCLK_SIP_V2 |
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| 184 | + bool "Rockchip DDR Clk SIP V2" |
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| 185 | + default y if CPU_PX30 || CPU_RK1808 || CPU_RK312X || CPU_RK322X || \ |
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| 186 | + CPU_RK3288 || CPU_RK3308 || CPU_RK3328 || CPU_RV1126 |
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| 187 | + select ROCKCHIP_DDRCLK |
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| 188 | + help |
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| 189 | + Say y here to enable ddr clk sip v2. |
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52 | 190 | |
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53 | 191 | config ROCKCHIP_PLL_RK3066 |
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54 | 192 | bool "Rockchip PLL Type RK3066" |
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.. | .. |
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59 | 197 | |
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60 | 198 | config ROCKCHIP_PLL_RK3399 |
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61 | 199 | bool "Rockchip PLL Type RK3399" |
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62 | | - default y if CPU_RK3399 || CPU_RV110X |
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| 200 | + default y if CPU_RK3399 || CPU_RV1108 |
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63 | 201 | help |
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64 | 202 | Say y here to enable pll type is rk3399. |
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65 | | -endif |
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| 203 | + |
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| 204 | +config ROCKCHIP_PLL_RK3588 |
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| 205 | + bool "Rockchip PLL Type RK3588" |
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| 206 | + default y if CPU_RK3588 |
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| 207 | + help |
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| 208 | + Say y here to enable pll type is rk3588. |
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66 | 209 | |
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67 | 210 | source "drivers/clk/rockchip/regmap/Kconfig" |
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| 211 | + |
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| 212 | +endif |
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