add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/drivers/char/hw_random/atmel-rng.c
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@@ -14,13 +14,21 @@
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 #include <linux/clk.h>
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 #include <linux/io.h>
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 #include <linux/hw_random.h>
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+#include <linux/of_device.h>
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 #include <linux/platform_device.h>
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19
 
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 #define TRNG_CR		0x00
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+#define TRNG_MR		0x04
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 #define TRNG_ISR	0x1c
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 #define TRNG_ODATA	0x50
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24
 
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 #define TRNG_KEY	0x524e4700 /* RNG */
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+
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+#define TRNG_HALFR	BIT(0) /* generate RN every 168 cycles */
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+
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+struct atmel_trng_data {
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+	bool has_half_rate;
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+};
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 struct atmel_trng {
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 	struct clk *clk;
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@@ -62,21 +70,31 @@
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 static int atmel_trng_probe(struct platform_device *pdev)
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 {
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 	struct atmel_trng *trng;
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-	struct resource *res;
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+	const struct atmel_trng_data *data;
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 	int ret;
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75
 
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 	trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL);
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 	if (!trng)
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 		return -ENOMEM;
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79
 
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-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	trng->base = devm_ioremap_resource(&pdev->dev, res);
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+	trng->base = devm_platform_ioremap_resource(pdev, 0);
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 	if (IS_ERR(trng->base))
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 		return PTR_ERR(trng->base);
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83
 
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 	trng->clk = devm_clk_get(&pdev->dev, NULL);
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 	if (IS_ERR(trng->clk))
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 		return PTR_ERR(trng->clk);
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+	data = of_device_get_match_data(&pdev->dev);
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+	if (!data)
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+		return -ENODEV;
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+
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+	if (data->has_half_rate) {
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+		unsigned long rate = clk_get_rate(trng->clk);
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+
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+		/* if peripheral clk is above 100MHz, set HALFR */
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+		if (rate > 100000000)
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+			writel(TRNG_HALFR, trng->base + TRNG_MR);
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+	}
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 	ret = clk_prepare_enable(trng->clk);
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 	if (ret)
..
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@@ -86,7 +104,7 @@
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 	trng->rng.name = pdev->name;
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 	trng->rng.read = atmel_trng_read;
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-	ret = hwrng_register(&trng->rng);
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+	ret = devm_hwrng_register(&pdev->dev, &trng->rng);
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 	if (ret)
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 		goto err_register;
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..
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@@ -96,6 +114,7 @@
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 err_register:
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 	clk_disable_unprepare(trng->clk);
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+	atmel_trng_disable(trng);
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 	return ret;
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 }
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..
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@@ -103,7 +122,6 @@
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 {
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 	struct atmel_trng *trng = platform_get_drvdata(pdev);
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-	hwrng_unregister(&trng->rng);
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 	atmel_trng_disable(trng);
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 	clk_disable_unprepare(trng->clk);
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@@ -142,9 +160,24 @@
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 };
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 #endif /* CONFIG_PM */
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162
 
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+static const struct atmel_trng_data at91sam9g45_config = {
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+	.has_half_rate = false,
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+};
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+
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+static const struct atmel_trng_data sam9x60_config = {
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+	.has_half_rate = true,
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+};
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+
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 static const struct of_device_id atmel_trng_dt_ids[] = {
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-	{ .compatible = "atmel,at91sam9g45-trng" },
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-	{ /* sentinel */ }
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+	{
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+		.compatible = "atmel,at91sam9g45-trng",
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+		.data = &at91sam9g45_config,
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+	}, {
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+		.compatible = "microchip,sam9x60-trng",
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+		.data = &sam9x60_config,
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+	}, {
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+		/* sentinel */
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+	}
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 };
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 MODULE_DEVICE_TABLE(of, atmel_trng_dt_ids);
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