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19 | 19 | unsigned int cs_count; |
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20 | 20 | unsigned int cs_regs_count; |
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21 | 21 | unsigned int cs_stride; |
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| 22 | + unsigned int wcr_offset; |
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| 23 | + unsigned int wcr_bcm; |
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22 | 24 | }; |
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23 | 25 | |
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24 | 26 | static const struct imx_weim_devtype imx1_weim_devtype = { |
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37 | 39 | .cs_count = 4, |
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38 | 40 | .cs_regs_count = 6, |
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39 | 41 | .cs_stride = 0x18, |
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| 42 | + .wcr_offset = 0x90, |
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| 43 | + .wcr_bcm = BIT(0), |
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40 | 44 | }; |
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41 | 45 | |
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42 | 46 | static const struct imx_weim_devtype imx51_weim_devtype = { |
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46 | 50 | }; |
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47 | 51 | |
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48 | 52 | #define MAX_CS_REGS_COUNT 6 |
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| 53 | +#define MAX_CS_COUNT 6 |
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| 54 | +#define OF_REG_SIZE 3 |
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| 55 | + |
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| 56 | +struct cs_timing { |
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| 57 | + bool is_applied; |
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| 58 | + u32 regs[MAX_CS_REGS_COUNT]; |
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| 59 | +}; |
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| 60 | + |
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| 61 | +struct cs_timing_state { |
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| 62 | + struct cs_timing cs[MAX_CS_COUNT]; |
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| 63 | +}; |
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49 | 64 | |
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50 | 65 | static const struct of_device_id weim_id_table[] = { |
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51 | 66 | /* i.MX1/21 */ |
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61 | 76 | }; |
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62 | 77 | MODULE_DEVICE_TABLE(of, weim_id_table); |
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63 | 78 | |
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64 | | -static int __init imx_weim_gpr_setup(struct platform_device *pdev) |
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| 79 | +static int imx_weim_gpr_setup(struct platform_device *pdev) |
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65 | 80 | { |
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66 | 81 | struct device_node *np = pdev->dev.of_node; |
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67 | 82 | struct property *prop; |
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111 | 126 | } |
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112 | 127 | |
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113 | 128 | /* Parse and set the timing for this device. */ |
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114 | | -static int __init weim_timing_setup(struct device_node *np, void __iomem *base, |
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115 | | - const struct imx_weim_devtype *devtype) |
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| 129 | +static int weim_timing_setup(struct device *dev, |
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| 130 | + struct device_node *np, void __iomem *base, |
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| 131 | + const struct imx_weim_devtype *devtype, |
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| 132 | + struct cs_timing_state *ts) |
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116 | 133 | { |
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117 | 134 | u32 cs_idx, value[MAX_CS_REGS_COUNT]; |
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118 | 135 | int i, ret; |
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| 136 | + int reg_idx, num_regs; |
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| 137 | + struct cs_timing *cst; |
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119 | 138 | |
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120 | 139 | if (WARN_ON(devtype->cs_regs_count > MAX_CS_REGS_COUNT)) |
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121 | 140 | return -EINVAL; |
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122 | | - |
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123 | | - /* get the CS index from this child node's "reg" property. */ |
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124 | | - ret = of_property_read_u32(np, "reg", &cs_idx); |
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125 | | - if (ret) |
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126 | | - return ret; |
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127 | | - |
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128 | | - if (cs_idx >= devtype->cs_count) |
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| 141 | + if (WARN_ON(devtype->cs_count > MAX_CS_COUNT)) |
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129 | 142 | return -EINVAL; |
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130 | 143 | |
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131 | 144 | ret = of_property_read_u32_array(np, "fsl,weim-cs-timing", |
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133 | 146 | if (ret) |
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134 | 147 | return ret; |
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135 | 148 | |
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136 | | - /* set the timing for WEIM */ |
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137 | | - for (i = 0; i < devtype->cs_regs_count; i++) |
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138 | | - writel(value[i], base + cs_idx * devtype->cs_stride + i * 4); |
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| 149 | + /* |
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| 150 | + * the child node's "reg" property may contain multiple address ranges, |
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| 151 | + * extract the chip select for each. |
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| 152 | + */ |
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| 153 | + num_regs = of_property_count_elems_of_size(np, "reg", OF_REG_SIZE); |
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| 154 | + if (num_regs < 0) |
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| 155 | + return num_regs; |
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| 156 | + if (!num_regs) |
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| 157 | + return -EINVAL; |
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| 158 | + for (reg_idx = 0; reg_idx < num_regs; reg_idx++) { |
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| 159 | + /* get the CS index from this child node's "reg" property. */ |
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| 160 | + ret = of_property_read_u32_index(np, "reg", |
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| 161 | + reg_idx * OF_REG_SIZE, &cs_idx); |
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| 162 | + if (ret) |
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| 163 | + break; |
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| 164 | + |
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| 165 | + if (cs_idx >= devtype->cs_count) |
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| 166 | + return -EINVAL; |
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| 167 | + |
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| 168 | + /* prevent re-configuring a CS that's already been configured */ |
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| 169 | + cst = &ts->cs[cs_idx]; |
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| 170 | + if (cst->is_applied && memcmp(value, cst->regs, |
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| 171 | + devtype->cs_regs_count * sizeof(u32))) { |
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| 172 | + dev_err(dev, "fsl,weim-cs-timing conflict on %pOF", np); |
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| 173 | + return -EINVAL; |
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| 174 | + } |
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| 175 | + |
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| 176 | + /* set the timing for WEIM */ |
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| 177 | + for (i = 0; i < devtype->cs_regs_count; i++) |
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| 178 | + writel(value[i], |
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| 179 | + base + cs_idx * devtype->cs_stride + i * 4); |
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| 180 | + if (!cst->is_applied) { |
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| 181 | + cst->is_applied = true; |
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| 182 | + memcpy(cst->regs, value, |
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| 183 | + devtype->cs_regs_count * sizeof(u32)); |
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| 184 | + } |
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| 185 | + } |
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139 | 186 | |
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140 | 187 | return 0; |
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141 | 188 | } |
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142 | 189 | |
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143 | | -static int __init weim_parse_dt(struct platform_device *pdev, |
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144 | | - void __iomem *base) |
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| 190 | +static int weim_parse_dt(struct platform_device *pdev, void __iomem *base) |
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145 | 191 | { |
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146 | 192 | const struct of_device_id *of_id = of_match_device(weim_id_table, |
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147 | 193 | &pdev->dev); |
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148 | 194 | const struct imx_weim_devtype *devtype = of_id->data; |
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| 195 | + int ret = 0, have_child = 0; |
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149 | 196 | struct device_node *child; |
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150 | | - int ret, have_child = 0; |
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| 197 | + struct cs_timing_state ts = {}; |
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| 198 | + u32 reg; |
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151 | 199 | |
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152 | 200 | if (devtype == &imx50_weim_devtype) { |
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153 | 201 | ret = imx_weim_gpr_setup(pdev); |
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155 | 203 | return ret; |
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156 | 204 | } |
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157 | 205 | |
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158 | | - for_each_available_child_of_node(pdev->dev.of_node, child) { |
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159 | | - if (!child->name) |
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160 | | - continue; |
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| 206 | + if (of_property_read_bool(pdev->dev.of_node, "fsl,burst-clk-enable")) { |
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| 207 | + if (devtype->wcr_bcm) { |
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| 208 | + reg = readl(base + devtype->wcr_offset); |
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| 209 | + writel(reg | devtype->wcr_bcm, |
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| 210 | + base + devtype->wcr_offset); |
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| 211 | + } else { |
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| 212 | + dev_err(&pdev->dev, "burst clk mode not supported.\n"); |
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| 213 | + return -EINVAL; |
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| 214 | + } |
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| 215 | + } |
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161 | 216 | |
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162 | | - ret = weim_timing_setup(child, base, devtype); |
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| 217 | + for_each_available_child_of_node(pdev->dev.of_node, child) { |
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| 218 | + ret = weim_timing_setup(&pdev->dev, child, base, devtype, &ts); |
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163 | 219 | if (ret) |
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164 | 220 | dev_warn(&pdev->dev, "%pOF set timing failed.\n", |
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165 | 221 | child); |
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176 | 232 | return ret; |
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177 | 233 | } |
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178 | 234 | |
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179 | | -static int __init weim_probe(struct platform_device *pdev) |
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| 235 | +static int weim_probe(struct platform_device *pdev) |
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180 | 236 | { |
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181 | 237 | struct resource *res; |
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182 | 238 | struct clk *clk; |
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.. | .. |
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213 | 269 | .name = "imx-weim", |
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214 | 270 | .of_match_table = weim_id_table, |
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215 | 271 | }, |
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| 272 | + .probe = weim_probe, |
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216 | 273 | }; |
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217 | | -module_platform_driver_probe(weim_driver, weim_probe); |
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| 274 | +module_platform_driver(weim_driver); |
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218 | 275 | |
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219 | 276 | MODULE_AUTHOR("Freescale Semiconductor Inc."); |
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220 | 277 | MODULE_DESCRIPTION("i.MX EIM Controller Driver"); |
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