.. | .. |
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23 | 23 | |
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24 | 24 | config KVM_GUEST |
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25 | 25 | bool "KVM Guest support" |
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26 | | - default n |
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27 | 26 | select EPAPR_PARAVIRT |
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28 | | - ---help--- |
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| 27 | + help |
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29 | 28 | This option enables various optimizations for running under the KVM |
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30 | 29 | hypervisor. Overhead for the kernel when not running inside KVM should |
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31 | 30 | be minimal. |
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34 | 33 | |
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35 | 34 | config EPAPR_PARAVIRT |
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36 | 35 | bool "ePAPR para-virtualization support" |
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37 | | - default n |
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38 | 36 | help |
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39 | 37 | Enables ePAPR para-virtualization support for guests. |
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40 | 38 | |
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42 | 40 | |
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43 | 41 | config PPC_NATIVE |
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44 | 42 | bool |
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45 | | - depends on 6xx || PPC64 |
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| 43 | + depends on PPC_BOOK3S_32 || PPC64 |
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46 | 44 | help |
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47 | 45 | Support for running natively on the hardware, i.e. without |
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48 | 46 | a hypervisor. This option is not user-selectable but should |
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50 | 48 | |
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51 | 49 | config PPC_OF_BOOT_TRAMPOLINE |
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52 | 50 | bool "Support booting from Open Firmware or yaboot" |
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53 | | - depends on 6xx || PPC64 |
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| 51 | + depends on PPC_BOOK3S_32 || PPC64 |
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54 | 52 | default y |
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55 | 53 | help |
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56 | 54 | Support from booting from Open Firmware or yaboot using an |
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74 | 72 | config UDBG_RTAS_CONSOLE |
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75 | 73 | bool "RTAS based debug console" |
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76 | 74 | depends on PPC_RTAS |
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77 | | - default n |
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78 | 75 | |
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79 | 76 | config PPC_SMP_MUXED_IPI |
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80 | 77 | bool |
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86 | 83 | |
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87 | 84 | config IPIC |
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88 | 85 | bool |
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89 | | - default n |
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90 | 86 | |
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91 | 87 | config MPIC |
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92 | 88 | bool |
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93 | | - default n |
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94 | 89 | |
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95 | 90 | config MPIC_TIMER |
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96 | 91 | bool "MPIC Global Timer" |
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97 | 92 | depends on MPIC && FSL_SOC |
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98 | | - default n |
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99 | 93 | help |
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100 | 94 | The MPIC global timer is a hardware timer inside the |
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101 | 95 | Freescale PIC complying with OpenPIC standard. When the |
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107 | 101 | config FSL_MPIC_TIMER_WAKEUP |
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108 | 102 | tristate "Freescale MPIC global timer wakeup driver" |
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109 | 103 | depends on FSL_SOC && MPIC_TIMER && PM |
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110 | | - default n |
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111 | 104 | help |
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112 | 105 | The driver provides a way to wake up the system by MPIC |
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113 | 106 | timer. |
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115 | 108 | |
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116 | 109 | config PPC_EPAPR_HV_PIC |
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117 | 110 | bool |
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118 | | - default n |
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119 | 111 | select EPAPR_PARAVIRT |
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120 | 112 | |
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121 | 113 | config MPIC_WEIRD |
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122 | 114 | bool |
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123 | | - default n |
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124 | 115 | |
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125 | 116 | config MPIC_MSGR |
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126 | 117 | bool "MPIC message register support" |
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127 | 118 | depends on MPIC |
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128 | | - default n |
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129 | 119 | help |
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130 | 120 | Enables support for the MPIC message registers. These |
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131 | 121 | registers are used for inter-processor communication. |
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132 | 122 | |
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133 | 123 | config PPC_I8259 |
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134 | 124 | bool |
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135 | | - default n |
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136 | 125 | |
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137 | 126 | config U3_DART |
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138 | 127 | bool |
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139 | 128 | depends on PPC64 |
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140 | | - default n |
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141 | 129 | |
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142 | 130 | config PPC_RTAS |
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143 | 131 | bool |
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144 | | - default n |
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145 | 132 | |
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146 | 133 | config RTAS_ERROR_LOGGING |
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147 | 134 | bool |
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148 | 135 | depends on PPC_RTAS |
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149 | | - default n |
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150 | 136 | |
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151 | 137 | config PPC_RTAS_DAEMON |
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152 | 138 | bool |
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153 | 139 | depends on PPC_RTAS |
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154 | | - default n |
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155 | 140 | |
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156 | 141 | config RTAS_PROC |
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157 | 142 | bool "Proc interface to RTAS" |
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164 | 149 | |
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165 | 150 | config MMIO_NVRAM |
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166 | 151 | bool |
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167 | | - default n |
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168 | 152 | |
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169 | 153 | config MPIC_U3_HT_IRQS |
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170 | 154 | bool |
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171 | | - default n |
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172 | 155 | |
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173 | 156 | config MPIC_BROKEN_REGREAD |
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174 | 157 | bool |
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187 | 170 | |
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188 | 171 | config PPC_MPC106 |
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189 | 172 | bool |
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190 | | - default n |
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191 | 173 | |
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192 | 174 | config PPC_970_NAP |
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193 | 175 | bool |
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194 | | - default n |
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195 | 176 | |
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196 | 177 | config PPC_P7_NAP |
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197 | 178 | bool |
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198 | | - default n |
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| 179 | + |
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| 180 | +config PPC_BOOK3S_IDLE |
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| 181 | + def_bool y |
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| 182 | + depends on (PPC_970_NAP || PPC_P7_NAP) |
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199 | 183 | |
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200 | 184 | config PPC_INDIRECT_PIO |
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201 | 185 | bool |
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215 | 199 | |
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216 | 200 | endmenu |
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217 | 201 | |
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218 | | -config PPC601_SYNC_FIX |
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219 | | - bool "Workarounds for PPC601 bugs" |
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220 | | - depends on 6xx && PPC_PMAC |
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221 | | - help |
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222 | | - Some versions of the PPC601 (the first PowerPC chip) have bugs which |
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223 | | - mean that extra synchronization instructions are required near |
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224 | | - certain instructions, typically those that make major changes to the |
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225 | | - CPU state. These extra instructions reduce performance slightly. |
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226 | | - If you say N here, these extra instructions will not be included, |
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227 | | - resulting in a kernel which will run faster but may not run at all |
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228 | | - on some systems with the PPC601 chip. |
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229 | | - |
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230 | | - If in doubt, say Y here. |
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231 | | - |
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232 | 202 | config TAU |
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233 | 203 | bool "On-chip CPU temperature sensor support" |
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234 | | - depends on 6xx |
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| 204 | + depends on PPC_BOOK3S_32 |
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235 | 205 | help |
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236 | 206 | G3 and G4 processors have an on-chip temperature sensor called the |
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237 | 207 | 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die |
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.. | .. |
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244 | 214 | config TAU_INT |
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245 | 215 | bool "Interrupt driven TAU driver (EXPERIMENTAL)" |
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246 | 216 | depends on TAU |
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247 | | - ---help--- |
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| 217 | + help |
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248 | 218 | The TAU supports an interrupt driven mode which causes an interrupt |
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249 | 219 | whenever the temperature goes out of range. This is the fastest way |
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250 | 220 | to get notified the temp has exceeded a range. With this option off, |
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255 | 225 | config TAU_AVERAGE |
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256 | 226 | bool "Average high and low temp" |
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257 | 227 | depends on TAU |
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258 | | - ---help--- |
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| 228 | + help |
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259 | 229 | The TAU hardware can compare the temperature to an upper and lower |
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260 | 230 | bound. The default behavior is to show both the upper and lower |
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261 | 231 | bound in /proc/cpuinfo. If the range is large, the temperature is |
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279 | 249 | bool "Enable support for the CPM2 (Communications Processor Module)" |
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280 | 250 | depends on (FSL_SOC_BOOKE && PPC32) || 8260 |
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281 | 251 | select CPM |
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282 | | - select PPC_PCI_CHOICE |
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| 252 | + select HAVE_PCI |
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283 | 253 | select GPIOLIB |
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284 | 254 | help |
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285 | 255 | The CPM2 (Communications Processor Module) is a coprocessor on |
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.. | .. |
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289 | 259 | |
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290 | 260 | config FSL_ULI1575 |
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291 | 261 | bool |
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292 | | - default n |
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293 | 262 | select GENERIC_ISA_DMA |
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294 | 263 | help |
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295 | 264 | Supports for the ULI1575 PCIe south bridge that exists on some |
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.. | .. |
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317 | 286 | replacing their get_rtc_time/set_rtc_time callbacks with |
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318 | 287 | a proper RTC device driver. |
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319 | 288 | |
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320 | | -config SIMPLE_GPIO |
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321 | | - bool "Support for simple, memory-mapped GPIO controllers" |
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322 | | - depends on PPC |
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323 | | - select GPIOLIB |
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324 | | - help |
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325 | | - Say Y here to support simple, memory-mapped GPIO controllers. |
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326 | | - These are usually BCSRs used to control board's switches, LEDs, |
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327 | | - chip-selects, Ethernet/USB PHY's power and various other small |
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328 | | - on-board peripherals. |
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329 | | - |
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330 | 289 | config MCU_MPC8349EMITX |
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331 | 290 | bool "MPC8349E-mITX MCU driver" |
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332 | 291 | depends on I2C=y && PPC_83xx |
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.. | .. |
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336 | 295 | boards with the MPC8349E-mITX-compatible MCU chips. This driver will |
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337 | 296 | also register MCU GPIOs with the generic GPIO API, so you'll able |
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338 | 297 | to use MCU pins as GPIOs. |
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339 | | - |
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340 | | -config XILINX_PCI |
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341 | | - bool "Xilinx PCI host bridge support" |
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342 | | - depends on PCI && XILINX_VIRTEX |
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343 | 298 | |
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344 | 299 | endmenu |
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