hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/arch/powerpc/perf/ppc970-pmu.c
....@@ -1,17 +1,15 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * Performance counter support for PPC970-family processors.
34 *
45 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
5
- *
6
- * This program is free software; you can redistribute it and/or
7
- * modify it under the terms of the GNU General Public License
8
- * as published by the Free Software Foundation; either version
9
- * 2 of the License, or (at your option) any later version.
106 */
117 #include <linux/string.h>
128 #include <linux/perf_event.h>
139 #include <asm/reg.h>
1410 #include <asm/cputable.h>
11
+
12
+#include "internal.h"
1513
1614 /*
1715 * Bits in event code for PPC970
....@@ -257,7 +255,8 @@
257255 }
258256
259257 static int p970_compute_mmcr(u64 event[], int n_ev,
260
- unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[])
258
+ unsigned int hwc[], struct mmcr_regs *mmcr,
259
+ struct perf_event *pevents[])
261260 {
262261 unsigned long mmcr0 = 0, mmcr1 = 0, mmcra = 0;
263262 unsigned int pmc, unit, byte, psel;
....@@ -397,27 +396,26 @@
397396 mmcra |= 0x2000; /* mark only one IOP per PPC instruction */
398397
399398 /* Return MMCRx values */
400
- mmcr[0] = mmcr0;
401
- mmcr[1] = mmcr1;
402
- mmcr[2] = mmcra;
399
+ mmcr->mmcr0 = mmcr0;
400
+ mmcr->mmcr1 = mmcr1;
401
+ mmcr->mmcra = mmcra;
403402 return 0;
404403 }
405404
406
-static void p970_disable_pmc(unsigned int pmc, unsigned long mmcr[])
405
+static void p970_disable_pmc(unsigned int pmc, struct mmcr_regs *mmcr)
407406 {
408
- int shift, i;
407
+ int shift;
409408
410
- if (pmc <= 1) {
411
- shift = MMCR0_PMC1SEL_SH - 7 * pmc;
412
- i = 0;
413
- } else {
414
- shift = MMCR1_PMC3SEL_SH - 5 * (pmc - 2);
415
- i = 1;
416
- }
417409 /*
418410 * Setting the PMCxSEL field to 0x08 disables PMC x.
419411 */
420
- mmcr[i] = (mmcr[i] & ~(0x1fUL << shift)) | (0x08UL << shift);
412
+ if (pmc <= 1) {
413
+ shift = MMCR0_PMC1SEL_SH - 7 * pmc;
414
+ mmcr->mmcr0 = (mmcr->mmcr0 & ~(0x1fUL << shift)) | (0x08UL << shift);
415
+ } else {
416
+ shift = MMCR1_PMC3SEL_SH - 5 * (pmc - 2);
417
+ mmcr->mmcr1 = (mmcr->mmcr1 & ~(0x1fUL << shift)) | (0x08UL << shift);
418
+ }
421419 }
422420
423421 static int ppc970_generic_events[] = {
....@@ -436,7 +434,7 @@
436434 * 0 means not supported, -1 means nonsensical, other values
437435 * are event codes.
438436 */
439
-static int ppc970_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
437
+static u64 ppc970_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
440438 [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
441439 [C(OP_READ)] = { 0x8810, 0x3810 },
442440 [C(OP_WRITE)] = { 0x7810, 0x813 },
....@@ -490,7 +488,7 @@
490488 .flags = PPMU_NO_SIPR | PPMU_NO_CONT_SAMPLING,
491489 };
492490
493
-static int __init init_ppc970_pmu(void)
491
+int init_ppc970_pmu(void)
494492 {
495493 if (!cur_cpu_spec->oprofile_cpu_type ||
496494 (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970")
....@@ -499,5 +497,3 @@
499497
500498 return register_power_pmu(&ppc970_pmu);
501499 }
502
-
503
-early_initcall(init_ppc970_pmu);