add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/arch/powerpc/kernel/eeh_cache.c
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@@ -1,22 +1,9 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * PCI address cache; allows the lookup of PCI devices based on I/O address
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  *
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  * Copyright IBM Corporation 2004
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  * Copyright Linas Vepstas <linas@austin.ibm.com> 2004
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program; if not, write to the Free Software
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- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
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  */
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8
 
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 #include <linux/list.h>
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@@ -26,10 +13,13 @@
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 #include <linux/spinlock.h>
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 #include <linux/atomic.h>
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 #include <asm/pci-bridge.h>
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+#include <asm/debugfs.h>
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 #include <asm/ppc-pci.h>
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18
 
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 /**
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+ * DOC: Overview
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+ *
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  * The pci address cache subsystem.  This subsystem places
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  * PCI device address resources into a red-black tree, sorted
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  * according to the address range, so that given only an i/o
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@@ -46,6 +36,7 @@
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  * than any hash algo I could think of for this problem, even
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  * with the penalty of slow pointer chases for d-cache misses).
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  */
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+
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 struct pci_io_addr_range {
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 	struct rb_node rb_node;
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 	resource_size_t addr_lo;
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@@ -113,7 +104,7 @@
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 	while (n) {
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 		struct pci_io_addr_range *piar;
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 		piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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-		pr_debug("PCI: %s addr range %d [%pap-%pap]: %s\n",
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+		pr_info("PCI: %s addr range %d [%pap-%pap]: %s\n",
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 		       (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
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 		       &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev));
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 		cnt++;
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@@ -157,10 +148,8 @@
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 	piar->pcidev = dev;
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 	piar->flags = flags;
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150
 
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-#ifdef DEBUG
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-	pr_debug("PIAR: insert range=[%pap:%pap] dev=%s\n",
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-		 &alo, &ahi, pci_name(dev));
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-#endif
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+	eeh_edev_dbg(piar->edev, "PIAR: insert range=[%pap:%pap]\n",
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+		 &alo, &ahi);
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153
 
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 	rb_link_node(&piar->rb_node, parent, p);
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 	rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
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@@ -170,18 +159,10 @@
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159
 
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 static void __eeh_addr_cache_insert_dev(struct pci_dev *dev)
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 {
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-	struct pci_dn *pdn;
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 	struct eeh_dev *edev;
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 	int i;
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164
 
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-	pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
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-	if (!pdn) {
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-		pr_warn("PCI: no pci dn found for dev=%s\n",
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-			pci_name(dev));
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-		return;
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-	}
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-
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-	edev = pdn_to_eeh_dev(pdn);
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+	edev = pci_dev_to_eeh_dev(dev);
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 	if (!edev) {
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 		pr_warn("PCI: no EEH dev found for %s\n",
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 			pci_name(dev));
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@@ -240,6 +221,8 @@
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 		piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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222
 
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 		if (piar->pcidev == dev) {
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+			eeh_edev_dbg(piar->edev, "PIAR: remove range=[%pap:%pap]\n",
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+				 &piar->addr_lo, &piar->addr_hi);
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 			rb_erase(n, &pci_io_addr_cache_root.rb_root);
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 			kfree(piar);
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 			goto restart;
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@@ -267,40 +250,39 @@
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 }
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 /**
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- * eeh_addr_cache_build - Build a cache of I/O addresses
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+ * eeh_addr_cache_init - Initialize a cache of I/O addresses
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  *
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- * Build a cache of pci i/o addresses.  This cache will be used to
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+ * Initialize a cache of pci i/o addresses.  This cache will be used to
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  * find the pci device that corresponds to a given address.
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- * This routine scans all pci busses to build the cache.
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- * Must be run late in boot process, after the pci controllers
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- * have been scanned for devices (after all device resources are known).
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  */
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-void eeh_addr_cache_build(void)
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+void eeh_addr_cache_init(void)
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 {
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-	struct pci_dn *pdn;
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-	struct eeh_dev *edev;
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-	struct pci_dev *dev = NULL;
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-
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 	spin_lock_init(&pci_io_addr_cache_root.piar_lock);
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+}
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-	for_each_pci_dev(dev) {
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-		pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
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-		if (!pdn)
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-			continue;
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+static int eeh_addr_cache_show(struct seq_file *s, void *v)
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+{
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+	struct pci_io_addr_range *piar;
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+	struct rb_node *n;
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+	unsigned long flags;
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-		edev = pdn_to_eeh_dev(pdn);
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-		if (!edev)
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-			continue;
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+	spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
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+	for (n = rb_first(&pci_io_addr_cache_root.rb_root); n; n = rb_next(n)) {
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+		piar = rb_entry(n, struct pci_io_addr_range, rb_node);
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-		dev->dev.archdata.edev = edev;
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-		edev->pdev = dev;
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-
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-		eeh_addr_cache_insert_dev(dev);
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-		eeh_sysfs_add_device(dev);
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+		seq_printf(s, "%s addr range [%pap-%pap]: %s\n",
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+		       (piar->flags & IORESOURCE_IO) ? "i/o" : "mem",
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+		       &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev));
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 	}
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+	spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
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-#ifdef DEBUG
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-	/* Verify tree built up above, echo back the list of addrs. */
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-	eeh_addr_cache_print(&pci_io_addr_cache_root);
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-#endif
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+	return 0;
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+}
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+DEFINE_SHOW_ATTRIBUTE(eeh_addr_cache);
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+
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+void eeh_cache_debugfs_init(void)
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+{
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+	debugfs_create_file_unsafe("eeh_address_cache", 0400,
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+			powerpc_debugfs_root, NULL,
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+			&eeh_addr_cache_fops);
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 }