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| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation. |
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3 | 4 | * Copyright 2001-2012 IBM Corporation. |
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4 | | - * |
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5 | | - * This program is free software; you can redistribute it and/or modify |
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6 | | - * it under the terms of the GNU General Public License as published by |
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7 | | - * the Free Software Foundation; either version 2 of the License, or |
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8 | | - * (at your option) any later version. |
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9 | | - * |
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10 | | - * This program is distributed in the hope that it will be useful, |
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11 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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13 | | - * GNU General Public License for more details. |
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14 | | - * |
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15 | | - * You should have received a copy of the GNU General Public License |
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16 | | - * along with this program; if not, write to the Free Software |
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17 | | - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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18 | 5 | */ |
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19 | 6 | |
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20 | 7 | #ifndef _POWERPC_EEH_H |
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.. | .. |
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40 | 27 | #define EEH_FORCE_DISABLED 0x02 /* EEH disabled */ |
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41 | 28 | #define EEH_PROBE_MODE_DEV 0x04 /* From PCI device */ |
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42 | 29 | #define EEH_PROBE_MODE_DEVTREE 0x08 /* From device tree */ |
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43 | | -#define EEH_VALID_PE_ZERO 0x10 /* PE#0 is valid */ |
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44 | 30 | #define EEH_ENABLE_IO_FOR_LOG 0x20 /* Enable IO for log */ |
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45 | 31 | #define EEH_EARLY_DUMP_LOG 0x40 /* Dump log immediately */ |
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46 | | -#define EEH_POSTPONED_PROBE 0x80 /* Powernv may postpone device probe */ |
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47 | 32 | |
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48 | 33 | /* |
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49 | 34 | * Delay for PE reset, all in ms |
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.. | .. |
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88 | 73 | struct eeh_pe { |
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89 | 74 | int type; /* PE type: PHB/Bus/Device */ |
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90 | 75 | int state; /* PE EEH dependent mode */ |
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91 | | - int config_addr; /* Traditional PCI address */ |
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92 | 76 | int addr; /* PE configuration address */ |
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93 | 77 | struct pci_controller *phb; /* Associated PHB */ |
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94 | 78 | struct pci_bus *bus; /* Top PCI bus for bus PE */ |
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.. | .. |
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99 | 83 | atomic_t pass_dev_cnt; /* Count of passed through devs */ |
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100 | 84 | struct eeh_pe *parent; /* Parent PE */ |
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101 | 85 | void *data; /* PE auxillary data */ |
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102 | | - struct list_head child_list; /* Link PE to the child list */ |
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103 | | - struct list_head edevs; /* Link list of EEH devices */ |
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104 | | - struct list_head child; /* Child PEs */ |
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| 86 | + struct list_head child_list; /* List of PEs below this PE */ |
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| 87 | + struct list_head child; /* Memb. child_list/eeh_phb_pe */ |
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| 88 | + struct list_head edevs; /* List of eeh_dev in this PE */ |
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| 89 | + |
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| 90 | +#ifdef CONFIG_STACKTRACE |
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| 91 | + /* |
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| 92 | + * Saved stack trace. When we find a PE freeze in eeh_dev_check_failure |
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| 93 | + * the stack trace is saved here so we can print it in the recovery |
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| 94 | + * thread if it turns out to due to a real problem rather than |
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| 95 | + * a hot-remove. |
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| 96 | + * |
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| 97 | + * A max of 64 entries might be overkill, but it also might not be. |
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| 98 | + */ |
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| 99 | + unsigned long stack_trace[64]; |
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| 100 | + int trace_entries; |
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| 101 | +#endif /* CONFIG_STACKTRACE */ |
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105 | 102 | }; |
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106 | 103 | |
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107 | 104 | #define eeh_pe_for_each_dev(pe, edev, tmp) \ |
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108 | | - list_for_each_entry_safe(edev, tmp, &pe->edevs, list) |
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| 105 | + list_for_each_entry_safe(edev, tmp, &pe->edevs, entry) |
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109 | 106 | |
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110 | 107 | #define eeh_for_each_pe(root, pe) \ |
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111 | 108 | for (pe = root; pe; pe = eeh_pe_next(pe, root)) |
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.. | .. |
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134 | 131 | |
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135 | 132 | struct eeh_dev { |
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136 | 133 | int mode; /* EEH mode */ |
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137 | | - int class_code; /* Class code of the device */ |
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| 134 | + int bdfn; /* bdfn of device (for cfg ops) */ |
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| 135 | + struct pci_controller *controller; |
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138 | 136 | int pe_config_addr; /* PE config address */ |
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139 | 137 | u32 config_space[16]; /* Saved PCI config space */ |
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140 | 138 | int pcix_cap; /* Saved PCIx capability */ |
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.. | .. |
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142 | 140 | int aer_cap; /* Saved AER capability */ |
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143 | 141 | int af_cap; /* Saved AF capability */ |
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144 | 142 | struct eeh_pe *pe; /* Associated PE */ |
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145 | | - struct list_head list; /* Form link list in the PE */ |
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146 | | - struct list_head rmv_list; /* Record the removed edevs */ |
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| 143 | + struct list_head entry; /* Membership in eeh_pe.edevs */ |
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| 144 | + struct list_head rmv_entry; /* Membership in rmv_list */ |
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147 | 145 | struct pci_dn *pdn; /* Associated PCI device node */ |
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148 | 146 | struct pci_dev *pdev; /* Associated PCI device */ |
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149 | 147 | bool in_error; /* Error flag for edev */ |
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| 148 | + |
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| 149 | + /* VF specific properties */ |
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150 | 150 | struct pci_dev *physfn; /* Associated SRIOV PF */ |
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151 | | - struct pci_bus *bus; /* PCI bus for partial hotplug */ |
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| 151 | + int vf_index; /* Index of this VF */ |
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152 | 152 | }; |
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| 153 | + |
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| 154 | +/* "fmt" must be a simple literal string */ |
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| 155 | +#define EEH_EDEV_PRINT(level, edev, fmt, ...) \ |
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| 156 | + pr_##level("PCI %04x:%02x:%02x.%x#%04x: EEH: " fmt, \ |
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| 157 | + (edev)->controller->global_number, PCI_BUSNO((edev)->bdfn), \ |
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| 158 | + PCI_SLOT((edev)->bdfn), PCI_FUNC((edev)->bdfn), \ |
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| 159 | + ((edev)->pe ? (edev)->pe_config_addr : 0xffff), ##__VA_ARGS__) |
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| 160 | +#define eeh_edev_dbg(edev, fmt, ...) EEH_EDEV_PRINT(debug, (edev), fmt, ##__VA_ARGS__) |
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| 161 | +#define eeh_edev_info(edev, fmt, ...) EEH_EDEV_PRINT(info, (edev), fmt, ##__VA_ARGS__) |
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| 162 | +#define eeh_edev_warn(edev, fmt, ...) EEH_EDEV_PRINT(warn, (edev), fmt, ##__VA_ARGS__) |
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| 163 | +#define eeh_edev_err(edev, fmt, ...) EEH_EDEV_PRINT(err, (edev), fmt, ##__VA_ARGS__) |
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153 | 164 | |
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154 | 165 | static inline struct pci_dn *eeh_dev_to_pdn(struct eeh_dev *edev) |
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155 | 166 | { |
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.. | .. |
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203 | 214 | |
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204 | 215 | struct eeh_ops { |
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205 | 216 | char *name; |
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206 | | - int (*init)(void); |
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207 | | - void* (*probe)(struct pci_dn *pdn, void *data); |
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| 217 | + struct eeh_dev *(*probe)(struct pci_dev *pdev); |
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208 | 218 | int (*set_option)(struct eeh_pe *pe, int option); |
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209 | | - int (*get_pe_addr)(struct eeh_pe *pe); |
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210 | | - int (*get_state)(struct eeh_pe *pe, int *state); |
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| 219 | + int (*get_state)(struct eeh_pe *pe, int *delay); |
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211 | 220 | int (*reset)(struct eeh_pe *pe, int option); |
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212 | | - int (*wait_state)(struct eeh_pe *pe, int max_wait); |
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213 | 221 | int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len); |
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214 | 222 | int (*configure_bridge)(struct eeh_pe *pe); |
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215 | 223 | int (*err_inject)(struct eeh_pe *pe, int type, int func, |
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216 | 224 | unsigned long addr, unsigned long mask); |
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217 | | - int (*read_config)(struct pci_dn *pdn, int where, int size, u32 *val); |
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218 | | - int (*write_config)(struct pci_dn *pdn, int where, int size, u32 val); |
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| 225 | + int (*read_config)(struct eeh_dev *edev, int where, int size, u32 *val); |
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| 226 | + int (*write_config)(struct eeh_dev *edev, int where, int size, u32 val); |
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219 | 227 | int (*next_error)(struct eeh_pe **pe); |
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220 | | - int (*restore_config)(struct pci_dn *pdn); |
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221 | | - int (*notify_resume)(struct pci_dn *pdn); |
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| 228 | + int (*restore_config)(struct eeh_dev *edev); |
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| 229 | + int (*notify_resume)(struct eeh_dev *edev); |
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222 | 230 | }; |
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223 | 231 | |
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224 | 232 | extern int eeh_subsystem_flags; |
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225 | | -extern int eeh_max_freezes; |
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| 233 | +extern u32 eeh_max_freezes; |
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| 234 | +extern bool eeh_debugfs_no_recover; |
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226 | 235 | extern struct eeh_ops *eeh_ops; |
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227 | 236 | extern raw_spinlock_t confirm_error_lock; |
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228 | 237 | |
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.. | .. |
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243 | 252 | |
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244 | 253 | static inline bool eeh_enabled(void) |
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245 | 254 | { |
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246 | | - if (eeh_has_flag(EEH_FORCE_DISABLED) || |
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247 | | - !eeh_has_flag(EEH_ENABLED)) |
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248 | | - return false; |
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249 | | - |
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250 | | - return true; |
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| 255 | + return eeh_has_flag(EEH_ENABLED) && !eeh_has_flag(EEH_FORCE_DISABLED); |
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251 | 256 | } |
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252 | 257 | |
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253 | 258 | static inline void eeh_serialize_lock(unsigned long *flags) |
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.. | .. |
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266 | 271 | == (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); |
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267 | 272 | } |
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268 | 273 | |
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269 | | -typedef void *(*eeh_edev_traverse_func)(struct eeh_dev *edev, void *flag); |
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| 274 | +typedef void (*eeh_edev_traverse_func)(struct eeh_dev *edev, void *flag); |
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270 | 275 | typedef void *(*eeh_pe_traverse_func)(struct eeh_pe *pe, void *flag); |
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271 | 276 | void eeh_set_pe_aux_size(int size); |
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272 | 277 | int eeh_phb_pe_create(struct pci_controller *phb); |
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| 278 | +int eeh_wait_state(struct eeh_pe *pe, int max_wait); |
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273 | 279 | struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb); |
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274 | 280 | struct eeh_pe *eeh_pe_next(struct eeh_pe *pe, struct eeh_pe *root); |
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275 | | -struct eeh_pe *eeh_pe_get(struct pci_controller *phb, |
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276 | | - int pe_no, int config_addr); |
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277 | | -int eeh_add_to_parent_pe(struct eeh_dev *edev); |
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278 | | -int eeh_rmv_from_parent_pe(struct eeh_dev *edev); |
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| 281 | +struct eeh_pe *eeh_pe_get(struct pci_controller *phb, int pe_no); |
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| 282 | +int eeh_pe_tree_insert(struct eeh_dev *edev, struct eeh_pe *new_pe_parent); |
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| 283 | +int eeh_pe_tree_remove(struct eeh_dev *edev); |
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279 | 284 | void eeh_pe_update_time_stamp(struct eeh_pe *pe); |
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280 | 285 | void *eeh_pe_traverse(struct eeh_pe *root, |
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281 | 286 | eeh_pe_traverse_func fn, void *flag); |
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282 | | -void *eeh_pe_dev_traverse(struct eeh_pe *root, |
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283 | | - eeh_edev_traverse_func fn, void *flag); |
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| 287 | +void eeh_pe_dev_traverse(struct eeh_pe *root, |
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| 288 | + eeh_edev_traverse_func fn, void *flag); |
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284 | 289 | void eeh_pe_restore_bars(struct eeh_pe *pe); |
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285 | 290 | const char *eeh_pe_loc_get(struct eeh_pe *pe); |
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286 | 291 | struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe); |
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287 | 292 | |
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288 | | -struct eeh_dev *eeh_dev_init(struct pci_dn *pdn); |
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289 | | -void eeh_dev_phb_init_dynamic(struct pci_controller *phb); |
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290 | | -void eeh_probe_devices(void); |
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291 | | -int __init eeh_ops_register(struct eeh_ops *ops); |
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292 | | -int __exit eeh_ops_unregister(const char *name); |
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| 293 | +void eeh_show_enabled(void); |
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| 294 | +int __init eeh_init(struct eeh_ops *ops); |
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293 | 295 | int eeh_check_failure(const volatile void __iomem *token); |
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294 | 296 | int eeh_dev_check_failure(struct eeh_dev *edev); |
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295 | | -void eeh_addr_cache_build(void); |
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296 | | -void eeh_add_device_early(struct pci_dn *); |
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297 | | -void eeh_add_device_tree_early(struct pci_dn *); |
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298 | | -void eeh_add_device_late(struct pci_dev *); |
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299 | | -void eeh_add_device_tree_late(struct pci_bus *); |
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300 | | -void eeh_add_sysfs_files(struct pci_bus *); |
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| 297 | +void eeh_addr_cache_init(void); |
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| 298 | +void eeh_probe_device(struct pci_dev *pdev); |
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301 | 299 | void eeh_remove_device(struct pci_dev *); |
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302 | | -int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state); |
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| 300 | +int eeh_unfreeze_pe(struct eeh_pe *pe); |
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303 | 301 | int eeh_pe_reset_and_recover(struct eeh_pe *pe); |
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304 | 302 | int eeh_dev_open(struct pci_dev *pdev); |
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305 | 303 | void eeh_dev_release(struct pci_dev *pdev); |
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306 | 304 | struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group); |
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307 | 305 | int eeh_pe_set_option(struct eeh_pe *pe, int option); |
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308 | 306 | int eeh_pe_get_state(struct eeh_pe *pe); |
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309 | | -int eeh_pe_reset(struct eeh_pe *pe, int option); |
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| 307 | +int eeh_pe_reset(struct eeh_pe *pe, int option, bool include_passed); |
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310 | 308 | int eeh_pe_configure(struct eeh_pe *pe); |
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311 | 309 | int eeh_pe_inject_err(struct eeh_pe *pe, int type, int func, |
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312 | 310 | unsigned long addr, unsigned long mask); |
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313 | | -int eeh_restore_vf_config(struct pci_dn *pdn); |
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314 | 311 | |
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315 | 312 | /** |
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316 | 313 | * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. |
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.. | .. |
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334 | 331 | return false; |
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335 | 332 | } |
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336 | 333 | |
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337 | | -static inline void eeh_probe_devices(void) { } |
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338 | | - |
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339 | | -static inline void *eeh_dev_init(struct pci_dn *pdn, void *data) |
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340 | | -{ |
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341 | | - return NULL; |
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342 | | -} |
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| 334 | +static inline void eeh_show_enabled(void) { } |
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343 | 335 | |
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344 | 336 | static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { } |
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345 | 337 | |
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.. | .. |
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350 | 342 | |
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351 | 343 | #define eeh_dev_check_failure(x) (0) |
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352 | 344 | |
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353 | | -static inline void eeh_addr_cache_build(void) { } |
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| 345 | +static inline void eeh_addr_cache_init(void) { } |
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354 | 346 | |
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355 | | -static inline void eeh_add_device_early(struct pci_dn *pdn) { } |
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356 | | - |
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357 | | -static inline void eeh_add_device_tree_early(struct pci_dn *pdn) { } |
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358 | | - |
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359 | | -static inline void eeh_add_device_late(struct pci_dev *dev) { } |
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360 | | - |
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361 | | -static inline void eeh_add_device_tree_late(struct pci_bus *bus) { } |
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362 | | - |
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363 | | -static inline void eeh_add_sysfs_files(struct pci_bus *bus) { } |
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| 347 | +static inline void eeh_probe_device(struct pci_dev *dev) { } |
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364 | 348 | |
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365 | 349 | static inline void eeh_remove_device(struct pci_dev *dev) { } |
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366 | 350 | |
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367 | 351 | #define EEH_POSSIBLE_ERROR(val, type) (0) |
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368 | 352 | #define EEH_IO_ERROR_VALUE(size) (-1UL) |
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| 353 | +static inline int eeh_phb_pe_create(struct pci_controller *phb) { return 0; } |
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369 | 354 | #endif /* CONFIG_EEH */ |
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| 355 | + |
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| 356 | +#if defined(CONFIG_PPC_PSERIES) && defined(CONFIG_EEH) |
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| 357 | +void pseries_eeh_init_edev(struct pci_dn *pdn); |
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| 358 | +void pseries_eeh_init_edev_recursive(struct pci_dn *pdn); |
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| 359 | +#else |
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| 360 | +static inline void pseries_eeh_add_device_early(struct pci_dn *pdn) { } |
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| 361 | +static inline void pseries_eeh_add_device_tree_early(struct pci_dn *pdn) { } |
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| 362 | +#endif |
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370 | 363 | |
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371 | 364 | #ifdef CONFIG_PPC64 |
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372 | 365 | /* |
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.. | .. |
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466 | 459 | eeh_check_failure(addr); |
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467 | 460 | } |
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468 | 461 | |
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| 462 | + |
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| 463 | +void eeh_cache_debugfs_init(void); |
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| 464 | + |
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469 | 465 | #endif /* CONFIG_PPC64 */ |
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470 | 466 | #endif /* __KERNEL__ */ |
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471 | 467 | #endif /* _POWERPC_EEH_H */ |
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