add wifi6 8852be driver

hc

2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da

 kernel/arch/powerpc/include/asm/barrier.h
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@@ -7,6 +7,10 @@
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 #include <asm/asm-const.h>
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+#ifndef __ASSEMBLY__
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+#include <asm/ppc-opcode.h>
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+#endif
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+
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 /*
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  * Memory barrier.
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  * The sync instruction guarantees that all memory accesses initiated
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@@ -18,8 +22,6 @@
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  * mb() prevents loads and stores being reordered across this point.
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  * rmb() prevents loads being reordered across this point.
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  * wmb() prevents stores being reordered across this point.
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- * read_barrier_depends() prevents data-dependent loads being reordered
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- *	across this point (nop on PPC).
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  *
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  * *mb() variants without smp_ prefix must order all types of memory
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  * operations with one another. sync is the only instruction sufficient
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@@ -80,6 +82,22 @@
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 	___p1;								\
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 })
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+#ifdef CONFIG_PPC64
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+#define smp_cond_load_relaxed(ptr, cond_expr) ({		\
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+	typeof(ptr) __PTR = (ptr);				\
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+	__unqual_scalar_typeof(*ptr) VAL;			\
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+	VAL = READ_ONCE(*__PTR);				\
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+	if (unlikely(!(cond_expr))) {				\
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+		spin_begin();					\
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+		do {						\
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+			VAL = READ_ONCE(*__PTR);		\
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+		} while (!(cond_expr));				\
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+		spin_end();					\
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+	}							\
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+	(typeof(*ptr))VAL;					\
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+})
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+#endif
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+
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 #ifdef CONFIG_PPC_BOOK3S_64
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 #define NOSPEC_BARRIER_SLOT   nop
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 #elif defined(CONFIG_PPC_FSL_BOOK3E)
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@@ -101,6 +119,15 @@
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 #define barrier_nospec()
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 #endif /* CONFIG_PPC_BARRIER_NOSPEC */
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+/*
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+ * pmem_wmb() ensures that all stores for which the modification
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+ * are written to persistent storage by preceding dcbfps/dcbstps
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+ * instructions have updated persistent storage before any data
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+ * access or data transfer caused by subsequent instructions is
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+ * initiated.
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+ */
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+#define pmem_wmb() __asm__ __volatile__(PPC_PHWSYNC ::: "memory")
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+
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 #include <asm-generic/barrier.h>
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 #endif /* _ASM_POWERPC_BARRIER_H */