| .. | .. |
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| 950 | 950 | /include/ "qoriq-clockgen2.dtsi" |
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| 951 | 951 | global-utilities@e1000 { |
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| 952 | 952 | compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0"; |
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| 953 | | - |
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| 954 | | - pll2: pll2@840 { |
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| 955 | | - #clock-cells = <1>; |
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| 956 | | - reg = <0x840 0x4>; |
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| 957 | | - compatible = "fsl,qoriq-core-pll-2.0"; |
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| 958 | | - clocks = <&sysclk>; |
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| 959 | | - clock-output-names = "pll2", "pll2-div2", "pll2-div4"; |
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| 960 | | - }; |
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| 961 | | - |
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| 962 | | - pll3: pll3@860 { |
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| 963 | | - #clock-cells = <1>; |
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| 964 | | - reg = <0x860 0x4>; |
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| 965 | | - compatible = "fsl,qoriq-core-pll-2.0"; |
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| 966 | | - clocks = <&sysclk>; |
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| 967 | | - clock-output-names = "pll3", "pll3-div2", "pll3-div4"; |
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| 968 | | - }; |
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| 969 | | - |
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| 970 | | - pll4: pll4@880 { |
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| 971 | | - #clock-cells = <1>; |
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| 972 | | - reg = <0x880 0x4>; |
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| 973 | | - compatible = "fsl,qoriq-core-pll-2.0"; |
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| 974 | | - clocks = <&sysclk>; |
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| 975 | | - clock-output-names = "pll4", "pll4-div2", "pll4-div4"; |
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| 976 | | - }; |
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| 977 | | - |
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| 978 | | - mux0: mux0@0 { |
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| 979 | | - #clock-cells = <0>; |
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| 980 | | - reg = <0x0 0x4>; |
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| 981 | | - compatible = "fsl,qoriq-core-mux-2.0"; |
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| 982 | | - clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, |
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| 983 | | - <&pll1 0>, <&pll1 1>, <&pll1 2>, |
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| 984 | | - <&pll2 0>, <&pll2 1>, <&pll2 2>; |
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| 985 | | - clock-names = "pll0", "pll0-div2", "pll0-div4", |
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| 986 | | - "pll1", "pll1-div2", "pll1-div4", |
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| 987 | | - "pll2", "pll2-div2", "pll2-div4"; |
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| 988 | | - clock-output-names = "cmux0"; |
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| 989 | | - }; |
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| 990 | | - |
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| 991 | | - mux1: mux1@20 { |
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| 992 | | - #clock-cells = <0>; |
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| 993 | | - reg = <0x20 0x4>; |
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| 994 | | - compatible = "fsl,qoriq-core-mux-2.0"; |
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| 995 | | - clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>, |
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| 996 | | - <&pll1 0>, <&pll1 1>, <&pll1 2>, |
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| 997 | | - <&pll2 0>, <&pll2 1>, <&pll2 2>; |
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| 998 | | - clock-names = "pll0", "pll0-div2", "pll0-div4", |
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| 999 | | - "pll1", "pll1-div2", "pll1-div4", |
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| 1000 | | - "pll2", "pll2-div2", "pll2-div4"; |
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| 1001 | | - clock-output-names = "cmux1"; |
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| 1002 | | - }; |
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| 1003 | | - |
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| 1004 | | - mux2: mux2@40 { |
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| 1005 | | - #clock-cells = <0>; |
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| 1006 | | - reg = <0x40 0x4>; |
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| 1007 | | - compatible = "fsl,qoriq-core-mux-2.0"; |
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| 1008 | | - clocks = <&pll3 0>, <&pll3 1>, <&pll3 2>, |
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| 1009 | | - <&pll4 0>, <&pll4 1>, <&pll4 2>; |
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| 1010 | | - clock-names = "pll3", "pll3-div2", "pll3-div4", |
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| 1011 | | - "pll4", "pll4-div2", "pll4-div4"; |
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| 1012 | | - clock-output-names = "cmux2"; |
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| 1013 | | - }; |
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| 1014 | 953 | }; |
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| 1015 | 954 | |
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| 1016 | 955 | rcpm: global-utilities@e2000 { |
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