| .. | .. |
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| 374 | 374 | /include/ "qoriq-clockgen1.dtsi" |
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| 375 | 375 | global-utilities@e1000 { |
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| 376 | 376 | compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0"; |
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| 377 | | - |
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| 378 | | - pll2: pll2@840 { |
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| 379 | | - #clock-cells = <1>; |
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| 380 | | - reg = <0x840 0x4>; |
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| 381 | | - compatible = "fsl,qoriq-core-pll-1.0"; |
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| 382 | | - clocks = <&sysclk>; |
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| 383 | | - clock-output-names = "pll2", "pll2-div2"; |
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| 384 | | - }; |
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| 385 | | - |
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| 386 | | - pll3: pll3@860 { |
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| 387 | | - #clock-cells = <1>; |
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| 388 | | - reg = <0x860 0x4>; |
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| 389 | | - compatible = "fsl,qoriq-core-pll-1.0"; |
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| 390 | | - clocks = <&sysclk>; |
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| 391 | | - clock-output-names = "pll3", "pll3-div2"; |
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| 392 | | - }; |
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| 393 | | - |
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| 394 | | - mux2: mux2@40 { |
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| 395 | | - #clock-cells = <0>; |
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| 396 | | - reg = <0x40 0x4>; |
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| 397 | | - compatible = "fsl,qoriq-core-mux-1.0"; |
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| 398 | | - clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; |
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| 399 | | - clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; |
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| 400 | | - clock-output-names = "cmux2"; |
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| 401 | | - }; |
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| 402 | | - |
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| 403 | | - mux3: mux3@60 { |
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| 404 | | - #clock-cells = <0>; |
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| 405 | | - reg = <0x60 0x4>; |
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| 406 | | - compatible = "fsl,qoriq-core-mux-1.0"; |
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| 407 | | - clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; |
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| 408 | | - clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; |
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| 409 | | - clock-output-names = "cmux3"; |
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| 410 | | - }; |
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| 411 | | - |
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| 412 | | - mux4: mux4@80 { |
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| 413 | | - #clock-cells = <0>; |
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| 414 | | - reg = <0x80 0x4>; |
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| 415 | | - compatible = "fsl,qoriq-core-mux-1.0"; |
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| 416 | | - clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>; |
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| 417 | | - clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2"; |
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| 418 | | - clock-output-names = "cmux4"; |
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| 419 | | - }; |
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| 420 | | - |
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| 421 | | - mux5: mux5@a0 { |
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| 422 | | - #clock-cells = <0>; |
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| 423 | | - reg = <0xa0 0x4>; |
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| 424 | | - compatible = "fsl,qoriq-core-mux-1.0"; |
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| 425 | | - clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>; |
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| 426 | | - clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2"; |
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| 427 | | - clock-output-names = "cmux5"; |
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| 428 | | - }; |
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| 429 | | - |
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| 430 | | - mux6: mux6@c0 { |
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| 431 | | - #clock-cells = <0>; |
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| 432 | | - reg = <0xc0 0x4>; |
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| 433 | | - compatible = "fsl,qoriq-core-mux-1.0"; |
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| 434 | | - clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>; |
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| 435 | | - clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2"; |
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| 436 | | - clock-output-names = "cmux6"; |
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| 437 | | - }; |
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| 438 | | - |
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| 439 | | - mux7: mux7@e0 { |
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| 440 | | - #clock-cells = <0>; |
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| 441 | | - reg = <0xe0 0x4>; |
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| 442 | | - compatible = "fsl,qoriq-core-mux-1.0"; |
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| 443 | | - clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>; |
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| 444 | | - clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2"; |
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| 445 | | - clock-output-names = "cmux7"; |
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| 446 | | - }; |
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| 447 | 377 | }; |
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| 448 | 378 | |
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| 449 | 379 | rcpm: global-utilities@e2000 { |
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