.. | .. |
---|
52 | 52 | jr ra |
---|
53 | 53 | END(_restore_fp) |
---|
54 | 54 | |
---|
55 | | -/* |
---|
56 | | - * Load the FPU with signalling NANS. This bit pattern we're using has |
---|
57 | | - * the property that no matter whether considered as single or as double |
---|
58 | | - * precision represents signaling NANS. |
---|
59 | | - * |
---|
60 | | - * The value to initialize fcr31 to comes in $a0. |
---|
61 | | - */ |
---|
62 | | - |
---|
63 | | - .set push |
---|
64 | | - SET_HARDFLOAT |
---|
65 | | - |
---|
66 | | -LEAF(_init_fpu) |
---|
67 | | - mfc0 t0, CP0_STATUS |
---|
68 | | - li t1, ST0_CU1 |
---|
69 | | - or t0, t1 |
---|
70 | | - mtc0 t0, CP0_STATUS |
---|
71 | | - |
---|
72 | | - ctc1 a0, fcr31 |
---|
73 | | - |
---|
74 | | - li t0, -1 |
---|
75 | | - |
---|
76 | | - mtc1 t0, $f0 |
---|
77 | | - mtc1 t0, $f1 |
---|
78 | | - mtc1 t0, $f2 |
---|
79 | | - mtc1 t0, $f3 |
---|
80 | | - mtc1 t0, $f4 |
---|
81 | | - mtc1 t0, $f5 |
---|
82 | | - mtc1 t0, $f6 |
---|
83 | | - mtc1 t0, $f7 |
---|
84 | | - mtc1 t0, $f8 |
---|
85 | | - mtc1 t0, $f9 |
---|
86 | | - mtc1 t0, $f10 |
---|
87 | | - mtc1 t0, $f11 |
---|
88 | | - mtc1 t0, $f12 |
---|
89 | | - mtc1 t0, $f13 |
---|
90 | | - mtc1 t0, $f14 |
---|
91 | | - mtc1 t0, $f15 |
---|
92 | | - mtc1 t0, $f16 |
---|
93 | | - mtc1 t0, $f17 |
---|
94 | | - mtc1 t0, $f18 |
---|
95 | | - mtc1 t0, $f19 |
---|
96 | | - mtc1 t0, $f20 |
---|
97 | | - mtc1 t0, $f21 |
---|
98 | | - mtc1 t0, $f22 |
---|
99 | | - mtc1 t0, $f23 |
---|
100 | | - mtc1 t0, $f24 |
---|
101 | | - mtc1 t0, $f25 |
---|
102 | | - mtc1 t0, $f26 |
---|
103 | | - mtc1 t0, $f27 |
---|
104 | | - mtc1 t0, $f28 |
---|
105 | | - mtc1 t0, $f29 |
---|
106 | | - mtc1 t0, $f30 |
---|
107 | | - mtc1 t0, $f31 |
---|
108 | | - jr ra |
---|
109 | | - END(_init_fpu) |
---|
110 | | - |
---|
111 | | - .set pop |
---|
112 | | - |
---|
113 | 55 | .set noreorder |
---|
114 | 56 | |
---|
115 | 57 | /** |
---|