hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/arch/mips/bmips/dma.c
....@@ -40,7 +40,7 @@
4040
4141 #define FLUSH_RAC 0x100
4242
43
-dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t pa)
43
+dma_addr_t phys_to_dma(struct device *dev, phys_addr_t pa)
4444 {
4545 struct bmips_dma_range *r;
4646
....@@ -52,7 +52,7 @@
5252 return pa;
5353 }
5454
55
-phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr)
55
+phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dma_addr)
5656 {
5757 struct bmips_dma_range *r;
5858
....@@ -64,7 +64,9 @@
6464 return dma_addr;
6565 }
6666
67
-void arch_sync_dma_for_cpu_all(struct device *dev)
67
+bool bmips_rac_flush_disable;
68
+
69
+void arch_sync_dma_for_cpu_all(void)
6870 {
6971 void __iomem *cbr = BMIPS_GET_CBR();
7072 u32 cfg;
....@@ -74,6 +76,9 @@
7476 boot_cpu_type() != CPU_BMIPS4380)
7577 return;
7678
79
+ if (unlikely(bmips_rac_flush_disable))
80
+ return;
81
+
7782 /* Flush stale data out of the readahead cache */
7883 cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
7984 __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);