hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
....@@ -8,8 +8,76 @@
88 * VEMotherBoard.lisa
99 */
1010 / {
11
- smb@8000000 {
12
- motherboard {
11
+ v2m_clk24mhz: clk24mhz {
12
+ compatible = "fixed-clock";
13
+ #clock-cells = <0>;
14
+ clock-frequency = <24000000>;
15
+ clock-output-names = "v2m:clk24mhz";
16
+ };
17
+
18
+ v2m_refclk1mhz: refclk1mhz {
19
+ compatible = "fixed-clock";
20
+ #clock-cells = <0>;
21
+ clock-frequency = <1000000>;
22
+ clock-output-names = "v2m:refclk1mhz";
23
+ };
24
+
25
+ v2m_refclk32khz: refclk32khz {
26
+ compatible = "fixed-clock";
27
+ #clock-cells = <0>;
28
+ clock-frequency = <32768>;
29
+ clock-output-names = "v2m:refclk32khz";
30
+ };
31
+
32
+ v2m_fixed_3v3: v2m-3v3 {
33
+ compatible = "regulator-fixed";
34
+ regulator-name = "3V3";
35
+ regulator-min-microvolt = <3300000>;
36
+ regulator-max-microvolt = <3300000>;
37
+ regulator-always-on;
38
+ };
39
+
40
+ mcc {
41
+ compatible = "arm,vexpress,config-bus";
42
+ arm,vexpress,config-bridge = <&v2m_sysreg>;
43
+
44
+ v2m_oscclk1: oscclk1 {
45
+ /* CLCD clock */
46
+ compatible = "arm,vexpress-osc";
47
+ arm,vexpress-sysreg,func = <1 1>;
48
+ freq-range = <23750000 63500000>;
49
+ #clock-cells = <0>;
50
+ clock-output-names = "v2m:oscclk1";
51
+ };
52
+
53
+ reset {
54
+ compatible = "arm,vexpress-reset";
55
+ arm,vexpress-sysreg,func = <5 0>;
56
+ };
57
+
58
+ muxfpga {
59
+ compatible = "arm,vexpress-muxfpga";
60
+ arm,vexpress-sysreg,func = <7 0>;
61
+ };
62
+
63
+ shutdown {
64
+ compatible = "arm,vexpress-shutdown";
65
+ arm,vexpress-sysreg,func = <8 0>;
66
+ };
67
+
68
+ reboot {
69
+ compatible = "arm,vexpress-reboot";
70
+ arm,vexpress-sysreg,func = <9 0>;
71
+ };
72
+
73
+ dvimode {
74
+ compatible = "arm,vexpress-dvimode";
75
+ arm,vexpress-sysreg,func = <11 0>;
76
+ };
77
+ };
78
+
79
+ bus@8000000 {
80
+ motherboard-bus {
1381 arm,v2m-memory-map = "rs1";
1482 compatible = "arm,vexpress,v2m-p1", "simple-bus";
1583 #address-cells = <2>; /* SMB chipselect number and offset */
....@@ -17,46 +85,20 @@
1785 #interrupt-cells = <1>;
1886 ranges;
1987
20
- flash@0,00000000 {
88
+ flash@0 {
2189 compatible = "arm,vexpress-flash", "cfi-flash";
2290 reg = <0 0x00000000 0x04000000>,
2391 <4 0x00000000 0x04000000>;
2492 bank-width = <4>;
2593 };
2694
27
- v2m_video_ram: vram@2,00000000 {
28
- compatible = "arm,vexpress-vram";
29
- reg = <2 0x00000000 0x00800000>;
30
- };
31
-
32
- ethernet@2,02000000 {
95
+ ethernet@202000000 {
3396 compatible = "smsc,lan91c111";
3497 reg = <2 0x02000000 0x10000>;
3598 interrupts = <15>;
3699 };
37100
38
- v2m_clk24mhz: clk24mhz {
39
- compatible = "fixed-clock";
40
- #clock-cells = <0>;
41
- clock-frequency = <24000000>;
42
- clock-output-names = "v2m:clk24mhz";
43
- };
44
-
45
- v2m_refclk1mhz: refclk1mhz {
46
- compatible = "fixed-clock";
47
- #clock-cells = <0>;
48
- clock-frequency = <1000000>;
49
- clock-output-names = "v2m:refclk1mhz";
50
- };
51
-
52
- v2m_refclk32khz: refclk32khz {
53
- compatible = "fixed-clock";
54
- #clock-cells = <0>;
55
- clock-frequency = <32768>;
56
- clock-output-names = "v2m:refclk32khz";
57
- };
58
-
59
- iofpga@3,00000000 {
101
+ iofpga-bus@300000000 {
60102 compatible = "simple-bus";
61103 #address-cells = <1>;
62104 #size-cells = <1>;
....@@ -91,7 +133,7 @@
91133 mmci@50000 {
92134 compatible = "arm,pl180", "arm,primecell";
93135 reg = <0x050000 0x1000>;
94
- interrupts = <9 10>;
136
+ interrupts = <9>, <10>;
95137 cd-gpios = <&v2m_sysreg 0 0>;
96138 wp-gpios = <&v2m_sysreg 1 0>;
97139 max-frequency = <12000000>;
....@@ -116,7 +158,7 @@
116158 clock-names = "KMIREFCLK", "apb_pclk";
117159 };
118160
119
- v2m_serial0: uart@90000 {
161
+ v2m_serial0: serial@90000 {
120162 compatible = "arm,pl011", "arm,primecell";
121163 reg = <0x090000 0x1000>;
122164 interrupts = <5>;
....@@ -124,7 +166,7 @@
124166 clock-names = "uartclk", "apb_pclk";
125167 };
126168
127
- v2m_serial1: uart@a0000 {
169
+ v2m_serial1: serial@a0000 {
128170 compatible = "arm,pl011", "arm,primecell";
129171 reg = <0x0a0000 0x1000>;
130172 interrupts = <6>;
....@@ -132,7 +174,7 @@
132174 clock-names = "uartclk", "apb_pclk";
133175 };
134176
135
- v2m_serial2: uart@b0000 {
177
+ v2m_serial2: serial@b0000 {
136178 compatible = "arm,pl011", "arm,primecell";
137179 reg = <0x0b0000 0x1000>;
138180 interrupts = <7>;
....@@ -140,7 +182,7 @@
140182 clock-names = "uartclk", "apb_pclk";
141183 };
142184
143
- v2m_serial3: uart@c0000 {
185
+ v2m_serial3: serial@c0000 {
144186 compatible = "arm,pl011", "arm,primecell";
145187 reg = <0x0c0000 0x1000>;
146188 interrupts = <8>;
....@@ -153,7 +195,7 @@
153195 reg = <0x0f0000 0x1000>;
154196 interrupts = <0>;
155197 clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
156
- clock-names = "wdogclk", "apb_pclk";
198
+ clock-names = "wdog_clk", "apb_pclk";
157199 };
158200
159201 v2m_timer01: timer@110000 {
....@@ -172,6 +214,12 @@
172214 clock-names = "timclken1", "timclken2", "apb_pclk";
173215 };
174216
217
+ virtio-block@130000 {
218
+ compatible = "virtio,mmio";
219
+ reg = <0x130000 0x200>;
220
+ interrupts = <42>;
221
+ };
222
+
175223 rtc@170000 {
176224 compatible = "arm,pl031", "arm,primecell";
177225 reg = <0x170000 0x1000>;
....@@ -187,91 +235,14 @@
187235 interrupts = <14>;
188236 clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
189237 clock-names = "clcdclk", "apb_pclk";
190
- arm,pl11x,framebuffer = <0x18000000 0x00180000>;
191
- memory-region = <&v2m_video_ram>;
192
- max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
238
+ memory-region = <&vram>;
193239
194240 port {
195
- v2m_clcd_pads: endpoint {
196
- remote-endpoint = <&v2m_clcd_panel>;
241
+ clcd_pads: endpoint {
242
+ remote-endpoint = <&panel_in>;
197243 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
198244 };
199245 };
200
-
201
- panel {
202
- compatible = "panel-dpi";
203
-
204
- port {
205
- v2m_clcd_panel: endpoint {
206
- remote-endpoint = <&v2m_clcd_pads>;
207
- };
208
- };
209
-
210
- panel-timing {
211
- clock-frequency = <63500127>;
212
- hactive = <1024>;
213
- hback-porch = <152>;
214
- hfront-porch = <48>;
215
- hsync-len = <104>;
216
- vactive = <768>;
217
- vback-porch = <23>;
218
- vfront-porch = <3>;
219
- vsync-len = <4>;
220
- };
221
- };
222
- };
223
-
224
- virtio-block@130000 {
225
- compatible = "virtio,mmio";
226
- reg = <0x130000 0x200>;
227
- interrupts = <42>;
228
- };
229
- };
230
-
231
- v2m_fixed_3v3: v2m-3v3 {
232
- compatible = "regulator-fixed";
233
- regulator-name = "3V3";
234
- regulator-min-microvolt = <3300000>;
235
- regulator-max-microvolt = <3300000>;
236
- regulator-always-on;
237
- };
238
-
239
- mcc {
240
- compatible = "arm,vexpress,config-bus";
241
- arm,vexpress,config-bridge = <&v2m_sysreg>;
242
-
243
- v2m_oscclk1: oscclk1 {
244
- /* CLCD clock */
245
- compatible = "arm,vexpress-osc";
246
- arm,vexpress-sysreg,func = <1 1>;
247
- freq-range = <23750000 63500000>;
248
- #clock-cells = <0>;
249
- clock-output-names = "v2m:oscclk1";
250
- };
251
-
252
- reset {
253
- compatible = "arm,vexpress-reset";
254
- arm,vexpress-sysreg,func = <5 0>;
255
- };
256
-
257
- muxfpga {
258
- compatible = "arm,vexpress-muxfpga";
259
- arm,vexpress-sysreg,func = <7 0>;
260
- };
261
-
262
- shutdown {
263
- compatible = "arm,vexpress-shutdown";
264
- arm,vexpress-sysreg,func = <8 0>;
265
- };
266
-
267
- reboot {
268
- compatible = "arm,vexpress-reboot";
269
- arm,vexpress-sysreg,func = <9 0>;
270
- };
271
-
272
- dvimode {
273
- compatible = "arm,vexpress-dvimode";
274
- arm,vexpress-sysreg,func = <11 0>;
275246 };
276247 };
277248 };