.. | .. |
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26 | 26 | |
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27 | 27 | #define UARTA_3390 REG_PHYS_ADDR(0x40a900) |
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28 | 28 | #define UARTA_7250 REG_PHYS_ADDR(0x40b400) |
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29 | | -#define UARTA_7260 REG_PHYS_ADDR(0x40c000) |
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30 | | -#define UARTA_7268 UARTA_7260 |
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| 29 | +#define UARTA_7255 REG_PHYS_ADDR(0x40c000) |
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| 30 | +#define UARTA_7260 UARTA_7255 |
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| 31 | +#define UARTA_7268 UARTA_7255 |
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31 | 32 | #define UARTA_7271 UARTA_7268 |
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32 | 33 | #define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000) |
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| 34 | +#define UARTA_7216 UARTA_7278 |
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| 35 | +#define UARTA_72164 UARTA_7278 |
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| 36 | +#define UARTA_72165 UARTA_7278 |
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33 | 37 | #define UARTA_7364 REG_PHYS_ADDR(0x40b000) |
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34 | 38 | #define UARTA_7366 UARTA_7364 |
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35 | 39 | #define UARTA_74371 REG_PHYS_ADDR(0x406b00) |
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.. | .. |
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81 | 85 | |
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82 | 86 | /* Chip specific detection starts here */ |
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83 | 87 | 20: checkuart(\rp, \rv, 0x33900000, 3390) |
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84 | | -21: checkuart(\rp, \rv, 0x72500000, 7250) |
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85 | | -22: checkuart(\rp, \rv, 0x72600000, 7260) |
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86 | | -23: checkuart(\rp, \rv, 0x72680000, 7268) |
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87 | | -24: checkuart(\rp, \rv, 0x72710000, 7271) |
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88 | | -25: checkuart(\rp, \rv, 0x73640000, 7364) |
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89 | | -26: checkuart(\rp, \rv, 0x73660000, 7366) |
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90 | | -27: checkuart(\rp, \rv, 0x07437100, 74371) |
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91 | | -28: checkuart(\rp, \rv, 0x74390000, 7439) |
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92 | | -29: checkuart(\rp, \rv, 0x74450000, 7445) |
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93 | | -30: checkuart(\rp, \rv, 0x72780000, 7278) |
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| 88 | +21: checkuart(\rp, \rv, 0x72160000, 7216) |
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| 89 | +22: checkuart(\rp, \rv, 0x07216400, 72164) |
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| 90 | +23: checkuart(\rp, \rv, 0x07216500, 72165) |
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| 91 | +24: checkuart(\rp, \rv, 0x72500000, 7250) |
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| 92 | +25: checkuart(\rp, \rv, 0x72550000, 7255) |
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| 93 | +26: checkuart(\rp, \rv, 0x72600000, 7260) |
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| 94 | +27: checkuart(\rp, \rv, 0x72680000, 7268) |
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| 95 | +28: checkuart(\rp, \rv, 0x72710000, 7271) |
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| 96 | +29: checkuart(\rp, \rv, 0x72780000, 7278) |
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| 97 | +30: checkuart(\rp, \rv, 0x73640000, 7364) |
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| 98 | +31: checkuart(\rp, \rv, 0x73660000, 7366) |
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| 99 | +32: checkuart(\rp, \rv, 0x07437100, 74371) |
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| 100 | +33: checkuart(\rp, \rv, 0x74390000, 7439) |
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| 101 | +34: checkuart(\rp, \rv, 0x74450000, 7445) |
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94 | 102 | |
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95 | 103 | /* No valid UART found */ |
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96 | 104 | 90: mov \rp, #0 |
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.. | .. |
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138 | 146 | bne 1002b |
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139 | 147 | .endm |
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140 | 148 | |
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141 | | - .macro waituart,rd,rx |
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| 149 | + .macro waituarttxrdy,rd,rx |
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| 150 | + .endm |
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| 151 | + |
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| 152 | + .macro waituartcts,rd,rx |
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142 | 153 | .endm |
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143 | 154 | |
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144 | 155 | /* |
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