| .. | .. |
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| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | 2 | /dts-v1/; |
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| 3 | 3 | |
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| 4 | | -#include "skeleton.dtsi" |
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| 5 | 4 | #include <dt-bindings/clock/qcom,gcc-msm8960.h> |
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| 6 | 5 | #include <dt-bindings/reset/qcom,gcc-msm8960.h> |
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| 7 | 6 | #include <dt-bindings/clock/qcom,mmcc-msm8960.h> |
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| .. | .. |
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| 10 | 9 | #include <dt-bindings/interrupt-controller/irq.h> |
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| 11 | 10 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
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| 12 | 11 | / { |
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| 12 | + #address-cells = <1>; |
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| 13 | + #size-cells = <1>; |
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| 13 | 14 | model = "Qualcomm APQ8064"; |
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| 14 | 15 | compatible = "qcom,apq8064"; |
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| 15 | 16 | interrupt-parent = <&intc>; |
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| .. | .. |
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| 92 | 93 | min-residency-us = <3000>; |
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| 93 | 94 | }; |
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| 94 | 95 | }; |
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| 96 | + }; |
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| 97 | + |
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| 98 | + memory { |
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| 99 | + device_type = "memory"; |
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| 100 | + reg = <0x0 0x0>; |
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| 95 | 101 | }; |
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| 96 | 102 | |
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| 97 | 103 | thermal-zones { |
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| .. | .. |
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| 192 | 198 | clock-frequency = <19200000>; |
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| 193 | 199 | }; |
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| 194 | 200 | |
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| 195 | | - pxo_board { |
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| 201 | + pxo_board: pxo_board { |
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| 196 | 202 | compatible = "fixed-clock"; |
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| 197 | 203 | #clock-cells = <0>; |
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| 198 | 204 | clock-frequency = <27000000>; |
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| .. | .. |
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| 344 | 350 | reg = <0x800000 0x4000>; |
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| 345 | 351 | |
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| 346 | 352 | gpio-controller; |
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| 353 | + gpio-ranges = <&tlmm_pinmux 0 0 90>; |
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| 347 | 354 | #gpio-cells = <2>; |
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| 348 | 355 | interrupt-controller; |
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| 349 | 356 | #interrupt-cells = <2>; |
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| .. | .. |
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| 705 | 712 | compatible = "qcom,pm8921-gpio", |
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| 706 | 713 | "qcom,ssbi-gpio"; |
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| 707 | 714 | reg = <0x150>; |
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| 708 | | - interrupts = <192 IRQ_TYPE_NONE>, |
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| 709 | | - <193 IRQ_TYPE_NONE>, |
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| 710 | | - <194 IRQ_TYPE_NONE>, |
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| 711 | | - <195 IRQ_TYPE_NONE>, |
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| 712 | | - <196 IRQ_TYPE_NONE>, |
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| 713 | | - <197 IRQ_TYPE_NONE>, |
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| 714 | | - <198 IRQ_TYPE_NONE>, |
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| 715 | | - <199 IRQ_TYPE_NONE>, |
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| 716 | | - <200 IRQ_TYPE_NONE>, |
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| 717 | | - <201 IRQ_TYPE_NONE>, |
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| 718 | | - <202 IRQ_TYPE_NONE>, |
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| 719 | | - <203 IRQ_TYPE_NONE>, |
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| 720 | | - <204 IRQ_TYPE_NONE>, |
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| 721 | | - <205 IRQ_TYPE_NONE>, |
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| 722 | | - <206 IRQ_TYPE_NONE>, |
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| 723 | | - <207 IRQ_TYPE_NONE>, |
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| 724 | | - <208 IRQ_TYPE_NONE>, |
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| 725 | | - <209 IRQ_TYPE_NONE>, |
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| 726 | | - <210 IRQ_TYPE_NONE>, |
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| 727 | | - <211 IRQ_TYPE_NONE>, |
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| 728 | | - <212 IRQ_TYPE_NONE>, |
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| 729 | | - <213 IRQ_TYPE_NONE>, |
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| 730 | | - <214 IRQ_TYPE_NONE>, |
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| 731 | | - <215 IRQ_TYPE_NONE>, |
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| 732 | | - <216 IRQ_TYPE_NONE>, |
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| 733 | | - <217 IRQ_TYPE_NONE>, |
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| 734 | | - <218 IRQ_TYPE_NONE>, |
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| 735 | | - <219 IRQ_TYPE_NONE>, |
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| 736 | | - <220 IRQ_TYPE_NONE>, |
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| 737 | | - <221 IRQ_TYPE_NONE>, |
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| 738 | | - <222 IRQ_TYPE_NONE>, |
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| 739 | | - <223 IRQ_TYPE_NONE>, |
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| 740 | | - <224 IRQ_TYPE_NONE>, |
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| 741 | | - <225 IRQ_TYPE_NONE>, |
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| 742 | | - <226 IRQ_TYPE_NONE>, |
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| 743 | | - <227 IRQ_TYPE_NONE>, |
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| 744 | | - <228 IRQ_TYPE_NONE>, |
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| 745 | | - <229 IRQ_TYPE_NONE>, |
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| 746 | | - <230 IRQ_TYPE_NONE>, |
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| 747 | | - <231 IRQ_TYPE_NONE>, |
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| 748 | | - <232 IRQ_TYPE_NONE>, |
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| 749 | | - <233 IRQ_TYPE_NONE>, |
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| 750 | | - <234 IRQ_TYPE_NONE>, |
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| 751 | | - <235 IRQ_TYPE_NONE>; |
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| 715 | + interrupt-controller; |
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| 716 | + #interrupt-cells = <2>; |
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| 752 | 717 | gpio-controller; |
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| 718 | + gpio-ranges = <&pm8921_gpio 0 0 44>; |
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| 753 | 719 | #gpio-cells = <2>; |
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| 754 | 720 | |
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| 755 | 721 | }; |
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| .. | .. |
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| 1337 | 1303 | <0x04700300 0x200>, |
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| 1338 | 1304 | <0x04700500 0x5c>; |
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| 1339 | 1305 | reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator"; |
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| 1340 | | - clock-names = "iface_clk"; |
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| 1341 | | - clocks = <&mmcc DSI_M_AHB_CLK>; |
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| 1306 | + clock-names = "iface_clk", "ref"; |
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| 1307 | + clocks = <&mmcc DSI_M_AHB_CLK>, |
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| 1308 | + <&pxo_board>; |
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| 1342 | 1309 | }; |
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| 1343 | 1310 | |
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| 1344 | 1311 | |
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| .. | .. |
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| 1604 | 1571 | }; |
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| 1605 | 1572 | |
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| 1606 | 1573 | etb@1a01000 { |
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| 1607 | | - compatible = "coresight-etb10", "arm,primecell"; |
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| 1574 | + compatible = "arm,coresight-etb10", "arm,primecell"; |
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| 1608 | 1575 | reg = <0x1a01000 0x1000>; |
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| 1609 | 1576 | |
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| 1610 | 1577 | clocks = <&rpmcc RPM_QDSS_CLK>; |
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| 1611 | 1578 | clock-names = "apb_pclk"; |
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| 1612 | 1579 | |
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| 1613 | | - port { |
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| 1614 | | - etb_in: endpoint { |
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| 1615 | | - slave-mode; |
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| 1616 | | - remote-endpoint = <&replicator_out0>; |
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| 1580 | + in-ports { |
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| 1581 | + port { |
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| 1582 | + etb_in: endpoint { |
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| 1583 | + remote-endpoint = <&replicator_out0>; |
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| 1584 | + }; |
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| 1617 | 1585 | }; |
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| 1618 | 1586 | }; |
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| 1619 | 1587 | }; |
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| .. | .. |
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| 1625 | 1593 | clocks = <&rpmcc RPM_QDSS_CLK>; |
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| 1626 | 1594 | clock-names = "apb_pclk"; |
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| 1627 | 1595 | |
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| 1628 | | - port { |
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| 1629 | | - tpiu_in: endpoint { |
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| 1630 | | - slave-mode; |
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| 1631 | | - remote-endpoint = <&replicator_out1>; |
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| 1596 | + in-ports { |
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| 1597 | + port { |
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| 1598 | + tpiu_in: endpoint { |
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| 1599 | + remote-endpoint = <&replicator_out1>; |
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| 1600 | + }; |
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| 1632 | 1601 | }; |
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| 1633 | 1602 | }; |
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| 1634 | 1603 | }; |
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| 1635 | 1604 | |
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| 1636 | 1605 | replicator { |
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| 1637 | | - compatible = "arm,coresight-replicator"; |
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| 1606 | + compatible = "arm,coresight-static-replicator"; |
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| 1638 | 1607 | |
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| 1639 | 1608 | clocks = <&rpmcc RPM_QDSS_CLK>; |
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| 1640 | 1609 | clock-names = "apb_pclk"; |
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| 1641 | 1610 | |
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| 1642 | | - ports { |
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| 1611 | + out-ports { |
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| 1643 | 1612 | #address-cells = <1>; |
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| 1644 | 1613 | #size-cells = <0>; |
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| 1645 | 1614 | |
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| .. | .. |
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| 1655 | 1624 | remote-endpoint = <&tpiu_in>; |
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| 1656 | 1625 | }; |
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| 1657 | 1626 | }; |
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| 1658 | | - port@2 { |
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| 1659 | | - reg = <0>; |
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| 1627 | + }; |
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| 1628 | + |
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| 1629 | + in-ports { |
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| 1630 | + port { |
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| 1660 | 1631 | replicator_in: endpoint { |
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| 1661 | | - slave-mode; |
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| 1662 | 1632 | remote-endpoint = <&funnel_out>; |
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| 1663 | 1633 | }; |
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| 1664 | 1634 | }; |
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| .. | .. |
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| 1666 | 1636 | }; |
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| 1667 | 1637 | |
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| 1668 | 1638 | funnel@1a04000 { |
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| 1669 | | - compatible = "arm,coresight-funnel", "arm,primecell"; |
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| 1639 | + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; |
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| 1670 | 1640 | reg = <0x1a04000 0x1000>; |
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| 1671 | 1641 | |
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| 1672 | 1642 | clocks = <&rpmcc RPM_QDSS_CLK>; |
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| 1673 | 1643 | clock-names = "apb_pclk"; |
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| 1674 | 1644 | |
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| 1675 | | - ports { |
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| 1645 | + in-ports { |
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| 1676 | 1646 | #address-cells = <1>; |
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| 1677 | 1647 | #size-cells = <0>; |
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| 1678 | 1648 | |
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| .. | .. |
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| 1686 | 1656 | port@0 { |
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| 1687 | 1657 | reg = <0>; |
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| 1688 | 1658 | funnel_in0: endpoint { |
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| 1689 | | - slave-mode; |
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| 1690 | 1659 | remote-endpoint = <&etm0_out>; |
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| 1691 | 1660 | }; |
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| 1692 | 1661 | }; |
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| 1693 | 1662 | port@1 { |
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| 1694 | 1663 | reg = <1>; |
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| 1695 | 1664 | funnel_in1: endpoint { |
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| 1696 | | - slave-mode; |
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| 1697 | 1665 | remote-endpoint = <&etm1_out>; |
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| 1698 | 1666 | }; |
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| 1699 | 1667 | }; |
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| 1700 | 1668 | port@4 { |
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| 1701 | 1669 | reg = <4>; |
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| 1702 | 1670 | funnel_in4: endpoint { |
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| 1703 | | - slave-mode; |
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| 1704 | 1671 | remote-endpoint = <&etm2_out>; |
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| 1705 | 1672 | }; |
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| 1706 | 1673 | }; |
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| 1707 | 1674 | port@5 { |
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| 1708 | 1675 | reg = <5>; |
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| 1709 | 1676 | funnel_in5: endpoint { |
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| 1710 | | - slave-mode; |
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| 1711 | 1677 | remote-endpoint = <&etm3_out>; |
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| 1712 | 1678 | }; |
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| 1713 | 1679 | }; |
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| 1714 | | - port@8 { |
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| 1715 | | - reg = <0>; |
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| 1680 | + }; |
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| 1681 | + |
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| 1682 | + out-ports { |
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| 1683 | + port { |
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| 1716 | 1684 | funnel_out: endpoint { |
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| 1717 | 1685 | remote-endpoint = <&replicator_in>; |
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| 1718 | 1686 | }; |
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| .. | .. |
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| 1729 | 1697 | |
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| 1730 | 1698 | cpu = <&CPU0>; |
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| 1731 | 1699 | |
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| 1732 | | - port { |
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| 1733 | | - etm0_out: endpoint { |
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| 1734 | | - remote-endpoint = <&funnel_in0>; |
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| 1700 | + out-ports { |
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| 1701 | + port { |
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| 1702 | + etm0_out: endpoint { |
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| 1703 | + remote-endpoint = <&funnel_in0>; |
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| 1704 | + }; |
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| 1735 | 1705 | }; |
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| 1736 | 1706 | }; |
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| 1737 | 1707 | }; |
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| .. | .. |
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| 1745 | 1715 | |
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| 1746 | 1716 | cpu = <&CPU1>; |
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| 1747 | 1717 | |
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| 1748 | | - port { |
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| 1749 | | - etm1_out: endpoint { |
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| 1750 | | - remote-endpoint = <&funnel_in1>; |
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| 1718 | + out-ports { |
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| 1719 | + port { |
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| 1720 | + etm1_out: endpoint { |
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| 1721 | + remote-endpoint = <&funnel_in1>; |
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| 1722 | + }; |
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| 1751 | 1723 | }; |
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| 1752 | 1724 | }; |
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| 1753 | 1725 | }; |
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| .. | .. |
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| 1761 | 1733 | |
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| 1762 | 1734 | cpu = <&CPU2>; |
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| 1763 | 1735 | |
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| 1764 | | - port { |
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| 1765 | | - etm2_out: endpoint { |
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| 1766 | | - remote-endpoint = <&funnel_in4>; |
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| 1736 | + out-ports { |
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| 1737 | + port { |
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| 1738 | + etm2_out: endpoint { |
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| 1739 | + remote-endpoint = <&funnel_in4>; |
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| 1740 | + }; |
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| 1767 | 1741 | }; |
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| 1768 | 1742 | }; |
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| 1769 | 1743 | }; |
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| .. | .. |
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| 1777 | 1751 | |
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| 1778 | 1752 | cpu = <&CPU3>; |
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| 1779 | 1753 | |
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| 1780 | | - port { |
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| 1781 | | - etm3_out: endpoint { |
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| 1782 | | - remote-endpoint = <&funnel_in5>; |
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| 1754 | + out-ports { |
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| 1755 | + port { |
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| 1756 | + etm3_out: endpoint { |
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| 1757 | + remote-endpoint = <&funnel_in5>; |
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| 1758 | + }; |
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| 1783 | 1759 | }; |
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| 1784 | 1760 | }; |
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| 1785 | 1761 | }; |
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