hc
2024-12-19 9370bb92b2d16684ee45cf24e879c93c509162da
kernel/arch/arm/boot/dts/imx7d.dtsi
....@@ -7,11 +7,19 @@
77 #include <dt-bindings/reset/imx7-reset.h>
88
99 / {
10
+ aliases {
11
+ usb0 = &usbotg1;
12
+ usb1 = &usbotg2;
13
+ usb2 = &usbh;
14
+ };
15
+
1016 cpus {
1117 cpu0: cpu@0 {
1218 clock-frequency = <996000000>;
1319 operating-points-v2 = <&cpu0_opp_table>;
1420 #cooling-cells = <2>;
21
+ nvmem-cells = <&fuse_grade>;
22
+ nvmem-cell-names = "speed_grade";
1523 };
1624
1725 cpu1: cpu@1 {
....@@ -20,7 +28,18 @@
2028 reg = <1>;
2129 clock-frequency = <996000000>;
2230 operating-points-v2 = <&cpu0_opp_table>;
31
+ #cooling-cells = <2>;
32
+ cpu-idle-states = <&cpu_sleep_wait>;
2333 };
34
+ };
35
+
36
+ timer {
37
+ compatible = "arm,armv7-timer";
38
+ interrupt-parent = <&intc>;
39
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
40
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
41
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
42
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2443 };
2544
2645 cpu0_opp_table: opp-table {
....@@ -29,14 +48,25 @@
2948
3049 opp-792000000 {
3150 opp-hz = /bits/ 64 <792000000>;
32
- opp-microvolt = <975000>;
51
+ opp-microvolt = <1000000>;
3352 clock-latency-ns = <150000>;
53
+ opp-supported-hw = <0xd>, <0x7>;
54
+ opp-suspend;
3455 };
3556
3657 opp-996000000 {
3758 opp-hz = /bits/ 64 <996000000>;
38
- opp-microvolt = <1075000>;
59
+ opp-microvolt = <1100000>;
3960 clock-latency-ns = <150000>;
61
+ opp-supported-hw = <0xc>, <0x7>;
62
+ opp-suspend;
63
+ };
64
+
65
+ opp-1200000000 {
66
+ opp-hz = /bits/ 64 <1200000000>;
67
+ opp-microvolt = <1225000>;
68
+ clock-latency-ns = <150000>;
69
+ opp-supported-hw = <0x8>, <0x3>;
4070 opp-suspend;
4171 };
4272 };
....@@ -63,12 +93,34 @@
6393 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
6494 clock-names = "apb_pclk";
6595
66
- port {
67
- etm1_out_port: endpoint {
68
- remote-endpoint = <&ca_funnel_in_port1>;
96
+ out-ports {
97
+ port {
98
+ etm1_out_port: endpoint {
99
+ remote-endpoint = <&ca_funnel_in_port1>;
100
+ };
69101 };
70102 };
71103 };
104
+
105
+ intc: interrupt-controller@31001000 {
106
+ compatible = "arm,cortex-a7-gic";
107
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
108
+ #interrupt-cells = <3>;
109
+ interrupt-controller;
110
+ interrupt-parent = <&intc>;
111
+ reg = <0x31001000 0x1000>,
112
+ <0x31002000 0x2000>,
113
+ <0x31004000 0x2000>,
114
+ <0x31006000 0x2000>;
115
+ };
116
+ };
117
+};
118
+
119
+&aips2 {
120
+ pcie_phy: pcie-phy@306d0000 {
121
+ compatible = "fsl,imx7d-pcie-phy";
122
+ reg = <0x306d0000 0x10000>;
123
+ status = "disabled";
72124 };
73125 };
74126
....@@ -105,8 +157,9 @@
105157 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
106158 clock-names = "ipg", "ahb", "ptp",
107159 "enet_clk_ref", "enet_out";
108
- fsl,num-tx-queues=<3>;
109
- fsl,num-rx-queues=<3>;
160
+ fsl,num-tx-queues = <3>;
161
+ fsl,num-rx-queues = <3>;
162
+ fsl,stop-mode = <&gpr 0x10 4>;
110163 status = "disabled";
111164 };
112165
....@@ -122,6 +175,7 @@
122175 ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */
123176 0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
124177 num-lanes = <1>;
178
+ num-viewport = <4>;
125179 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
126180 interrupt-names = "msi";
127181 #interrupt-cells = <1>;
....@@ -146,17 +200,21 @@
146200 fsl,max-link-speed = <2>;
147201 power-domains = <&pgc_pcie_phy>;
148202 resets = <&src IMX7_RESET_PCIEPHY>,
149
- <&src IMX7_RESET_PCIE_CTRL_APPS_EN>;
150
- reset-names = "pciephy", "apps";
203
+ <&src IMX7_RESET_PCIE_CTRL_APPS_EN>,
204
+ <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>;
205
+ reset-names = "pciephy", "apps", "turnoff";
206
+ fsl,imx7d-pcie-phy = <&pcie_phy>;
151207 status = "disabled";
152208 };
153209 };
154210
155
-&ca_funnel_ports {
211
+&ca_funnel_in_ports {
212
+ #address-cells = <1>;
213
+ #size-cells = <0>;
214
+
156215 port@1 {
157216 reg = <1>;
158217 ca_funnel_in_port1: endpoint {
159
- slave-mode;
160218 remote-endpoint = <&etm1_out_port>;
161219 };
162220 };